1 /*
2 * Copyright (c) 1998-2024 Broadcom. All Rights Reserved.
3 * The term “Broadcom” refers to Broadcom Inc.
4 * and/or its subsidiaries.
5 * SPDX-License-Identifier: GPL-2.0 OR MIT
6 */
7
8 /*
9 * svga3d_surfacedefs.h --
10 *
11 * Surface/format/image helper code.
12 */
13
14 #ifndef SVGA3D_SURFACEDEFS_H
15 #define SVGA3D_SURFACEDEFS_H
16
17 #include "svga3d_reg.h"
18
19 #define max_t(type, x, y) ((x) > (y) ? (x) : (y))
20
21 /*
22 * enum svga3d_block_desc describes the active data channels in a block.
23 *
24 * There can be at-most four active channels in a block:
25 * 1. Red, bump W, luminance and depth are stored in the first channel.
26 * 2. Green, bump V and stencil are stored in the second channel.
27 * 3. Blue and bump U are stored in the third channel.
28 * 4. Alpha and bump Q are stored in the fourth channel.
29 *
30 * Block channels can be used to store compressed and buffer data:
31 * 1. For compressed formats, only the data channel is used and its size
32 * is equal to that of a singular block in the compression scheme.
33 * 2. For buffer formats, only the data channel is used and its size is
34 * exactly one byte in length.
35 * 3. In each case the bit depth represent the size of a singular block.
36 *
37 * Note: Compressed and IEEE formats do not use the bitMask structure.
38 */
39
40 enum svga3d_block_desc {
41
42 SVGA3DBLOCKDESC_NONE = 0, /* No channels are active */
43 SVGA3DBLOCKDESC_BLUE = 1 << 0, /* Block with red channel data */
44 SVGA3DBLOCKDESC_W = 1 << 0,
45 SVGA3DBLOCKDESC_BUMP_L = 1 << 0,
46
47 /* Format contains Green/V data */
48 SVGA3DBLOCKDESC_GREEN = 1 << 1,
49 SVGA3DBLOCKDESC_V = 1 << 1,
50
51 /* Format contains Red/W/Luminance data */
52 SVGA3DBLOCKDESC_RED = 1 << 2,
53 SVGA3DBLOCKDESC_U = 1 << 2,
54 SVGA3DBLOCKDESC_LUMINANCE = 1 << 2,
55
56 SVGA3DBLOCKDESC_ALPHA = 1 << 3, /* Block with an alpha channel */
57 SVGA3DBLOCKDESC_Q = 1 << 3, /* Block with bump Q channel data */
58 SVGA3DBLOCKDESC_BUFFER = 1 << 4, /* Block stores 1 byte of data */
59 SVGA3DBLOCKDESC_COMPRESSED = 1 << 5, /* Block stores n bytes of data depending
60 on the compression method used */
61 SVGA3DBLOCKDESC_FP = 1 << 6,
62
63 SVGA3DBLOCKDESC_PLANAR_YUV = 1 << 7,
64 SVGA3DBLOCKDESC_2PLANAR_YUV = 1 << 8,
65 SVGA3DBLOCKDESC_3PLANAR_YUV = 1 << 9,
66 SVGA3DBLOCKDESC_STENCIL = 1 << 11,
67 SVGA3DBLOCKDESC_TYPELESS = 1 << 12,
68 SVGA3DBLOCKDESC_SINT = 1 << 13,
69 SVGA3DBLOCKDESC_UINT = 1 << 14,
70 SVGA3DBLOCKDESC_NORM = 1 << 15,
71 SVGA3DBLOCKDESC_SRGB = 1 << 16,
72 SVGA3DBLOCKDESC_EXP = 1 << 17,
73 SVGA3DBLOCKDESC_COLOR = 1 << 18,
74 SVGA3DBLOCKDESC_DEPTH = 1 << 19,
75 SVGA3DBLOCKDESC_BUMP = 1 << 20,
76 SVGA3DBLOCKDESC_YUV_VIDEO = 1 << 21,
77 SVGA3DBLOCKDESC_MIXED = 1 << 22,
78 SVGA3DBLOCKDESC_CX = 1 << 23,
79
80 /* Different compressed format groups. */
81 SVGA3DBLOCKDESC_BC1 = 1 << 24,
82 SVGA3DBLOCKDESC_BC2 = 1 << 25,
83 SVGA3DBLOCKDESC_BC3 = 1 << 26,
84 SVGA3DBLOCKDESC_BC4 = 1 << 27,
85 SVGA3DBLOCKDESC_BC5 = 1 << 28,
86 SVGA3DBLOCKDESC_BC6H = 1 << 29,
87 SVGA3DBLOCKDESC_BC7 = 1 << 30,
88 SVGA3DBLOCKDESC_COMPRESSED_MASK = SVGA3DBLOCKDESC_BC1 |
89 SVGA3DBLOCKDESC_BC2 |
90 SVGA3DBLOCKDESC_BC3 |
91 SVGA3DBLOCKDESC_BC4 |
92 SVGA3DBLOCKDESC_BC5 |
93 SVGA3DBLOCKDESC_BC6H |
94 SVGA3DBLOCKDESC_BC7,
95
96 SVGA3DBLOCKDESC_A_UINT = SVGA3DBLOCKDESC_ALPHA |
97 SVGA3DBLOCKDESC_UINT |
98 SVGA3DBLOCKDESC_COLOR,
99 SVGA3DBLOCKDESC_A_UNORM = SVGA3DBLOCKDESC_A_UINT |
100 SVGA3DBLOCKDESC_NORM,
101 SVGA3DBLOCKDESC_R_UINT = SVGA3DBLOCKDESC_RED |
102 SVGA3DBLOCKDESC_UINT |
103 SVGA3DBLOCKDESC_COLOR,
104 SVGA3DBLOCKDESC_R_UNORM = SVGA3DBLOCKDESC_R_UINT |
105 SVGA3DBLOCKDESC_NORM,
106 SVGA3DBLOCKDESC_R_SINT = SVGA3DBLOCKDESC_RED |
107 SVGA3DBLOCKDESC_SINT |
108 SVGA3DBLOCKDESC_COLOR,
109 SVGA3DBLOCKDESC_R_SNORM = SVGA3DBLOCKDESC_R_SINT |
110 SVGA3DBLOCKDESC_NORM,
111 SVGA3DBLOCKDESC_G_UINT = SVGA3DBLOCKDESC_GREEN |
112 SVGA3DBLOCKDESC_UINT |
113 SVGA3DBLOCKDESC_COLOR,
114 SVGA3DBLOCKDESC_RG_UINT = SVGA3DBLOCKDESC_RED |
115 SVGA3DBLOCKDESC_GREEN |
116 SVGA3DBLOCKDESC_UINT |
117 SVGA3DBLOCKDESC_COLOR,
118 SVGA3DBLOCKDESC_RG_UNORM = SVGA3DBLOCKDESC_RG_UINT |
119 SVGA3DBLOCKDESC_NORM,
120 SVGA3DBLOCKDESC_RG_SINT = SVGA3DBLOCKDESC_RED |
121 SVGA3DBLOCKDESC_GREEN |
122 SVGA3DBLOCKDESC_SINT |
123 SVGA3DBLOCKDESC_COLOR,
124 SVGA3DBLOCKDESC_RG_SNORM = SVGA3DBLOCKDESC_RG_SINT |
125 SVGA3DBLOCKDESC_NORM,
126 SVGA3DBLOCKDESC_RGB_UINT = SVGA3DBLOCKDESC_RED |
127 SVGA3DBLOCKDESC_GREEN |
128 SVGA3DBLOCKDESC_BLUE |
129 SVGA3DBLOCKDESC_UINT |
130 SVGA3DBLOCKDESC_COLOR,
131 SVGA3DBLOCKDESC_RGB_SINT = SVGA3DBLOCKDESC_RED |
132 SVGA3DBLOCKDESC_GREEN |
133 SVGA3DBLOCKDESC_BLUE |
134 SVGA3DBLOCKDESC_SINT |
135 SVGA3DBLOCKDESC_COLOR,
136 SVGA3DBLOCKDESC_RGB_UNORM = SVGA3DBLOCKDESC_RGB_UINT |
137 SVGA3DBLOCKDESC_NORM,
138 SVGA3DBLOCKDESC_RGB_UNORM_SRGB = SVGA3DBLOCKDESC_RGB_UNORM |
139 SVGA3DBLOCKDESC_SRGB,
140 SVGA3DBLOCKDESC_RGBA_UINT = SVGA3DBLOCKDESC_RED |
141 SVGA3DBLOCKDESC_GREEN |
142 SVGA3DBLOCKDESC_BLUE |
143 SVGA3DBLOCKDESC_ALPHA |
144 SVGA3DBLOCKDESC_UINT |
145 SVGA3DBLOCKDESC_COLOR,
146 SVGA3DBLOCKDESC_RGBA_UNORM = SVGA3DBLOCKDESC_RGBA_UINT |
147 SVGA3DBLOCKDESC_NORM,
148 SVGA3DBLOCKDESC_RGBA_UNORM_SRGB = SVGA3DBLOCKDESC_RGBA_UNORM |
149 SVGA3DBLOCKDESC_SRGB,
150 SVGA3DBLOCKDESC_RGBA_SINT = SVGA3DBLOCKDESC_RED |
151 SVGA3DBLOCKDESC_GREEN |
152 SVGA3DBLOCKDESC_BLUE |
153 SVGA3DBLOCKDESC_ALPHA |
154 SVGA3DBLOCKDESC_SINT |
155 SVGA3DBLOCKDESC_COLOR,
156 SVGA3DBLOCKDESC_RGBA_SNORM = SVGA3DBLOCKDESC_RGBA_SINT |
157 SVGA3DBLOCKDESC_NORM,
158 SVGA3DBLOCKDESC_RGBA_FP = SVGA3DBLOCKDESC_RED |
159 SVGA3DBLOCKDESC_GREEN |
160 SVGA3DBLOCKDESC_BLUE |
161 SVGA3DBLOCKDESC_ALPHA |
162 SVGA3DBLOCKDESC_FP |
163 SVGA3DBLOCKDESC_COLOR,
164 SVGA3DBLOCKDESC_UV = SVGA3DBLOCKDESC_U |
165 SVGA3DBLOCKDESC_V |
166 SVGA3DBLOCKDESC_BUMP,
167 SVGA3DBLOCKDESC_UVL = SVGA3DBLOCKDESC_UV |
168 SVGA3DBLOCKDESC_BUMP_L |
169 SVGA3DBLOCKDESC_MIXED |
170 SVGA3DBLOCKDESC_BUMP,
171 SVGA3DBLOCKDESC_UVW = SVGA3DBLOCKDESC_UV |
172 SVGA3DBLOCKDESC_W |
173 SVGA3DBLOCKDESC_BUMP,
174 SVGA3DBLOCKDESC_UVWA = SVGA3DBLOCKDESC_UVW |
175 SVGA3DBLOCKDESC_ALPHA |
176 SVGA3DBLOCKDESC_MIXED |
177 SVGA3DBLOCKDESC_BUMP,
178 SVGA3DBLOCKDESC_UVWQ = SVGA3DBLOCKDESC_U |
179 SVGA3DBLOCKDESC_V |
180 SVGA3DBLOCKDESC_W |
181 SVGA3DBLOCKDESC_Q |
182 SVGA3DBLOCKDESC_BUMP,
183 SVGA3DBLOCKDESC_L_UNORM = SVGA3DBLOCKDESC_LUMINANCE |
184 SVGA3DBLOCKDESC_UINT |
185 SVGA3DBLOCKDESC_NORM |
186 SVGA3DBLOCKDESC_COLOR,
187 SVGA3DBLOCKDESC_LA_UNORM = SVGA3DBLOCKDESC_LUMINANCE |
188 SVGA3DBLOCKDESC_ALPHA |
189 SVGA3DBLOCKDESC_UINT |
190 SVGA3DBLOCKDESC_NORM |
191 SVGA3DBLOCKDESC_COLOR,
192 SVGA3DBLOCKDESC_R_FP = SVGA3DBLOCKDESC_RED |
193 SVGA3DBLOCKDESC_FP |
194 SVGA3DBLOCKDESC_COLOR,
195 SVGA3DBLOCKDESC_RG_FP = SVGA3DBLOCKDESC_R_FP |
196 SVGA3DBLOCKDESC_GREEN |
197 SVGA3DBLOCKDESC_COLOR,
198 SVGA3DBLOCKDESC_RGB_FP = SVGA3DBLOCKDESC_RG_FP |
199 SVGA3DBLOCKDESC_BLUE |
200 SVGA3DBLOCKDESC_COLOR,
201 SVGA3DBLOCKDESC_YUV = SVGA3DBLOCKDESC_YUV_VIDEO |
202 SVGA3DBLOCKDESC_COLOR,
203 SVGA3DBLOCKDESC_AYUV = SVGA3DBLOCKDESC_ALPHA |
204 SVGA3DBLOCKDESC_YUV_VIDEO |
205 SVGA3DBLOCKDESC_COLOR,
206 SVGA3DBLOCKDESC_RGB_EXP = SVGA3DBLOCKDESC_RED |
207 SVGA3DBLOCKDESC_GREEN |
208 SVGA3DBLOCKDESC_BLUE |
209 SVGA3DBLOCKDESC_EXP |
210 SVGA3DBLOCKDESC_COLOR,
211
212 SVGA3DBLOCKDESC_COMP_TYPELESS = SVGA3DBLOCKDESC_COMPRESSED |
213 SVGA3DBLOCKDESC_TYPELESS,
214 SVGA3DBLOCKDESC_COMP_UNORM = SVGA3DBLOCKDESC_COMPRESSED |
215 SVGA3DBLOCKDESC_UINT |
216 SVGA3DBLOCKDESC_NORM |
217 SVGA3DBLOCKDESC_COLOR,
218 SVGA3DBLOCKDESC_COMP_SNORM = SVGA3DBLOCKDESC_COMPRESSED |
219 SVGA3DBLOCKDESC_SINT |
220 SVGA3DBLOCKDESC_NORM |
221 SVGA3DBLOCKDESC_COLOR,
222 SVGA3DBLOCKDESC_COMP_UNORM_SRGB = SVGA3DBLOCKDESC_COMP_UNORM |
223 SVGA3DBLOCKDESC_SRGB,
224 SVGA3DBLOCKDESC_BC1_COMP_TYPELESS = SVGA3DBLOCKDESC_BC1 |
225 SVGA3DBLOCKDESC_COMP_TYPELESS,
226 SVGA3DBLOCKDESC_BC1_COMP_UNORM = SVGA3DBLOCKDESC_BC1 |
227 SVGA3DBLOCKDESC_COMP_UNORM,
228 SVGA3DBLOCKDESC_BC1_COMP_UNORM_SRGB = SVGA3DBLOCKDESC_BC1_COMP_UNORM |
229 SVGA3DBLOCKDESC_SRGB,
230 SVGA3DBLOCKDESC_BC2_COMP_TYPELESS = SVGA3DBLOCKDESC_BC2 |
231 SVGA3DBLOCKDESC_COMP_TYPELESS,
232 SVGA3DBLOCKDESC_BC2_COMP_UNORM = SVGA3DBLOCKDESC_BC2 |
233 SVGA3DBLOCKDESC_COMP_UNORM,
234 SVGA3DBLOCKDESC_BC2_COMP_UNORM_SRGB = SVGA3DBLOCKDESC_BC2_COMP_UNORM |
235 SVGA3DBLOCKDESC_SRGB,
236 SVGA3DBLOCKDESC_BC3_COMP_TYPELESS = SVGA3DBLOCKDESC_BC3 |
237 SVGA3DBLOCKDESC_COMP_TYPELESS,
238 SVGA3DBLOCKDESC_BC3_COMP_UNORM = SVGA3DBLOCKDESC_BC3 |
239 SVGA3DBLOCKDESC_COMP_UNORM,
240 SVGA3DBLOCKDESC_BC3_COMP_UNORM_SRGB = SVGA3DBLOCKDESC_BC3_COMP_UNORM |
241 SVGA3DBLOCKDESC_SRGB,
242 SVGA3DBLOCKDESC_BC4_COMP_TYPELESS = SVGA3DBLOCKDESC_BC4 |
243 SVGA3DBLOCKDESC_COMP_TYPELESS,
244 SVGA3DBLOCKDESC_BC4_COMP_UNORM = SVGA3DBLOCKDESC_BC4 |
245 SVGA3DBLOCKDESC_COMP_UNORM,
246 SVGA3DBLOCKDESC_BC4_COMP_SNORM = SVGA3DBLOCKDESC_BC4 |
247 SVGA3DBLOCKDESC_COMP_SNORM,
248 SVGA3DBLOCKDESC_BC5_COMP_TYPELESS = SVGA3DBLOCKDESC_BC5 |
249 SVGA3DBLOCKDESC_COMP_TYPELESS,
250 SVGA3DBLOCKDESC_BC5_COMP_UNORM = SVGA3DBLOCKDESC_BC5 |
251 SVGA3DBLOCKDESC_COMP_UNORM,
252 SVGA3DBLOCKDESC_BC5_COMP_SNORM = SVGA3DBLOCKDESC_BC5 |
253 SVGA3DBLOCKDESC_COMP_SNORM,
254 SVGA3DBLOCKDESC_BC6H_COMP_TYPELESS = SVGA3DBLOCKDESC_BC6H |
255 SVGA3DBLOCKDESC_COMP_TYPELESS,
256 SVGA3DBLOCKDESC_BC6H_COMP_UF16 = SVGA3DBLOCKDESC_BC6H |
257 SVGA3DBLOCKDESC_COMPRESSED,
258 SVGA3DBLOCKDESC_BC6H_COMP_SF16 = SVGA3DBLOCKDESC_BC6H |
259 SVGA3DBLOCKDESC_COMPRESSED,
260 SVGA3DBLOCKDESC_BC7_COMP_TYPELESS = SVGA3DBLOCKDESC_BC7 |
261 SVGA3DBLOCKDESC_COMP_TYPELESS,
262 SVGA3DBLOCKDESC_BC7_COMP_UNORM = SVGA3DBLOCKDESC_BC7 |
263 SVGA3DBLOCKDESC_COMP_UNORM,
264 SVGA3DBLOCKDESC_BC7_COMP_UNORM_SRGB = SVGA3DBLOCKDESC_BC7_COMP_UNORM |
265 SVGA3DBLOCKDESC_SRGB,
266
267 SVGA3DBLOCKDESC_NV12 = SVGA3DBLOCKDESC_YUV_VIDEO |
268 SVGA3DBLOCKDESC_PLANAR_YUV |
269 SVGA3DBLOCKDESC_2PLANAR_YUV |
270 SVGA3DBLOCKDESC_COLOR,
271 SVGA3DBLOCKDESC_YV12 = SVGA3DBLOCKDESC_YUV_VIDEO |
272 SVGA3DBLOCKDESC_PLANAR_YUV |
273 SVGA3DBLOCKDESC_3PLANAR_YUV |
274 SVGA3DBLOCKDESC_COLOR,
275
276 SVGA3DBLOCKDESC_DEPTH_UINT = SVGA3DBLOCKDESC_DEPTH |
277 SVGA3DBLOCKDESC_UINT,
278 SVGA3DBLOCKDESC_DEPTH_UNORM = SVGA3DBLOCKDESC_DEPTH_UINT |
279 SVGA3DBLOCKDESC_NORM,
280 SVGA3DBLOCKDESC_DS = SVGA3DBLOCKDESC_DEPTH |
281 SVGA3DBLOCKDESC_STENCIL,
282 SVGA3DBLOCKDESC_DS_UINT = SVGA3DBLOCKDESC_DEPTH |
283 SVGA3DBLOCKDESC_STENCIL |
284 SVGA3DBLOCKDESC_UINT,
285 SVGA3DBLOCKDESC_DS_UNORM = SVGA3DBLOCKDESC_DS_UINT |
286 SVGA3DBLOCKDESC_NORM,
287 SVGA3DBLOCKDESC_DEPTH_FP = SVGA3DBLOCKDESC_DEPTH |
288 SVGA3DBLOCKDESC_FP,
289
290 SVGA3DBLOCKDESC_UV_UINT = SVGA3DBLOCKDESC_UV |
291 SVGA3DBLOCKDESC_UINT,
292 SVGA3DBLOCKDESC_UV_SNORM = SVGA3DBLOCKDESC_UV |
293 SVGA3DBLOCKDESC_SINT |
294 SVGA3DBLOCKDESC_NORM,
295 SVGA3DBLOCKDESC_UVCX_SNORM = SVGA3DBLOCKDESC_UV_SNORM |
296 SVGA3DBLOCKDESC_CX,
297 SVGA3DBLOCKDESC_UVWQ_SNORM = SVGA3DBLOCKDESC_UVWQ |
298 SVGA3DBLOCKDESC_SINT |
299 SVGA3DBLOCKDESC_NORM,
300 };
301
302
303 typedef struct SVGA3dChannelDef {
304 union {
305 uint8 blue;
306 uint8 w_bump;
307 uint8 l_bump;
308 uint8 uv_video;
309 uint8 u_video;
310 };
311 union {
312 uint8 green;
313 uint8 stencil;
314 uint8 v_bump;
315 uint8 v_video;
316 };
317 union {
318 uint8 red;
319 uint8 u_bump;
320 uint8 luminance;
321 uint8 y_video;
322 uint8 depth;
323 uint8 data;
324 };
325 union {
326 uint8 alpha;
327 uint8 q_bump;
328 uint8 exp;
329 };
330 } SVGA3dChannelDef;
331
332 struct svga3d_surface_desc {
333 SVGA3dSurfaceFormat format;
334 enum svga3d_block_desc block_desc;
335
336 SVGA3dSize block_size;
337 uint32 bytes_per_block;
338 uint32 pitch_bytes_per_block;
339
340 SVGA3dChannelDef bitDepth;
341 SVGA3dChannelDef bitOffset;
342 };
343
344 static const struct svga3d_surface_desc svga3d_surface_descs[] = {
345 {SVGA3D_FORMAT_INVALID, SVGA3DBLOCKDESC_NONE,
346 {1, 1, 1}, 0, 0,
347 {{0}, {0}, {0}, {0}},
348 {{0}, {0}, {0}, {0}}},
349
350 {SVGA3D_X8R8G8B8, SVGA3DBLOCKDESC_RGB_UNORM,
351 {1, 1, 1}, 4, 4,
352 {{8}, {8}, {8}, {0}},
353 {{0}, {8}, {16}, {24}}},
354
355 {SVGA3D_A8R8G8B8, SVGA3DBLOCKDESC_RGBA_UNORM,
356 {1, 1, 1}, 4, 4,
357 {{8}, {8}, {8}, {8}},
358 {{0}, {8}, {16}, {24}}},
359
360 {SVGA3D_R5G6B5, SVGA3DBLOCKDESC_RGB_UNORM,
361 {1, 1, 1}, 2, 2,
362 {{5}, {6}, {5}, {0}},
363 {{0}, {5}, {11}, {0}}},
364
365 {SVGA3D_X1R5G5B5, SVGA3DBLOCKDESC_RGB_UNORM,
366 {1, 1, 1}, 2, 2,
367 {{5}, {5}, {5}, {0}},
368 {{0}, {5}, {10}, {0}}},
369
370 {SVGA3D_A1R5G5B5, SVGA3DBLOCKDESC_RGBA_UNORM,
371 {1, 1, 1}, 2, 2,
372 {{5}, {5}, {5}, {1}},
373 {{0}, {5}, {10}, {15}}},
374
375 {SVGA3D_A4R4G4B4, SVGA3DBLOCKDESC_RGBA_UNORM,
376 {1, 1, 1}, 2, 2,
377 {{4}, {4}, {4}, {4}},
378 {{0}, {4}, {8}, {12}}},
379
380 {SVGA3D_Z_D32, SVGA3DBLOCKDESC_DEPTH_UNORM,
381 {1, 1, 1}, 4, 4,
382 {{0}, {0}, {32}, {0}},
383 {{0}, {0}, {0}, {0}}},
384
385 {SVGA3D_Z_D16, SVGA3DBLOCKDESC_DEPTH_UNORM,
386 {1, 1, 1}, 2, 2,
387 {{0}, {0}, {16}, {0}},
388 {{0}, {0}, {0}, {0}}},
389
390 {SVGA3D_Z_D24S8, SVGA3DBLOCKDESC_DS_UNORM,
391 {1, 1, 1}, 4, 4,
392 {{0}, {8}, {24}, {0}},
393 {{0}, {0}, {8}, {0}}},
394
395 {SVGA3D_Z_D15S1, SVGA3DBLOCKDESC_DS_UNORM,
396 {1, 1, 1}, 2, 2,
397 {{0}, {1}, {15}, {0}},
398 {{0}, {0}, {1}, {0}}},
399
400 {SVGA3D_LUMINANCE8, SVGA3DBLOCKDESC_L_UNORM,
401 {1, 1, 1}, 1, 1,
402 {{0}, {0}, {8}, {0}},
403 {{0}, {0}, {0}, {0}}},
404
405 {SVGA3D_LUMINANCE4_ALPHA4, SVGA3DBLOCKDESC_LA_UNORM,
406 {1, 1, 1}, 1, 1,
407 {{0}, {0}, {4}, {4}},
408 {{0}, {0}, {0}, {4}}},
409
410 {SVGA3D_LUMINANCE16, SVGA3DBLOCKDESC_L_UNORM,
411 {1, 1, 1}, 2, 2,
412 {{0}, {0}, {16}, {0}},
413 {{0}, {0}, {0}, {0}}},
414
415 {SVGA3D_LUMINANCE8_ALPHA8, SVGA3DBLOCKDESC_LA_UNORM,
416 {1, 1, 1}, 2, 2,
417 {{0}, {0}, {8}, {8}},
418 {{0}, {0}, {0}, {8}}},
419
420 {SVGA3D_DXT1, SVGA3DBLOCKDESC_BC1_COMP_UNORM,
421 {4, 4, 1}, 8, 8,
422 {{0}, {0}, {64}, {0}},
423 {{0}, {0}, {0}, {0}}},
424
425 {SVGA3D_DXT2, SVGA3DBLOCKDESC_BC2_COMP_UNORM,
426 {4, 4, 1}, 16, 16,
427 {{0}, {0}, {128}, {0}},
428 {{0}, {0}, {0}, {0}}},
429
430 {SVGA3D_DXT3, SVGA3DBLOCKDESC_BC2_COMP_UNORM,
431 {4, 4, 1}, 16, 16,
432 {{0}, {0}, {128}, {0}},
433 {{0}, {0}, {0}, {0}}},
434
435 {SVGA3D_DXT4, SVGA3DBLOCKDESC_BC3_COMP_UNORM,
436 {4, 4, 1}, 16, 16,
437 {{0}, {0}, {128}, {0}},
438 {{0}, {0}, {0}, {0}}},
439
440 {SVGA3D_DXT5, SVGA3DBLOCKDESC_BC3_COMP_UNORM,
441 {4, 4, 1}, 16, 16,
442 {{0}, {0}, {128}, {0}},
443 {{0}, {0}, {0}, {0}}},
444
445 {SVGA3D_BUMPU8V8, SVGA3DBLOCKDESC_UV_SNORM,
446 {1, 1, 1}, 2, 2,
447 {{0}, {8}, {8}, {0}},
448 {{0}, {8}, {0}, {0}}},
449
450 {SVGA3D_BUMPL6V5U5, SVGA3DBLOCKDESC_UVL,
451 {1, 1, 1}, 2, 2,
452 {{6}, {5}, {5}, {0}},
453 {{10}, {5}, {0}, {0}}},
454
455 {SVGA3D_BUMPX8L8V8U8, SVGA3DBLOCKDESC_UVL,
456 {1, 1, 1}, 4, 4,
457 {{8}, {8}, {8}, {0}},
458 {{16}, {8}, {0}, {0}}},
459
460 {SVGA3D_FORMAT_DEAD1, SVGA3DBLOCKDESC_NONE,
461 {1, 1, 1}, 3, 3,
462 {{8}, {8}, {8}, {0}},
463 {{16}, {8}, {0}, {0}}},
464
465 {SVGA3D_ARGB_S10E5, SVGA3DBLOCKDESC_RGBA_FP,
466 {1, 1, 1}, 8, 8,
467 {{16}, {16}, {16}, {16}},
468 {{32}, {16}, {0}, {48}}},
469
470 {SVGA3D_ARGB_S23E8, SVGA3DBLOCKDESC_RGBA_FP,
471 {1, 1, 1}, 16, 16,
472 {{32}, {32}, {32}, {32}},
473 {{64}, {32}, {0}, {96}}},
474
475 {SVGA3D_A2R10G10B10, SVGA3DBLOCKDESC_RGBA_UNORM,
476 {1, 1, 1}, 4, 4,
477 {{10}, {10}, {10}, {2}},
478 {{0}, {10}, {20}, {30}}},
479
480 {SVGA3D_V8U8, SVGA3DBLOCKDESC_UV_SNORM,
481 {1, 1, 1}, 2, 2,
482 {{0}, {8}, {8}, {0}},
483 {{0}, {8}, {0}, {0}}},
484
485 {SVGA3D_Q8W8V8U8, SVGA3DBLOCKDESC_UVWQ_SNORM,
486 {1, 1, 1}, 4, 4,
487 {{8}, {8}, {8}, {8}},
488 {{16}, {8}, {0}, {24}}},
489
490 {SVGA3D_CxV8U8, SVGA3DBLOCKDESC_UVCX_SNORM,
491 {1, 1, 1}, 2, 2,
492 {{0}, {8}, {8}, {0}},
493 {{0}, {8}, {0}, {0}}},
494
495 {SVGA3D_X8L8V8U8, SVGA3DBLOCKDESC_UVL,
496 {1, 1, 1}, 4, 4,
497 {{8}, {8}, {8}, {0}},
498 {{16}, {8}, {0}, {0}}},
499
500 {SVGA3D_A2W10V10U10, SVGA3DBLOCKDESC_UVWA,
501 {1, 1, 1}, 4, 4,
502 {{10}, {10}, {10}, {2}},
503 {{20}, {10}, {0}, {30}}},
504
505 {SVGA3D_ALPHA8, SVGA3DBLOCKDESC_A_UNORM,
506 {1, 1, 1}, 1, 1,
507 {{0}, {0}, {0}, {8}},
508 {{0}, {0}, {0}, {0}}},
509
510 {SVGA3D_R_S10E5, SVGA3DBLOCKDESC_R_FP,
511 {1, 1, 1}, 2, 2,
512 {{0}, {0}, {16}, {0}},
513 {{0}, {0}, {0}, {0}}},
514
515 {SVGA3D_R_S23E8, SVGA3DBLOCKDESC_R_FP,
516 {1, 1, 1}, 4, 4,
517 {{0}, {0}, {32}, {0}},
518 {{0}, {0}, {0}, {0}}},
519
520 {SVGA3D_RG_S10E5, SVGA3DBLOCKDESC_RG_FP,
521 {1, 1, 1}, 4, 4,
522 {{0}, {16}, {16}, {0}},
523 {{0}, {16}, {0}, {0}}},
524
525 {SVGA3D_RG_S23E8, SVGA3DBLOCKDESC_RG_FP,
526 {1, 1, 1}, 8, 8,
527 {{0}, {32}, {32}, {0}},
528 {{0}, {32}, {0}, {0}}},
529
530 {SVGA3D_BUFFER, SVGA3DBLOCKDESC_BUFFER,
531 {1, 1, 1}, 1, 1,
532 {{0}, {0}, {8}, {0}},
533 {{0}, {0}, {0}, {0}}},
534
535 {SVGA3D_Z_D24X8, SVGA3DBLOCKDESC_DEPTH_UNORM,
536 {1, 1, 1}, 4, 4,
537 {{0}, {0}, {24}, {0}},
538 {{0}, {0}, {8}, {0}}},
539
540 {SVGA3D_V16U16, SVGA3DBLOCKDESC_UV_SNORM,
541 {1, 1, 1}, 4, 4,
542 {{0}, {16}, {16}, {0}},
543 {{0}, {16}, {0}, {0}}},
544
545 {SVGA3D_G16R16, SVGA3DBLOCKDESC_RG_UNORM,
546 {1, 1, 1}, 4, 4,
547 {{0}, {16}, {16}, {0}},
548 {{0}, {16}, {0}, {0}}},
549
550 {SVGA3D_A16B16G16R16, SVGA3DBLOCKDESC_RGBA_UNORM,
551 {1, 1, 1}, 8, 8,
552 {{16}, {16}, {16}, {16}},
553 {{32}, {16}, {0}, {48}}},
554
555 {SVGA3D_UYVY, SVGA3DBLOCKDESC_YUV,
556 {2, 1, 1}, 4, 4,
557 {{8}, {0}, {8}, {0}},
558 {{0}, {0}, {8}, {0}}},
559
560 {SVGA3D_YUY2, SVGA3DBLOCKDESC_YUV,
561 {2, 1, 1}, 4, 4,
562 {{8}, {0}, {8}, {0}},
563 {{8}, {0}, {0}, {0}}},
564
565 {SVGA3D_NV12, SVGA3DBLOCKDESC_NV12,
566 {2, 2, 1}, 6, 2,
567 {{0}, {0}, {48}, {0}},
568 {{0}, {0}, {0}, {0}}},
569
570 {SVGA3D_FORMAT_DEAD2, SVGA3DBLOCKDESC_NONE,
571 {1, 1, 1}, 4, 4,
572 {{8}, {8}, {8}, {8}},
573 {{0}, {8}, {16}, {24}}},
574
575 {SVGA3D_R32G32B32A32_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
576 {1, 1, 1}, 16, 16,
577 {{32}, {32}, {32}, {32}},
578 {{64}, {32}, {0}, {96}}},
579
580 {SVGA3D_R32G32B32A32_UINT, SVGA3DBLOCKDESC_RGBA_UINT,
581 {1, 1, 1}, 16, 16,
582 {{32}, {32}, {32}, {32}},
583 {{64}, {32}, {0}, {96}}},
584
585 {SVGA3D_R32G32B32A32_SINT, SVGA3DBLOCKDESC_RGBA_SINT,
586 {1, 1, 1}, 16, 16,
587 {{32}, {32}, {32}, {32}},
588 {{64}, {32}, {0}, {96}}},
589
590 {SVGA3D_R32G32B32_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
591 {1, 1, 1}, 12, 12,
592 {{32}, {32}, {32}, {0}},
593 {{64}, {32}, {0}, {0}}},
594
595 {SVGA3D_R32G32B32_FLOAT, SVGA3DBLOCKDESC_RGB_FP,
596 {1, 1, 1}, 12, 12,
597 {{32}, {32}, {32}, {0}},
598 {{64}, {32}, {0}, {0}}},
599
600 {SVGA3D_R32G32B32_UINT, SVGA3DBLOCKDESC_RGB_UINT,
601 {1, 1, 1}, 12, 12,
602 {{32}, {32}, {32}, {0}},
603 {{64}, {32}, {0}, {0}}},
604
605 {SVGA3D_R32G32B32_SINT, SVGA3DBLOCKDESC_RGB_SINT,
606 {1, 1, 1}, 12, 12,
607 {{32}, {32}, {32}, {0}},
608 {{64}, {32}, {0}, {0}}},
609
610 {SVGA3D_R16G16B16A16_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
611 {1, 1, 1}, 8, 8,
612 {{16}, {16}, {16}, {16}},
613 {{32}, {16}, {0}, {48}}},
614
615 {SVGA3D_R16G16B16A16_UINT, SVGA3DBLOCKDESC_RGBA_UINT,
616 {1, 1, 1}, 8, 8,
617 {{16}, {16}, {16}, {16}},
618 {{32}, {16}, {0}, {48}}},
619
620 {SVGA3D_R16G16B16A16_SNORM, SVGA3DBLOCKDESC_RGBA_SNORM,
621 {1, 1, 1}, 8, 8,
622 {{16}, {16}, {16}, {16}},
623 {{32}, {16}, {0}, {48}}},
624
625 {SVGA3D_R16G16B16A16_SINT, SVGA3DBLOCKDESC_RGBA_SINT,
626 {1, 1, 1}, 8, 8,
627 {{16}, {16}, {16}, {16}},
628 {{32}, {16}, {0}, {48}}},
629
630 {SVGA3D_R32G32_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
631 {1, 1, 1}, 8, 8,
632 {{0}, {32}, {32}, {0}},
633 {{0}, {32}, {0}, {0}}},
634
635 {SVGA3D_R32G32_UINT, SVGA3DBLOCKDESC_RG_UINT,
636 {1, 1, 1}, 8, 8,
637 {{0}, {32}, {32}, {0}},
638 {{0}, {32}, {0}, {0}}},
639
640 {SVGA3D_R32G32_SINT, SVGA3DBLOCKDESC_RG_SINT,
641 {1, 1, 1}, 8, 8,
642 {{0}, {32}, {32}, {0}},
643 {{0}, {32}, {0}, {0}}},
644
645 {SVGA3D_R32G8X24_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
646 {1, 1, 1}, 8, 8,
647 {{0}, {8}, {32}, {0}},
648 {{0}, {32}, {0}, {0}}},
649
650 {SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3DBLOCKDESC_DS,
651 {1, 1, 1}, 8, 8,
652 {{0}, {8}, {32}, {0}},
653 {{0}, {32}, {0}, {0}}},
654
655 {SVGA3D_R32_FLOAT_X8X24, SVGA3DBLOCKDESC_R_FP,
656 {1, 1, 1}, 8, 8,
657 {{0}, {0}, {32}, {0}},
658 {{0}, {0}, {0}, {0}}},
659
660 {SVGA3D_X32_G8X24_UINT, SVGA3DBLOCKDESC_G_UINT,
661 {1, 1, 1}, 8, 8,
662 {{0}, {8}, {0}, {0}},
663 {{0}, {32}, {0}, {0}}},
664
665 {SVGA3D_R10G10B10A2_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
666 {1, 1, 1}, 4, 4,
667 {{10}, {10}, {10}, {2}},
668 {{20}, {10}, {0}, {30}}},
669
670 {SVGA3D_R10G10B10A2_UINT, SVGA3DBLOCKDESC_RGBA_UINT,
671 {1, 1, 1}, 4, 4,
672 {{10}, {10}, {10}, {2}},
673 {{20}, {10}, {0}, {30}}},
674
675 {SVGA3D_R11G11B10_FLOAT, SVGA3DBLOCKDESC_RGB_FP,
676 {1, 1, 1}, 4, 4,
677 {{10}, {11}, {11}, {0}},
678 {{22}, {11}, {0}, {0}}},
679
680 {SVGA3D_R8G8B8A8_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
681 {1, 1, 1}, 4, 4,
682 {{8}, {8}, {8}, {8}},
683 {{16}, {8}, {0}, {24}}},
684
685 {SVGA3D_R8G8B8A8_UNORM, SVGA3DBLOCKDESC_RGBA_UNORM,
686 {1, 1, 1}, 4, 4,
687 {{8}, {8}, {8}, {8}},
688 {{16}, {8}, {0}, {24}}},
689
690 {SVGA3D_R8G8B8A8_UNORM_SRGB, SVGA3DBLOCKDESC_RGBA_UNORM_SRGB,
691 {1, 1, 1}, 4, 4,
692 {{8}, {8}, {8}, {8}},
693 {{16}, {8}, {0}, {24}}},
694
695 {SVGA3D_R8G8B8A8_UINT, SVGA3DBLOCKDESC_RGBA_UINT,
696 {1, 1, 1}, 4, 4,
697 {{8}, {8}, {8}, {8}},
698 {{16}, {8}, {0}, {24}}},
699
700 {SVGA3D_R8G8B8A8_SINT, SVGA3DBLOCKDESC_RGBA_SINT,
701 {1, 1, 1}, 4, 4,
702 {{8}, {8}, {8}, {8}},
703 {{16}, {8}, {0}, {24}}},
704
705 {SVGA3D_R16G16_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
706 {1, 1, 1}, 4, 4,
707 {{0}, {16}, {16}, {0}},
708 {{0}, {16}, {0}, {0}}},
709
710 {SVGA3D_R16G16_UINT, SVGA3DBLOCKDESC_RG_UINT,
711 {1, 1, 1}, 4, 4,
712 {{0}, {16}, {16}, {0}},
713 {{0}, {16}, {0}, {0}}},
714
715 {SVGA3D_R16G16_SINT, SVGA3DBLOCKDESC_RG_SINT,
716 {1, 1, 1}, 4, 4,
717 {{0}, {16}, {16}, {0}},
718 {{0}, {16}, {0}, {0}}},
719
720 {SVGA3D_R32_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
721 {1, 1, 1}, 4, 4,
722 {{0}, {0}, {32}, {0}},
723 {{0}, {0}, {0}, {0}}},
724
725 {SVGA3D_D32_FLOAT, SVGA3DBLOCKDESC_DEPTH_FP,
726 {1, 1, 1}, 4, 4,
727 {{0}, {0}, {32}, {0}},
728 {{0}, {0}, {0}, {0}}},
729
730 {SVGA3D_R32_UINT, SVGA3DBLOCKDESC_R_UINT,
731 {1, 1, 1}, 4, 4,
732 {{0}, {0}, {32}, {0}},
733 {{0}, {0}, {0}, {0}}},
734
735 {SVGA3D_R32_SINT, SVGA3DBLOCKDESC_R_SINT,
736 {1, 1, 1}, 4, 4,
737 {{0}, {0}, {32}, {0}},
738 {{0}, {0}, {0}, {0}}},
739
740 {SVGA3D_R24G8_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
741 {1, 1, 1}, 4, 4,
742 {{0}, {8}, {24}, {0}},
743 {{0}, {24}, {0}, {0}}},
744
745 {SVGA3D_D24_UNORM_S8_UINT, SVGA3DBLOCKDESC_DS_UNORM,
746 {1, 1, 1}, 4, 4,
747 {{0}, {8}, {24}, {0}},
748 {{0}, {24}, {0}, {0}}},
749
750 {SVGA3D_R24_UNORM_X8, SVGA3DBLOCKDESC_R_UNORM,
751 {1, 1, 1}, 4, 4,
752 {{0}, {0}, {24}, {0}},
753 {{0}, {0}, {0}, {0}}},
754
755 {SVGA3D_X24_G8_UINT, SVGA3DBLOCKDESC_G_UINT,
756 {1, 1, 1}, 4, 4,
757 {{0}, {8}, {0}, {0}},
758 {{0}, {24}, {0}, {0}}},
759
760 {SVGA3D_R8G8_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
761 {1, 1, 1}, 2, 2,
762 {{0}, {8}, {8}, {0}},
763 {{0}, {8}, {0}, {0}}},
764
765 {SVGA3D_R8G8_UNORM, SVGA3DBLOCKDESC_RG_UNORM,
766 {1, 1, 1}, 2, 2,
767 {{0}, {8}, {8}, {0}},
768 {{0}, {8}, {0}, {0}}},
769
770 {SVGA3D_R8G8_UINT, SVGA3DBLOCKDESC_RG_UINT,
771 {1, 1, 1}, 2, 2,
772 {{0}, {8}, {8}, {0}},
773 {{0}, {8}, {0}, {0}}},
774
775 {SVGA3D_R8G8_SINT, SVGA3DBLOCKDESC_RG_SINT,
776 {1, 1, 1}, 2, 2,
777 {{0}, {8}, {8}, {0}},
778 {{0}, {8}, {0}, {0}}},
779
780 {SVGA3D_R16_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
781 {1, 1, 1}, 2, 2,
782 {{0}, {0}, {16}, {0}},
783 {{0}, {0}, {0}, {0}}},
784
785 {SVGA3D_R16_UNORM, SVGA3DBLOCKDESC_R_UNORM,
786 {1, 1, 1}, 2, 2,
787 {{0}, {0}, {16}, {0}},
788 {{0}, {0}, {0}, {0}}},
789
790 {SVGA3D_R16_UINT, SVGA3DBLOCKDESC_R_UINT,
791 {1, 1, 1}, 2, 2,
792 {{0}, {0}, {16}, {0}},
793 {{0}, {0}, {0}, {0}}},
794
795 {SVGA3D_R16_SNORM, SVGA3DBLOCKDESC_R_SNORM,
796 {1, 1, 1}, 2, 2,
797 {{0}, {0}, {16}, {0}},
798 {{0}, {0}, {0}, {0}}},
799
800 {SVGA3D_R16_SINT, SVGA3DBLOCKDESC_R_SINT,
801 {1, 1, 1}, 2, 2,
802 {{0}, {0}, {16}, {0}},
803 {{0}, {0}, {0}, {0}}},
804
805 {SVGA3D_R8_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
806 {1, 1, 1}, 1, 1,
807 {{0}, {0}, {8}, {0}},
808 {{0}, {0}, {0}, {0}}},
809
810 {SVGA3D_R8_UNORM, SVGA3DBLOCKDESC_R_UNORM,
811 {1, 1, 1}, 1, 1,
812 {{0}, {0}, {8}, {0}},
813 {{0}, {0}, {0}, {0}}},
814
815 {SVGA3D_R8_UINT, SVGA3DBLOCKDESC_R_UINT,
816 {1, 1, 1}, 1, 1,
817 {{0}, {0}, {8}, {0}},
818 {{0}, {0}, {0}, {0}}},
819
820 {SVGA3D_R8_SNORM, SVGA3DBLOCKDESC_R_SNORM,
821 {1, 1, 1}, 1, 1,
822 {{0}, {0}, {8}, {0}},
823 {{0}, {0}, {0}, {0}}},
824
825 {SVGA3D_R8_SINT, SVGA3DBLOCKDESC_R_SINT,
826 {1, 1, 1}, 1, 1,
827 {{0}, {0}, {8}, {0}},
828 {{0}, {0}, {0}, {0}}},
829
830 {SVGA3D_P8, SVGA3DBLOCKDESC_NONE,
831 {1, 1, 1}, 1, 1,
832 {{0}, {0}, {8}, {0}},
833 {{0}, {0}, {0}, {0}}},
834
835 {SVGA3D_R9G9B9E5_SHAREDEXP, SVGA3DBLOCKDESC_RGB_EXP,
836 {1, 1, 1}, 4, 4,
837 {{9}, {9}, {9}, {5}},
838 {{18}, {9}, {0}, {27}}},
839
840 {SVGA3D_R8G8_B8G8_UNORM, SVGA3DBLOCKDESC_NONE,
841 {2, 1, 1}, 4, 4,
842 {{0}, {8}, {8}, {0}},
843 {{0}, {0}, {8}, {0}}},
844
845 {SVGA3D_G8R8_G8B8_UNORM, SVGA3DBLOCKDESC_NONE,
846 {2, 1, 1}, 4, 4,
847 {{0}, {8}, {8}, {0}},
848 {{0}, {8}, {0}, {0}}},
849
850 {SVGA3D_BC1_TYPELESS, SVGA3DBLOCKDESC_BC1_COMP_TYPELESS,
851 {4, 4, 1}, 8, 8,
852 {{0}, {0}, {64}, {0}},
853 {{0}, {0}, {0}, {0}}},
854
855 {SVGA3D_BC1_UNORM_SRGB, SVGA3DBLOCKDESC_BC1_COMP_UNORM_SRGB,
856 {4, 4, 1}, 8, 8,
857 {{0}, {0}, {64}, {0}},
858 {{0}, {0}, {0}, {0}}},
859
860 {SVGA3D_BC2_TYPELESS, SVGA3DBLOCKDESC_BC2_COMP_TYPELESS,
861 {4, 4, 1}, 16, 16,
862 {{0}, {0}, {128}, {0}},
863 {{0}, {0}, {0}, {0}}},
864
865 {SVGA3D_BC2_UNORM_SRGB, SVGA3DBLOCKDESC_BC2_COMP_UNORM_SRGB,
866 {4, 4, 1}, 16, 16,
867 {{0}, {0}, {128}, {0}},
868 {{0}, {0}, {0}, {0}}},
869
870 {SVGA3D_BC3_TYPELESS, SVGA3DBLOCKDESC_BC3_COMP_TYPELESS,
871 {4, 4, 1}, 16, 16,
872 {{0}, {0}, {128}, {0}},
873 {{0}, {0}, {0}, {0}}},
874
875 {SVGA3D_BC3_UNORM_SRGB, SVGA3DBLOCKDESC_BC3_COMP_UNORM_SRGB,
876 {4, 4, 1}, 16, 16,
877 {{0}, {0}, {128}, {0}},
878 {{0}, {0}, {0}, {0}}},
879
880 {SVGA3D_BC4_TYPELESS, SVGA3DBLOCKDESC_BC4_COMP_TYPELESS,
881 {4, 4, 1}, 8, 8,
882 {{0}, {0}, {64}, {0}},
883 {{0}, {0}, {0}, {0}}},
884
885 {SVGA3D_ATI1, SVGA3DBLOCKDESC_BC4_COMP_UNORM,
886 {4, 4, 1}, 8, 8,
887 {{0}, {0}, {64}, {0}},
888 {{0}, {0}, {0}, {0}}},
889
890 {SVGA3D_BC4_SNORM, SVGA3DBLOCKDESC_BC4_COMP_SNORM,
891 {4, 4, 1}, 8, 8,
892 {{0}, {0}, {64}, {0}},
893 {{0}, {0}, {0}, {0}}},
894
895 {SVGA3D_BC5_TYPELESS, SVGA3DBLOCKDESC_BC5_COMP_TYPELESS,
896 {4, 4, 1}, 16, 16,
897 {{0}, {0}, {128}, {0}},
898 {{0}, {0}, {0}, {0}}},
899
900 {SVGA3D_ATI2, SVGA3DBLOCKDESC_BC5_COMP_UNORM,
901 {4, 4, 1}, 16, 16,
902 {{0}, {0}, {128}, {0}},
903 {{0}, {0}, {0}, {0}}},
904
905 {SVGA3D_BC5_SNORM, SVGA3DBLOCKDESC_BC5_COMP_SNORM,
906 {4, 4, 1}, 16, 16,
907 {{0}, {0}, {128}, {0}},
908 {{0}, {0}, {0}, {0}}},
909
910 {SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, SVGA3DBLOCKDESC_RGBA_UNORM,
911 {1, 1, 1}, 4, 4,
912 {{10}, {10}, {10}, {2}},
913 {{20}, {10}, {0}, {30}}},
914
915 {SVGA3D_B8G8R8A8_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
916 {1, 1, 1}, 4, 4,
917 {{8}, {8}, {8}, {8}},
918 {{0}, {8}, {16}, {24}}},
919
920 {SVGA3D_B8G8R8A8_UNORM_SRGB, SVGA3DBLOCKDESC_RGBA_UNORM_SRGB,
921 {1, 1, 1}, 4, 4,
922 {{8}, {8}, {8}, {8}},
923 {{0}, {8}, {16}, {24}}},
924
925 {SVGA3D_B8G8R8X8_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
926 {1, 1, 1}, 4, 4,
927 {{8}, {8}, {8}, {0}},
928 {{0}, {8}, {16}, {24}}},
929
930 {SVGA3D_B8G8R8X8_UNORM_SRGB, SVGA3DBLOCKDESC_RGB_UNORM_SRGB,
931 {1, 1, 1}, 4, 4,
932 {{8}, {8}, {8}, {0}},
933 {{0}, {8}, {16}, {24}}},
934
935 {SVGA3D_Z_DF16, SVGA3DBLOCKDESC_DEPTH_UNORM,
936 {1, 1, 1}, 2, 2,
937 {{0}, {0}, {16}, {0}},
938 {{0}, {0}, {0}, {0}}},
939
940 {SVGA3D_Z_DF24, SVGA3DBLOCKDESC_DEPTH_UNORM,
941 {1, 1, 1}, 4, 4,
942 {{0}, {0}, {24}, {0}},
943 {{0}, {0}, {8}, {0}}},
944
945 {SVGA3D_Z_D24S8_INT, SVGA3DBLOCKDESC_DS_UNORM,
946 {1, 1, 1}, 4, 4,
947 {{0}, {8}, {24}, {0}},
948 {{0}, {0}, {8}, {0}}},
949
950 {SVGA3D_YV12, SVGA3DBLOCKDESC_YV12,
951 {2, 2, 1}, 6, 2,
952 {{0}, {0}, {48}, {0}},
953 {{0}, {0}, {0}, {0}}},
954
955 {SVGA3D_R32G32B32A32_FLOAT, SVGA3DBLOCKDESC_RGBA_FP,
956 {1, 1, 1}, 16, 16,
957 {{32}, {32}, {32}, {32}},
958 {{64}, {32}, {0}, {96}}},
959
960 {SVGA3D_R16G16B16A16_FLOAT, SVGA3DBLOCKDESC_RGBA_FP,
961 {1, 1, 1}, 8, 8,
962 {{16}, {16}, {16}, {16}},
963 {{32}, {16}, {0}, {48}}},
964
965 {SVGA3D_R16G16B16A16_UNORM, SVGA3DBLOCKDESC_RGBA_UNORM,
966 {1, 1, 1}, 8, 8,
967 {{16}, {16}, {16}, {16}},
968 {{32}, {16}, {0}, {48}}},
969
970 {SVGA3D_R32G32_FLOAT, SVGA3DBLOCKDESC_RG_FP,
971 {1, 1, 1}, 8, 8,
972 {{0}, {32}, {32}, {0}},
973 {{0}, {32}, {0}, {0}}},
974
975 {SVGA3D_R10G10B10A2_UNORM, SVGA3DBLOCKDESC_RGBA_UNORM,
976 {1, 1, 1}, 4, 4,
977 {{10}, {10}, {10}, {2}},
978 {{20}, {10}, {0}, {30}}},
979
980 {SVGA3D_R8G8B8A8_SNORM, SVGA3DBLOCKDESC_RGBA_SNORM,
981 {1, 1, 1}, 4, 4,
982 {{8}, {8}, {8}, {8}},
983 {{16}, {8}, {0}, {24}}},
984
985 {SVGA3D_R16G16_FLOAT, SVGA3DBLOCKDESC_RG_FP,
986 {1, 1, 1}, 4, 4,
987 {{0}, {16}, {16}, {0}},
988 {{0}, {16}, {0}, {0}}},
989
990 {SVGA3D_R16G16_UNORM, SVGA3DBLOCKDESC_RG_UNORM,
991 {1, 1, 1}, 4, 4,
992 {{0}, {16}, {16}, {0}},
993 {{0}, {16}, {0}, {0}}},
994
995 {SVGA3D_R16G16_SNORM, SVGA3DBLOCKDESC_RG_SNORM,
996 {1, 1, 1}, 4, 4,
997 {{0}, {16}, {16}, {0}},
998 {{0}, {16}, {0}, {0}}},
999
1000 {SVGA3D_R32_FLOAT, SVGA3DBLOCKDESC_R_FP,
1001 {1, 1, 1}, 4, 4,
1002 {{0}, {0}, {32}, {0}},
1003 {{0}, {0}, {0}, {0}}},
1004
1005 {SVGA3D_R8G8_SNORM, SVGA3DBLOCKDESC_RG_SNORM,
1006 {1, 1, 1}, 2, 2,
1007 {{0}, {8}, {8}, {0}},
1008 {{0}, {8}, {0}, {0}}},
1009
1010 {SVGA3D_R16_FLOAT, SVGA3DBLOCKDESC_R_FP,
1011 {1, 1, 1}, 2, 2,
1012 {{0}, {0}, {16}, {0}},
1013 {{0}, {0}, {0}, {0}}},
1014
1015 {SVGA3D_D16_UNORM, SVGA3DBLOCKDESC_DEPTH_UNORM,
1016 {1, 1, 1}, 2, 2,
1017 {{0}, {0}, {16}, {0}},
1018 {{0}, {0}, {0}, {0}}},
1019
1020 {SVGA3D_A8_UNORM, SVGA3DBLOCKDESC_A_UNORM,
1021 {1, 1, 1}, 1, 1,
1022 {{0}, {0}, {0}, {8}},
1023 {{0}, {0}, {0}, {0}}},
1024
1025 {SVGA3D_BC1_UNORM, SVGA3DBLOCKDESC_BC1_COMP_UNORM,
1026 {4, 4, 1}, 8, 8,
1027 {{0}, {0}, {64}, {0}},
1028 {{0}, {0}, {0}, {0}}},
1029
1030 {SVGA3D_BC2_UNORM, SVGA3DBLOCKDESC_BC2_COMP_UNORM,
1031 {4, 4, 1}, 16, 16,
1032 {{0}, {0}, {128}, {0}},
1033 {{0}, {0}, {0}, {0}}},
1034
1035 {SVGA3D_BC3_UNORM, SVGA3DBLOCKDESC_BC3_COMP_UNORM,
1036 {4, 4, 1}, 16, 16,
1037 {{0}, {0}, {128}, {0}},
1038 {{0}, {0}, {0}, {0}}},
1039
1040 {SVGA3D_B5G6R5_UNORM, SVGA3DBLOCKDESC_RGB_UNORM,
1041 {1, 1, 1}, 2, 2,
1042 {{5}, {6}, {5}, {0}},
1043 {{0}, {5}, {11}, {0}}},
1044
1045 {SVGA3D_B5G5R5A1_UNORM, SVGA3DBLOCKDESC_RGBA_UNORM,
1046 {1, 1, 1}, 2, 2,
1047 {{5}, {5}, {5}, {1}},
1048 {{0}, {5}, {10}, {15}}},
1049
1050 {SVGA3D_B8G8R8A8_UNORM, SVGA3DBLOCKDESC_RGBA_UNORM,
1051 {1, 1, 1}, 4, 4,
1052 {{8}, {8}, {8}, {8}},
1053 {{0}, {8}, {16}, {24}}},
1054
1055 {SVGA3D_B8G8R8X8_UNORM, SVGA3DBLOCKDESC_RGB_UNORM,
1056 {1, 1, 1}, 4, 4,
1057 {{8}, {8}, {8}, {0}},
1058 {{0}, {8}, {16}, {24}}},
1059
1060 {SVGA3D_BC4_UNORM, SVGA3DBLOCKDESC_BC4_COMP_UNORM,
1061 {4, 4, 1}, 8, 8,
1062 {{0}, {0}, {64}, {0}},
1063 {{0}, {0}, {0}, {0}}},
1064
1065 {SVGA3D_BC5_UNORM, SVGA3DBLOCKDESC_BC5_COMP_UNORM,
1066 {4, 4, 1}, 16, 16,
1067 {{0}, {0}, {128}, {0}},
1068 {{0}, {0}, {0}, {0}}},
1069
1070 {SVGA3D_B4G4R4A4_UNORM, SVGA3DBLOCKDESC_RGBA_UNORM,
1071 {1, 1, 1}, 2, 2,
1072 {{4}, {4}, {4}, {4}},
1073 {{0}, {4}, {8}, {12}}},
1074
1075 {SVGA3D_BC6H_TYPELESS, SVGA3DBLOCKDESC_BC6H_COMP_TYPELESS,
1076 {4, 4, 1}, 16, 16,
1077 {{0}, {0}, {128}, {0}},
1078 {{0}, {0}, {0}, {0}}},
1079
1080 {SVGA3D_BC6H_UF16, SVGA3DBLOCKDESC_BC6H_COMP_UF16,
1081 {4, 4, 1}, 16, 16,
1082 {{0}, {0}, {128}, {0}},
1083 {{0}, {0}, {0}, {0}}},
1084
1085 {SVGA3D_BC6H_SF16, SVGA3DBLOCKDESC_BC6H_COMP_SF16,
1086 {4, 4, 1}, 16, 16,
1087 {{0}, {0}, {128}, {0}},
1088 {{0}, {0}, {0}, {0}}},
1089
1090 {SVGA3D_BC7_TYPELESS, SVGA3DBLOCKDESC_BC7_COMP_TYPELESS,
1091 {4, 4, 1}, 16, 16,
1092 {{0}, {0}, {128}, {0}},
1093 {{0}, {0}, {0}, {0}}},
1094
1095 {SVGA3D_BC7_UNORM, SVGA3DBLOCKDESC_BC7_COMP_UNORM,
1096 {4, 4, 1}, 16, 16,
1097 {{0}, {0}, {128}, {0}},
1098 {{0}, {0}, {0}, {0}}},
1099
1100 {SVGA3D_BC7_UNORM_SRGB, SVGA3DBLOCKDESC_BC7_COMP_UNORM_SRGB,
1101 {4, 4, 1}, 16, 16,
1102 {{0}, {0}, {128}, {0}},
1103 {{0}, {0}, {0}, {0}}},
1104
1105 {SVGA3D_AYUV, SVGA3DBLOCKDESC_AYUV,
1106 {1, 1, 1}, 4, 4,
1107 {{8}, {8}, {8}, {8}},
1108 {{0}, {8}, {16}, {24}}},
1109
1110 {SVGA3D_R11G11B10_TYPELESS, SVGA3DBLOCKDESC_TYPELESS,
1111 {1, 1, 1}, 4, 4,
1112 {{10}, {11}, {11}, {0}},
1113 {{22}, {11}, {0}, {0}}},
1114 };
1115
1116
1117
1118 extern const struct svga3d_surface_desc g_SVGA3dSurfaceDescs[];
1119 extern int g_SVGA3dSurfaceDescs_size;
1120
clamped_umul32(uint32 a,uint32 b)1121 static inline uint32 clamped_umul32(uint32 a, uint32 b)
1122 {
1123 uint64_t tmp = (uint64_t) a*b;
1124 return (tmp > (uint64_t) ((uint32) -1)) ? (uint32) -1 : tmp;
1125 }
1126
clamped_uadd32(uint32 a,uint32 b)1127 static inline uint32 clamped_uadd32(uint32 a, uint32 b)
1128 {
1129 uint32 c = a + b;
1130 if (c < a || c < b) {
1131 return MAX_UINT32;
1132 }
1133 return c;
1134 }
1135
1136
1137 static inline const struct svga3d_surface_desc *
svga3dsurface_get_desc(SVGA3dSurfaceFormat format)1138 svga3dsurface_get_desc(SVGA3dSurfaceFormat format)
1139 {
1140 if (format < ARRAY_SIZE(svga3d_surface_descs))
1141 return &svga3d_surface_descs[format];
1142
1143 return &svga3d_surface_descs[SVGA3D_FORMAT_INVALID];
1144 }
1145
1146 /*
1147 *----------------------------------------------------------------------
1148 *
1149 * svga3dsurface_get_mip_size --
1150 *
1151 * Given a base level size and the mip level, compute the size of
1152 * the mip level.
1153 *
1154 * Results:
1155 * See above.
1156 *
1157 * Side effects:
1158 * None.
1159 *
1160 *----------------------------------------------------------------------
1161 */
1162
1163 static inline SVGA3dSize
svga3dsurface_get_mip_size(SVGA3dSize base_level,uint32 mip_level)1164 svga3dsurface_get_mip_size(SVGA3dSize base_level, uint32 mip_level)
1165 {
1166 SVGA3dSize size;
1167
1168 size.width = max_t(uint32, base_level.width >> mip_level, 1);
1169 size.height = max_t(uint32, base_level.height >> mip_level, 1);
1170 size.depth = max_t(uint32, base_level.depth >> mip_level, 1);
1171 return size;
1172 }
1173
1174 static inline void
svga3dsurface_get_size_in_blocks(const struct svga3d_surface_desc * desc,const SVGA3dSize * pixel_size,SVGA3dSize * block_size)1175 svga3dsurface_get_size_in_blocks(const struct svga3d_surface_desc *desc,
1176 const SVGA3dSize *pixel_size,
1177 SVGA3dSize *block_size)
1178 {
1179 block_size->width = DIV_ROUND_UP(pixel_size->width,
1180 desc->block_size.width);
1181 block_size->height = DIV_ROUND_UP(pixel_size->height,
1182 desc->block_size.height);
1183 block_size->depth = DIV_ROUND_UP(pixel_size->depth,
1184 desc->block_size.depth);
1185 }
1186
1187 static inline bool
svga3dsurface_is_planar_surface(const struct svga3d_surface_desc * desc)1188 svga3dsurface_is_planar_surface(const struct svga3d_surface_desc *desc)
1189 {
1190 return (desc->block_desc & SVGA3DBLOCKDESC_PLANAR_YUV) != 0;
1191 }
1192
1193 static inline uint32
svga3dsurface_calculate_pitch(const struct svga3d_surface_desc * desc,const SVGA3dSize * size)1194 svga3dsurface_calculate_pitch(const struct svga3d_surface_desc *desc,
1195 const SVGA3dSize *size)
1196 {
1197 uint32 pitch;
1198 SVGA3dSize blocks;
1199
1200 svga3dsurface_get_size_in_blocks(desc, size, &blocks);
1201
1202 pitch = blocks.width * desc->pitch_bytes_per_block;
1203
1204 return pitch;
1205 }
1206
1207 /*
1208 *-----------------------------------------------------------------------------
1209 *
1210 * svga3dsurface_get_image_buffer_size --
1211 *
1212 * Return the number of bytes of buffer space required to store
1213 * one image of a surface, optionally using the specified pitch.
1214 *
1215 * If pitch is zero, it is assumed that rows are tightly packed.
1216 *
1217 * This function is overflow-safe. If the result would have
1218 * overflowed, instead we return MAX_UINT32.
1219 *
1220 * Results:
1221 * Byte count.
1222 *
1223 * Side effects:
1224 * None.
1225 *
1226 *-----------------------------------------------------------------------------
1227 */
1228
1229 static inline uint32
svga3dsurface_get_image_buffer_size(const struct svga3d_surface_desc * desc,const SVGA3dSize * size,uint32 pitch)1230 svga3dsurface_get_image_buffer_size(const struct svga3d_surface_desc *desc,
1231 const SVGA3dSize *size,
1232 uint32 pitch)
1233 {
1234 SVGA3dSize image_blocks;
1235 uint32 slice_size, total_size;
1236
1237 svga3dsurface_get_size_in_blocks(desc, size, &image_blocks);
1238
1239 if (svga3dsurface_is_planar_surface(desc)) {
1240 total_size = clamped_umul32(image_blocks.width,
1241 image_blocks.height);
1242 total_size = clamped_umul32(total_size, image_blocks.depth);
1243 total_size = clamped_umul32(total_size, desc->bytes_per_block);
1244 return total_size;
1245 }
1246
1247 if (pitch == 0)
1248 pitch = svga3dsurface_calculate_pitch(desc, size);
1249
1250 slice_size = clamped_umul32(image_blocks.height, pitch);
1251 total_size = clamped_umul32(slice_size, image_blocks.depth);
1252
1253 return total_size;
1254 }
1255
1256
1257 static inline uint32
svga3dsurface_get_image_offset(SVGA3dSurfaceFormat format,SVGA3dSize baseLevelSize,uint32 numMipLevels,uint32 layer,uint32 mip)1258 svga3dsurface_get_image_offset(SVGA3dSurfaceFormat format,
1259 SVGA3dSize baseLevelSize,
1260 uint32 numMipLevels,
1261 uint32 layer,
1262 uint32 mip)
1263
1264 {
1265 uint32 offset;
1266 uint32 mipChainBytes;
1267 uint32 mipChainBytesToLevel;
1268 uint32 i;
1269 const struct svga3d_surface_desc *desc;
1270 SVGA3dSize mipSize;
1271 uint32 bytes;
1272
1273 desc = svga3dsurface_get_desc(format);
1274
1275 mipChainBytes = 0;
1276 mipChainBytesToLevel = 0;
1277 for (i = 0; i < numMipLevels; i++) {
1278 mipSize = svga3dsurface_get_mip_size(baseLevelSize, i);
1279 bytes = svga3dsurface_get_image_buffer_size(desc, &mipSize, 0);
1280 mipChainBytes += bytes;
1281 if (i < mip) {
1282 mipChainBytesToLevel += bytes;
1283 }
1284 }
1285
1286 offset = mipChainBytes * layer + mipChainBytesToLevel;
1287
1288 return offset;
1289 }
1290
1291
1292 static inline uint32
svga3dsurface_get_serialized_size(SVGA3dSurfaceFormat format,SVGA3dSize base_level_size,uint32 num_mip_levels,uint32 num_layers)1293 svga3dsurface_get_serialized_size(SVGA3dSurfaceFormat format,
1294 SVGA3dSize base_level_size,
1295 uint32 num_mip_levels,
1296 uint32 num_layers)
1297 {
1298 const struct svga3d_surface_desc *desc = svga3dsurface_get_desc(format);
1299 uint64_t total_size = 0;
1300 uint32 mip;
1301
1302 for (mip = 0; mip < num_mip_levels; mip++) {
1303 SVGA3dSize size =
1304 svga3dsurface_get_mip_size(base_level_size, mip);
1305 total_size += svga3dsurface_get_image_buffer_size(desc,
1306 &size, 0);
1307 }
1308
1309 total_size *= num_layers;
1310
1311 return (total_size > (uint64_t) MAX_UINT32) ? MAX_UINT32 :
1312 (uint32) total_size;
1313 }
1314
1315
1316 /**
1317 * svga3dsurface_get_serialized_size_extended - Returns the number of bytes
1318 * required for a surface with given parameters. Support for sample count.
1319 *
1320 */
1321 static inline uint32
svga3dsurface_get_serialized_size_extended(SVGA3dSurfaceFormat format,SVGA3dSize base_level_size,uint32 num_mip_levels,uint32 num_layers,uint32 num_samples)1322 svga3dsurface_get_serialized_size_extended(SVGA3dSurfaceFormat format,
1323 SVGA3dSize base_level_size,
1324 uint32 num_mip_levels,
1325 uint32 num_layers,
1326 uint32 num_samples)
1327 {
1328 uint64_t total_size = svga3dsurface_get_serialized_size(format,
1329 base_level_size,
1330 num_mip_levels,
1331 num_layers);
1332
1333 total_size *= (num_samples > 1 ? num_samples : 1);
1334
1335 return (total_size > (uint64_t) MAX_UINT32) ? MAX_UINT32 :
1336 (uint32) total_size;
1337 }
1338
1339
1340 /**
1341 * Compute the offset (in bytes) to a pixel in an image (or volume).
1342 * 'width' is the image width in pixels
1343 * 'height' is the image height in pixels
1344 */
1345 static inline uint32
svga3dsurface_get_pixel_offset(SVGA3dSurfaceFormat format,uint32 width,uint32 height,uint32 x,uint32 y,uint32 z)1346 svga3dsurface_get_pixel_offset(SVGA3dSurfaceFormat format,
1347 uint32 width, uint32 height,
1348 uint32 x, uint32 y, uint32 z)
1349 {
1350 const struct svga3d_surface_desc *desc = svga3dsurface_get_desc(format);
1351 const uint32 bw = desc->block_size.width, bh = desc->block_size.height;
1352 const uint32 bd = desc->block_size.depth;
1353 const uint32 rowstride = DIV_ROUND_UP(width, bw) * desc->bytes_per_block;
1354 const uint32 imgstride = DIV_ROUND_UP(height, bh) * rowstride;
1355 const uint32 offset = (z / bd * imgstride +
1356 y / bh * rowstride +
1357 x / bw * desc->bytes_per_block);
1358 return offset;
1359 }
1360
1361 #endif
1362