1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <device/dram/ddr2.h>
4 #include <device/dram/ddr3.h>
5 #include <device/dram/ddr4.h>
6 #include <device/dram/ddr5.h>
7 #include <dimm_info_util.h>
8 #include <spd.h>
9 #include <tests/test.h>
10
11 #define MAX_ALLOWED_MODULE_TYPE 3
12
test_smbios_bus_width_to_spd_width_parametrized(smbios_memory_type ddr_type)13 static void test_smbios_bus_width_to_spd_width_parametrized(smbios_memory_type ddr_type)
14 {
15 /* Non-ECC variants */
16 assert_int_equal(MEMORY_BUS_WIDTH_64, smbios_bus_width_to_spd_width(ddr_type, 64, 64));
17 assert_int_equal(MEMORY_BUS_WIDTH_32, smbios_bus_width_to_spd_width(ddr_type, 32, 32));
18 assert_int_equal(MEMORY_BUS_WIDTH_16, smbios_bus_width_to_spd_width(ddr_type, 16, 16));
19 assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(ddr_type, 8, 8));
20 /* Incorrect data width. Fallback to 8-bit */
21 assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(ddr_type, 15, 15));
22
23 /* ECC variants */
24 uint8_t extension_8bits = SPD_ECC_8BIT;
25 if (ddr_type == MEMORY_TYPE_DDR5 || ddr_type == MEMORY_TYPE_LPDDR5)
26 extension_8bits = SPD_ECC_8BIT_LP5_DDR5;
27
28 assert_int_equal(MEMORY_BUS_WIDTH_64 | extension_8bits,
29 smbios_bus_width_to_spd_width(ddr_type, 64 + 8, 64));
30 assert_int_equal(MEMORY_BUS_WIDTH_32 | extension_8bits,
31 smbios_bus_width_to_spd_width(ddr_type, 32 + 8, 32));
32 assert_int_equal(MEMORY_BUS_WIDTH_16 | extension_8bits,
33 smbios_bus_width_to_spd_width(ddr_type, 16 + 8, 16));
34 assert_int_equal(MEMORY_BUS_WIDTH_8 | extension_8bits,
35 smbios_bus_width_to_spd_width(ddr_type, 8 + 8, 8));
36 /* Incorrect data width. Fallback to 8-bit */
37 assert_int_equal(MEMORY_BUS_WIDTH_8 | extension_8bits,
38 smbios_bus_width_to_spd_width(ddr_type, 15 + 8, 15));
39 }
40
test_smbios_bus_width_to_spd_width(void ** state)41 static void test_smbios_bus_width_to_spd_width(void **state)
42 {
43 smbios_memory_type memory_type[] = {
44 MEMORY_TYPE_DDR2, MEMORY_TYPE_DDR3, MEMORY_TYPE_DDR4, MEMORY_TYPE_DDR5,
45 MEMORY_TYPE_LPDDR3, MEMORY_TYPE_LPDDR4, MEMORY_TYPE_LPDDR5,
46 };
47
48 for (int i = 0; i < ARRAY_SIZE(memory_type); i++) {
49 print_message("test_smbios_bus_width_to_spd_width_parametrized(%d)\n",
50 memory_type[i]);
51 test_smbios_bus_width_to_spd_width_parametrized(memory_type[i]);
52 }
53 }
54
test_smbios_memory_size_to_mib(void ** state)55 static void test_smbios_memory_size_to_mib(void **state)
56 {
57 uint32_t extended_size;
58 uint16_t memory_size;
59
60 /* Unknown memory size */
61 assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0));
62 assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0xFFFF));
63 assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 87642));
64
65 /* 32GiB - 1MiB */
66 extended_size = 0;
67 assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
68 extended_size = 0xFFFFFFFF;
69 assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
70 extended_size = 0xDEDE6666;
71 assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
72
73 /* Memory size in KiB when MSB is flipped */
74 memory_size = 0x0 & 0x8000; /* Zero bytes */
75 assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0));
76 assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
77 assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 2345568));
78 memory_size = (31 * KiB) | 0x8000;
79 assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0));
80 assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
81 assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 72594344));
82
83 /* Value in MiB Only when memory size is not 0xFFFF and 0x7FFF and MSB is not set */
84 memory_size = 32766; /* value in MiB */
85 assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0));
86 assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
87 assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 694735));
88 }
89
test_smbios_form_factor_to_spd_mod_type_ddr(smbios_memory_type memory_type)90 static void test_smbios_form_factor_to_spd_mod_type_ddr(smbios_memory_type memory_type)
91 {
92 const smbios_memory_form_factor undefined_factors[] = {
93 MEMORY_FORMFACTOR_OTHER, MEMORY_FORMFACTOR_UNKNOWN,
94 MEMORY_FORMFACTOR_SIMM, MEMORY_FORMFACTOR_SIP,
95 MEMORY_FORMFACTOR_CHIP, MEMORY_FORMFACTOR_DIP,
96 MEMORY_FORMFACTOR_ZIP, MEMORY_FORMFACTOR_PROPRIETARY_CARD,
97 MEMORY_FORMFACTOR_TSOP, MEMORY_FORMFACTOR_ROC,
98 MEMORY_FORMFACTOR_SRIMM, MEMORY_FORMFACTOR_FBDIMM,
99 MEMORY_FORMFACTOR_DIE,
100 };
101 for (int i = 0; i < ARRAY_SIZE(undefined_factors); ++i) {
102 assert_int_equal(SPD_UNDEFINED, smbios_form_factor_to_spd_mod_type(
103 memory_type, undefined_factors[i]));
104 }
105 }
106
test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized(smbios_memory_type memory_type,const LargestIntegralType udimm_allowed[],const LargestIntegralType rdimm_allowed[],LargestIntegralType expected_module_type)107 static void test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized(
108 smbios_memory_type memory_type, const LargestIntegralType udimm_allowed[],
109 const LargestIntegralType rdimm_allowed[], LargestIntegralType expected_module_type)
110 {
111 print_message("%s(%d)\n", __func__, memory_type);
112
113 assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_DIMM),
114 udimm_allowed, MAX_ALLOWED_MODULE_TYPE);
115
116 assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_RIMM),
117 rdimm_allowed, MAX_ALLOWED_MODULE_TYPE);
118
119 assert_int_equal(expected_module_type, smbios_form_factor_to_spd_mod_type(
120 memory_type, MEMORY_FORMFACTOR_SODIMM));
121
122 test_smbios_form_factor_to_spd_mod_type_ddr(memory_type);
123 }
124
test_smbios_form_factor_to_spd_mod_type_lpddrx(smbios_memory_type memory_type)125 static void test_smbios_form_factor_to_spd_mod_type_lpddrx(smbios_memory_type memory_type)
126 {
127 print_message("%s(%d)\n", __func__, memory_type);
128 /* Form factors defined in coreboot */
129 assert_int_equal(LPX_SPD_NONDIMM, smbios_form_factor_to_spd_mod_type(
130 memory_type, MEMORY_FORMFACTOR_ROC));
131 }
132
test_smbios_form_factor_to_spd_mod_type(void ** state)133 static void test_smbios_form_factor_to_spd_mod_type(void **state)
134 {
135 const struct smbios_form_factor_test_info_ddrx {
136 smbios_memory_type memory_type;
137 const LargestIntegralType udimm_allowed[MAX_ALLOWED_MODULE_TYPE];
138 const LargestIntegralType rdimm_allowed[MAX_ALLOWED_MODULE_TYPE];
139 LargestIntegralType expected_module_type;
140 } ddrx_info[] = {
141 {
142 .memory_type = MEMORY_TYPE_DDR2,
143 .udimm_allowed = {SPD_DDR2_DIMM_TYPE_UDIMM,
144 SPD_DDR2_DIMM_TYPE_MICRO_DIMM,
145 SPD_DDR2_DIMM_TYPE_MINI_UDIMM},
146 .rdimm_allowed = {SPD_DDR2_DIMM_TYPE_RDIMM,
147 SPD_DDR2_DIMM_TYPE_MINI_RDIMM},
148 .expected_module_type = SPD_DDR2_DIMM_TYPE_SO_DIMM,
149 },
150 {
151 .memory_type = MEMORY_TYPE_DDR3,
152 .udimm_allowed = {SPD_DDR3_DIMM_TYPE_UDIMM,
153 SPD_DDR3_DIMM_TYPE_MICRO_DIMM,
154 SPD_DDR3_DIMM_TYPE_MINI_UDIMM},
155 .rdimm_allowed = {SPD_DDR3_DIMM_TYPE_RDIMM,
156 SPD_DDR3_DIMM_TYPE_MINI_RDIMM},
157 .expected_module_type = SPD_DDR3_DIMM_TYPE_SO_DIMM,
158 },
159 {
160 .memory_type = MEMORY_TYPE_DDR4,
161 .udimm_allowed = {SPD_DDR4_DIMM_TYPE_UDIMM,
162 SPD_DDR4_DIMM_TYPE_MINI_UDIMM},
163 .rdimm_allowed = {SPD_DDR4_DIMM_TYPE_RDIMM,
164 SPD_DDR4_DIMM_TYPE_MINI_RDIMM},
165 .expected_module_type = SPD_DDR4_DIMM_TYPE_SO_DIMM,
166 },
167 {.memory_type = MEMORY_TYPE_DDR5,
168 .udimm_allowed = {SPD_DDR5_DIMM_TYPE_UDIMM, SPD_DDR5_DIMM_TYPE_MINI_UDIMM},
169 .rdimm_allowed = {SPD_DDR5_DIMM_TYPE_RDIMM, SPD_DDR5_DIMM_TYPE_MINI_RDIMM},
170 .expected_module_type = SPD_DDR5_DIMM_TYPE_SODIMM},
171 };
172
173 /* Test for DDRx DIMM Modules */
174 for (int i = 0; i < ARRAY_SIZE(ddrx_info); i++)
175 test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized(
176 ddrx_info[i].memory_type, ddrx_info[i].udimm_allowed,
177 ddrx_info[i].rdimm_allowed, ddrx_info[i].expected_module_type);
178
179 smbios_memory_type lpddrx_memory_type[] = {
180 MEMORY_TYPE_LPDDR3,
181 MEMORY_TYPE_LPDDR4,
182 MEMORY_TYPE_LPDDR5,
183 };
184
185 /* Test for Lpddrx DIMM Modules */
186 for (int i = 0; i < ARRAY_SIZE(lpddrx_memory_type); i++)
187 test_smbios_form_factor_to_spd_mod_type_lpddrx(lpddrx_memory_type[i]);
188 }
189
main(void)190 int main(void)
191 {
192 const struct CMUnitTest tests[] = {
193 cmocka_unit_test(test_smbios_bus_width_to_spd_width),
194 cmocka_unit_test(test_smbios_memory_size_to_mib),
195 cmocka_unit_test(test_smbios_form_factor_to_spd_mod_type),
196 };
197
198 return cb_run_group_tests(tests, NULL, NULL);
199 }
200