1 // Copyright 2019 The Fuchsia Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 //
6 //
7 //
8
9 #include "barrier.h"
10
11 //
12 //
13 //
14
15 void
vk_barrier_compute_w_to_compute_r(VkCommandBuffer cb)16 vk_barrier_compute_w_to_compute_r(VkCommandBuffer cb)
17 {
18 static VkMemoryBarrier const mb = {
19
20 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
21 .pNext = NULL,
22 .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
23 .dstAccessMask = VK_ACCESS_SHADER_READ_BIT
24 };
25
26 vkCmdPipelineBarrier(cb,
27 VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
28 VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
29 0,
30 1,
31 &mb,
32 0,
33 NULL,
34 0,
35 NULL);
36 }
37
38 //
39 //
40 //
41
42 void
vk_barrier_compute_w_to_transfer_r(VkCommandBuffer cb)43 vk_barrier_compute_w_to_transfer_r(VkCommandBuffer cb)
44 {
45 static VkMemoryBarrier const mb = {
46
47 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
48 .pNext = NULL,
49 .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
50 .dstAccessMask = VK_ACCESS_TRANSFER_READ_BIT
51 };
52
53 vkCmdPipelineBarrier(cb,
54 VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
55 VK_PIPELINE_STAGE_TRANSFER_BIT,
56 0,
57 1,
58 &mb,
59 0,
60 NULL,
61 0,
62 NULL);
63 }
64
65 //
66 //
67 //
68
69 void
vk_barrier_transfer_w_to_compute_r(VkCommandBuffer cb)70 vk_barrier_transfer_w_to_compute_r(VkCommandBuffer cb)
71 {
72 static VkMemoryBarrier const mb = {
73
74 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
75 .pNext = NULL,
76 .srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT,
77 .dstAccessMask = VK_ACCESS_SHADER_READ_BIT
78 };
79
80 vkCmdPipelineBarrier(cb,
81 VK_PIPELINE_STAGE_TRANSFER_BIT,
82 VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
83 0,
84 1,
85 &mb,
86 0,
87 NULL,
88 0,
89 NULL);
90 }
91
92 //
93 //
94 //
95
96 void
vk_barrier_transfer_w_to_compute_w(VkCommandBuffer cb)97 vk_barrier_transfer_w_to_compute_w(VkCommandBuffer cb)
98 {
99 static VkMemoryBarrier const mb = {
100
101 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
102 .pNext = NULL,
103 .srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT,
104 .dstAccessMask = VK_ACCESS_SHADER_WRITE_BIT
105 };
106
107 vkCmdPipelineBarrier(cb,
108 VK_PIPELINE_STAGE_TRANSFER_BIT,
109 VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
110 0,
111 1,
112 &mb,
113 0,
114 NULL,
115 0,
116 NULL);
117 }
118
119 //
120 //
121 //
122
123 void
vk_barrier_compute_w_to_indirect_compute_r(VkCommandBuffer cb)124 vk_barrier_compute_w_to_indirect_compute_r(VkCommandBuffer cb)
125 {
126 static VkMemoryBarrier const mb = {
127
128 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
129 .pNext = NULL,
130 .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
131 .dstAccessMask = VK_ACCESS_INDIRECT_COMMAND_READ_BIT | //
132 VK_ACCESS_SHADER_READ_BIT
133 };
134
135 vkCmdPipelineBarrier(cb,
136 VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
137 VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT | VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
138 0,
139 1,
140 &mb,
141 0,
142 NULL,
143 0,
144 NULL);
145 }
146
147 //
148 //
149 //
150
151 void
vk_barrier_transfer_w_compute_w_to_transfer_r(VkCommandBuffer cb)152 vk_barrier_transfer_w_compute_w_to_transfer_r(VkCommandBuffer cb)
153 {
154 static VkMemoryBarrier const mb = {
155
156 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
157 .pNext = NULL,
158 .srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT | //
159 VK_ACCESS_SHADER_WRITE_BIT,
160 .dstAccessMask = VK_ACCESS_TRANSFER_READ_BIT
161 };
162
163 vkCmdPipelineBarrier(cb,
164 VK_PIPELINE_STAGE_TRANSFER_BIT | VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
165 VK_PIPELINE_STAGE_TRANSFER_BIT,
166 0,
167 1,
168 &mb,
169 0,
170 NULL,
171 0,
172 NULL);
173 }
174
175 //
176 //
177 //
178
179 void
vk_barrier_compute_w_to_host_r(VkCommandBuffer cb)180 vk_barrier_compute_w_to_host_r(VkCommandBuffer cb)
181 {
182 static VkMemoryBarrier const mb = {
183
184 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
185 .pNext = NULL,
186 .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
187 .dstAccessMask = VK_ACCESS_HOST_READ_BIT
188 };
189
190 vkCmdPipelineBarrier(cb,
191 VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
192 VK_PIPELINE_STAGE_HOST_BIT,
193 0,
194 1,
195 &mb,
196 0,
197 NULL,
198 0,
199 NULL);
200 }
201
202 //
203 //
204 //
205
206 void
vk_barrier_transfer_w_to_host_r(VkCommandBuffer cb)207 vk_barrier_transfer_w_to_host_r(VkCommandBuffer cb)
208 {
209 static VkMemoryBarrier const mb = {
210
211 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
212 .pNext = NULL,
213 .srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT,
214 .dstAccessMask = VK_ACCESS_HOST_READ_BIT
215 };
216
217 vkCmdPipelineBarrier(cb,
218 VK_PIPELINE_STAGE_TRANSFER_BIT,
219 VK_PIPELINE_STAGE_HOST_BIT,
220 0,
221 1,
222 &mb,
223 0,
224 NULL,
225 0,
226 NULL);
227 }
228
229 //
230 //
231 //
232
233 void
vk_memory_barrier(VkCommandBuffer cb,VkPipelineStageFlags src_stage,VkAccessFlags src_mask,VkPipelineStageFlags dst_stage,VkAccessFlags dst_mask)234 vk_memory_barrier(VkCommandBuffer cb,
235 VkPipelineStageFlags src_stage,
236 VkAccessFlags src_mask,
237 VkPipelineStageFlags dst_stage,
238 VkAccessFlags dst_mask)
239 {
240 VkMemoryBarrier const mb = { .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
241 .pNext = NULL,
242 .srcAccessMask = src_mask,
243 .dstAccessMask = dst_mask };
244
245 vkCmdPipelineBarrier(cb, src_stage, dst_stage, 0, 1, &mb, 0, NULL, 0, NULL);
246 }
247
248 //
249 //
250 //
251
252 void
vk_barrier_debug(VkCommandBuffer cb)253 vk_barrier_debug(VkCommandBuffer cb)
254 {
255 static VkMemoryBarrier const mb = {
256
257 .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
258 .pNext = NULL,
259 .srcAccessMask = VK_ACCESS_INDIRECT_COMMAND_READ_BIT | //
260 VK_ACCESS_INDEX_READ_BIT | //
261 VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT | //
262 VK_ACCESS_UNIFORM_READ_BIT | //
263 VK_ACCESS_INPUT_ATTACHMENT_READ_BIT | //
264 VK_ACCESS_SHADER_READ_BIT | //
265 VK_ACCESS_SHADER_WRITE_BIT | //
266 VK_ACCESS_COLOR_ATTACHMENT_READ_BIT | //
267 VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT | //
268 VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT | //
269 VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT | //
270 VK_ACCESS_TRANSFER_READ_BIT | //
271 VK_ACCESS_TRANSFER_WRITE_BIT | //
272 VK_ACCESS_HOST_READ_BIT | //
273 VK_ACCESS_HOST_WRITE_BIT,
274 .dstAccessMask = VK_ACCESS_INDIRECT_COMMAND_READ_BIT | //
275 VK_ACCESS_INDEX_READ_BIT | //
276 VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT | //
277 VK_ACCESS_UNIFORM_READ_BIT | //
278 VK_ACCESS_INPUT_ATTACHMENT_READ_BIT | //
279 VK_ACCESS_SHADER_READ_BIT | //
280 VK_ACCESS_SHADER_WRITE_BIT | //
281 VK_ACCESS_COLOR_ATTACHMENT_READ_BIT | //
282 VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT | //
283 VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT | //
284 VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT | //
285 VK_ACCESS_TRANSFER_READ_BIT | //
286 VK_ACCESS_TRANSFER_WRITE_BIT | //
287 VK_ACCESS_HOST_READ_BIT | //
288 VK_ACCESS_HOST_WRITE_BIT
289 };
290
291 vkCmdPipelineBarrier(cb,
292 VK_PIPELINE_STAGE_ALL_COMMANDS_BIT,
293 VK_PIPELINE_STAGE_ALL_COMMANDS_BIT,
294 0,
295 1,
296 &mb,
297 0,
298 NULL,
299 0,
300 NULL);
301 }
302
303 //
304 //
305 //
306