1 /* 2 * Copyright (c) 2011-2021, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file vphal_render_vebox_base.h 24 //! \brief Common interface and structure used in Vebox 25 //! \details Common interface and structure used in Vebox which are platform independent 26 //! 27 #ifndef __VPHAL_RENDER_VEBOX_BASE_H__ 28 #define __VPHAL_RENDER_VEBOX_BASE_H__ 29 30 #include "mos_os.h" 31 #include "renderhal_legacy.h" 32 #include "mhw_vebox.h" 33 #include "vphal.h" 34 #include "vphal_render_renderstate.h" 35 #include "vphal_render_common.h" 36 #include "vphal_render_vebox_iecp.h" 37 #include "vphal_render_sfc_base.h" 38 #include "vphal_render_vebox_denoise.h" 39 #include "vp_pipeline_common.h" 40 41 #define VPHAL_MAX_NUM_FFDI_SURFACES 4 //!< 2 for ADI plus additional 2 for parallel execution on HSW+ 42 #define VPHAL_NUM_FFDN_SURFACES 2 //!< Number of FFDN surfaces 43 #define VPHAL_NUM_STMM_SURFACES 2 //!< Number of STMM statistics surfaces 44 #define VPHAL_DNDI_BUFFERS_MAX 4 //!< Max DNDI buffers 45 #define VPHAL_NUM_KERNEL_VEBOX 8 //!< Max kernels called at Adv stage 46 47 #ifndef VEBOX_AUTO_DENOISE_SUPPORTED 48 #define VEBOX_AUTO_DENOISE_SUPPORTED 1 49 #endif 50 51 //! 52 //! \brief Denoise Range 53 //! 54 #define NOISEFACTOR_MAX 64 //!< Max Slider value 55 #define NOISEFACTOR_MID 32 //!< Mid Slider value, SKL+ only 56 #define NOISEFACTOR_MIN 0 //!< Min Slider value 57 58 //! 59 //! \brief Temporal Denoise Definitions 60 //! 61 #define NOISE_HISTORY_DELTA_DEFAULT 8 62 #define NOISE_HISTORY_MAX_DEFAULT 192 63 #define NOISE_NUMMOTIONPIXELS_THRESHOLD_DEFAULT 0 64 #define NOISE_LOWTEMPORALPIXELDIFF_THRESHOLD_DEFAULT 6 65 #define NOISE_TEMPORALPIXELDIFF_THRESHOLD_DEFAULT 12 66 #define NOISE_SUMABSTEMPORALDIFF_THRESHOLD_DEFAULT 128 67 #define RESOLUTION_THRESHOLD 2073600 //!< The size of 1080P 68 69 //! 70 //! \brief Spatial Denoise Definitions 71 //! 72 #define NOSIE_GNE_CHROMA_THRESHOLD 1850 73 #define NOSIE_GNE_LUMA_THRESHOLD 32000 74 75 // Pixel Range Threshold Array Denoise Definitions for SKL+ 5x5 Bilateral Filter 76 #define NOISE_BLF_RANGE_THRESHOLD_ADP_NLVL 1 77 #define NOISE_BLF_RANGE_THRESHOLD_ADP_NLVL_MIN 65536 78 #define NOISE_BLF_RANGE_THRESHOLD_ADP_NLVL_MAX 393216 79 #define NOISE_BLF_RANGE_THRESHOLD_NLVL_MI0 192 80 #define NOISE_BLF_RANGE_THRESHOLD_NLVL_MI1 320 81 #define NOISE_BLF_RANGE_THRESHOLD_NLVL_MI2 384 82 #define NOISE_BLF_RANGE_THRESHOLD_NLVL_MI3 640 83 #define NOISE_BLF_RANGE_THRESHOLD_NLVL_MI4 1024 84 #define NOISE_BLF_RANGE_THRESHOLD_NLVL_MI5 1280 85 #define NOISE_BLF_RANGE_THRADPDYNR_MIN 512 86 #define NOISE_BLF_RANGE_THRADPDYNR_MAX 2048 87 #define NOISE_BLF_RANGE_THRDYNR_MIN 256 88 #define NOISE_BLF_RANGE_THRESHOLD_S0_MIN 32 89 #define NOISE_BLF_RANGE_THRESHOLD_S0_MID 192 90 #define NOISE_BLF_RANGE_THRESHOLD_S0_MAX 384 91 #define NOISE_BLF_RANGE_THRESHOLD_S1_MIN 64 92 #define NOISE_BLF_RANGE_THRESHOLD_S1_MID 256 93 #define NOISE_BLF_RANGE_THRESHOLD_S1_MAX 576 94 #define NOISE_BLF_RANGE_THRESHOLD_S2_MIN 128 95 #define NOISE_BLF_RANGE_THRESHOLD_S2_MID 512 96 #define NOISE_BLF_RANGE_THRESHOLD_S2_MAX 896 97 #define NOISE_BLF_RANGE_THRESHOLD_S3_MIN 128 98 #define NOISE_BLF_RANGE_THRESHOLD_S3_MID 640 99 #define NOISE_BLF_RANGE_THRESHOLD_S3_MAX 1280 100 #define NOISE_BLF_RANGE_THRESHOLD_S4_MIN 128 101 #define NOISE_BLF_RANGE_THRESHOLD_S4_MID 896 102 #define NOISE_BLF_RANGE_THRESHOLD_S4_MAX 1920 103 #define NOISE_BLF_RANGE_THRESHOLD_S5_MIN 128 104 #define NOISE_BLF_RANGE_THRESHOLD_S5_MID 1280 105 #define NOISE_BLF_RANGE_THRESHOLD_S5_MAX 2560 106 #define NOISE_BLF_RANGE_THRESHOLD_S0_DEFAULT NOISE_BLF_RANGE_THRESHOLD_S0_MID 107 #define NOISE_BLF_RANGE_THRESHOLD_S1_DEFAULT NOISE_BLF_RANGE_THRESHOLD_S1_MID 108 #define NOISE_BLF_RANGE_THRESHOLD_S2_DEFAULT NOISE_BLF_RANGE_THRESHOLD_S2_MID 109 #define NOISE_BLF_RANGE_THRESHOLD_S3_DEFAULT NOISE_BLF_RANGE_THRESHOLD_S3_MID 110 #define NOISE_BLF_RANGE_THRESHOLD_S4_DEFAULT NOISE_BLF_RANGE_THRESHOLD_S4_MID 111 #define NOISE_BLF_RANGE_THRESHOLD_S5_DEFAULT NOISE_BLF_RANGE_THRESHOLD_S5_MID 112 #define NOISE_BLF_RANGE_THRESHOLD_S0_AUTO_DEFAULT 192 113 #define NOISE_BLF_RANGE_THRESHOLD_S1_AUTO_DEFAULT 320 114 #define NOISE_BLF_RANGE_THRESHOLD_S2_AUTO_DEFAULT 384 115 #define NOISE_BLF_RANGE_THRESHOLD_S3_AUTO_DEFAULT 640 116 #define NOISE_BLF_RANGE_THRESHOLD_S4_AUTO_DEFAULT 1024 117 #define NOISE_BLF_RANGE_THRESHOLD_S5_AUTO_DEFAULT 1280 118 119 // Pixel Range Weight Array Denoise Definitions for SKL+ 5x5 Bilateral Filter 120 #define NOISE_BLF_RANGE_WGTS0_MIN 16 121 #define NOISE_BLF_RANGE_WGTS0_MID 16 122 #define NOISE_BLF_RANGE_WGTS0_MAX 16 123 #define NOISE_BLF_RANGE_WGTS1_MIN 9 124 #define NOISE_BLF_RANGE_WGTS1_MID 14 125 #define NOISE_BLF_RANGE_WGTS1_MAX 15 126 #define NOISE_BLF_RANGE_WGTS2_MIN 2 127 #define NOISE_BLF_RANGE_WGTS2_MID 10 128 #define NOISE_BLF_RANGE_WGTS2_MAX 13 129 #define NOISE_BLF_RANGE_WGTS3_MIN 0 130 #define NOISE_BLF_RANGE_WGTS3_MID 5 131 #define NOISE_BLF_RANGE_WGTS3_MAX 10 132 #define NOISE_BLF_RANGE_WGTS4_MIN 0 133 #define NOISE_BLF_RANGE_WGTS4_MID 2 134 #define NOISE_BLF_RANGE_WGTS4_MAX 7 135 #define NOISE_BLF_RANGE_WGTS5_MIN 0 136 #define NOISE_BLF_RANGE_WGTS5_MID 1 137 #define NOISE_BLF_RANGE_WGTS5_MAX 4 138 #define NOISE_BLF_RANGE_WGTS0_DEFAULT NOISE_BLF_RANGE_WGTS0_MID 139 #define NOISE_BLF_RANGE_WGTS1_DEFAULT NOISE_BLF_RANGE_WGTS1_MID 140 #define NOISE_BLF_RANGE_WGTS2_DEFAULT NOISE_BLF_RANGE_WGTS2_MID 141 #define NOISE_BLF_RANGE_WGTS3_DEFAULT NOISE_BLF_RANGE_WGTS3_MID 142 #define NOISE_BLF_RANGE_WGTS4_DEFAULT NOISE_BLF_RANGE_WGTS4_MID 143 #define NOISE_BLF_RANGE_WGTS5_DEFAULT NOISE_BLF_RANGE_WGTS5_MID 144 145 // Distance Weight Matrix Denoise Definitions for SKL+ 5x5 Bilateral Filter 146 #define NOISE_BLF_DISTANCE_WGTS00_DEFAULT 12 147 #define NOISE_BLF_DISTANCE_WGTS01_DEFAULT 12 148 #define NOISE_BLF_DISTANCE_WGTS02_DEFAULT 10 149 #define NOISE_BLF_DISTANCE_WGTS10_DEFAULT 12 150 #define NOISE_BLF_DISTANCE_WGTS11_DEFAULT 11 151 #define NOISE_BLF_DISTANCE_WGTS12_DEFAULT 10 152 #define NOISE_BLF_DISTANCE_WGTS20_DEFAULT 10 153 #define NOISE_BLF_DISTANCE_WGTS21_DEFAULT 10 154 #define NOISE_BLF_DISTANCE_WGTS22_DEFAULT 8 155 156 //! 157 //! \brief Improved Deinterlacing for CNL+ 158 //! 159 #define VPHAL_VEBOX_DI_CHROMA_TDM_WEIGHT_NATUAL 0 160 #define VPHAL_VEBOX_DI_LUMA_TDM_WEIGHT_NATUAL 4 161 #define VPHAL_VEBOX_DI_SHCM_DELTA_NATUAL 5 162 #define VPHAL_VEBOX_DI_SHCM_THRESHOLD_NATUAL 255 163 #define VPHAL_VEBOX_DI_SVCM_DELTA_NATUAL 5 164 #define VPHAL_VEBOX_DI_SVCM_THRESHOLD_NATUAL 255 165 #define VPHAL_VEBOX_DI_LUMA_TDM_CORING_THRESHOLD_NATUAL 0 166 #define VPHAL_VEBOX_DI_CHROMA_TDM_CORING_THRESHOLD_NATUAL 0 167 #define VPHAL_VEBOX_DI_DIRECTION_CHECK_THRESHOLD_NATUAL 3 168 #define VPHAL_VEBOX_DI_TEARING_LOW_THRESHOLD_NATUAL 20 169 #define VPHAL_VEBOX_DI_TEARING_HIGH_THRESHOLD_NATUAL 100 170 #define VPHAL_VEBOX_DI_DIFF_CHECK_SLACK_THRESHOLD_NATUAL 15 171 #define VPHAL_VEBOX_DI_SAD_WT0_NATUAL 0 172 #define VPHAL_VEBOX_DI_SAD_WT1_NATUAL 63 173 #define VPHAL_VEBOX_DI_SAD_WT2_NATUAL 76 174 #define VPHAL_VEBOX_DI_SAD_WT3_NATUAL 89 175 #define VPHAL_VEBOX_DI_SAD_WT4_NATUAL 114 176 #define VPHAL_VEBOX_DI_SAD_WT6_NATUAL 217 177 #define VPHAL_VEBOX_DI_LPFWTLUT0_SD_NATUAL 0 178 #define VPHAL_VEBOX_DI_LPFWTLUT0_HD_NATUAL 0 179 #define VPHAL_VEBOX_DI_LPFWTLUT1_SD_NATUAL 0 180 #define VPHAL_VEBOX_DI_LPFWTLUT1_HD_NATUAL 0 181 #define VPHAL_VEBOX_DI_LPFWTLUT2_SD_NATUAL 0 182 #define VPHAL_VEBOX_DI_LPFWTLUT2_HD_NATUAL 0 183 #define VPHAL_VEBOX_DI_LPFWTLUT3_SD_NATUAL 128 184 #define VPHAL_VEBOX_DI_LPFWTLUT3_HD_NATUAL 0 185 #define VPHAL_VEBOX_DI_LPFWTLUT4_SD_NATUAL 128 186 #define VPHAL_VEBOX_DI_LPFWTLUT4_HD_NATUAL 32 187 #define VPHAL_VEBOX_DI_LPFWTLUT5_SD_NATUAL 128 188 #define VPHAL_VEBOX_DI_LPFWTLUT5_HD_NATUAL 64 189 #define VPHAL_VEBOX_DI_LPFWTLUT6_SD_NATUAL 255 190 #define VPHAL_VEBOX_DI_LPFWTLUT6_HD_NATUAL 128 191 #define VPHAL_VEBOX_DI_LPFWTLUT7_SD_NATUAL 255 192 #define VPHAL_VEBOX_DI_LPFWTLUT7_HD_NATUAL 255 193 194 //! 195 //! \brief Chroma Downsampling and Upsampling for CNL+ 196 //! 197 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE0_HORZ_OFFSET 0 198 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE1_HORZ_OFFSET 1 199 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE2_HORZ_OFFSET 0 200 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE3_HORZ_OFFSET 1 201 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE4_HORZ_OFFSET 0 202 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE5_HORZ_OFFSET 1 203 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE0_VERT_OFFSET 2 204 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE1_VERT_OFFSET 2 205 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE2_VERT_OFFSET 0 206 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE3_VERT_OFFSET 0 207 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE4_VERT_OFFSET 4 208 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE5_VERT_OFFSET 4 209 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE0_HORZ_OFFSET 0 210 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE1_HORZ_OFFSET 1 211 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE2_HORZ_OFFSET 0 212 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE3_HORZ_OFFSET 1 213 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE4_HORZ_OFFSET 0 214 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE5_HORZ_OFFSET 1 215 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE0_VERT_OFFSET 1 216 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE1_VERT_OFFSET 1 217 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE2_VERT_OFFSET 0 218 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE3_VERT_OFFSET 0 219 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE4_VERT_OFFSET 2 220 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE5_VERT_OFFSET 2 221 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE2_HORZ_OFFSET 0 222 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE3_HORZ_OFFSET 1 223 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE2_VERT_OFFSET 0 224 #define VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE3_VERT_OFFSET 0 225 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE0_HORZ_OFFSET 0 226 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE1_HORZ_OFFSET 1 227 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE2_HORZ_OFFSET 0 228 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE3_HORZ_OFFSET 1 229 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE4_HORZ_OFFSET 0 230 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE5_HORZ_OFFSET 1 231 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE0_VERT_OFFSET 1 232 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE1_VERT_OFFSET 1 233 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE2_VERT_OFFSET 0 234 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE3_VERT_OFFSET 0 235 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE4_VERT_OFFSET 2 236 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE5_VERT_OFFSET 2 237 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE2_HORZ_OFFSET 0 238 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE3_HORZ_OFFSET 1 239 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE2_VERT_OFFSET 0 240 #define VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE3_VERT_OFFSET 0 241 enum GFX_MEDIA_VEBOX_DI_OUTPUT_MODE 242 { 243 MEDIA_VEBOX_DI_OUTPUT_BOTH = 0, 244 MEDIA_VEBOX_DI_OUTPUT_PREVIOUS = 1, 245 MEDIA_VEBOX_DI_OUTPUT_CURRENT = 2 246 }; 247 248 enum MEDIASTATE_DNDI_FIELDCOPY_SELECT 249 { 250 MEDIASTATE_DNDI_DEINTERLACE = 0, 251 MEDIASTATE_DNDI_FIELDCOPY_PREV = 1, 252 MEDIASTATE_DNDI_FIELDCOPY_NEXT = 2 253 }; 254 255 struct VEBOX_SPATIAL_ATTRIBUTES_CONFIGURATION 256 { 257 // DWORD 0 258 union 259 { 260 // RangeThrStart0 261 struct 262 { 263 uint32_t RangeThrStart0; 264 }; 265 266 uint32_t Value; 267 } DW00; 268 269 // DWORD 1 270 union 271 { 272 // RangeThrStart1 273 struct 274 { 275 uint32_t RangeThrStart1; 276 }; 277 278 uint32_t Value; 279 } DW01; 280 281 // DWORD 2 282 union 283 { 284 // RangeThrStart2 285 struct 286 { 287 uint32_t RangeThrStart2; 288 }; 289 290 uint32_t Value; 291 } DW02; 292 293 // DWORD 3 294 union 295 { 296 // RangeThrStart3 297 struct 298 { 299 uint32_t RangeThrStart3; 300 }; 301 302 uint32_t Value; 303 } DW03; 304 305 // DWORD 4 306 union 307 { 308 // RangeThrStart4 309 struct 310 { 311 uint32_t RangeThrStart4; 312 }; 313 314 uint32_t Value; 315 } DW04; 316 317 // DWORD 5 318 union 319 { 320 // RangeThrStart5 321 struct 322 { 323 uint32_t RangeThrStart5; 324 }; 325 326 uint32_t Value; 327 } DW05; 328 329 // DWORD 6 330 union 331 { 332 // Reserved 333 struct 334 { 335 uint32_t Reserved; 336 }; 337 338 uint32_t Value; 339 } DW06; 340 341 // DWORD 7 342 union 343 { 344 // Reserved 345 struct 346 { 347 uint32_t Reserved; 348 }; 349 350 uint32_t Value; 351 } DW07; 352 353 // DWORD 8 354 union 355 { 356 // RangeWgt0 357 struct 358 { 359 uint32_t RangeWgt0; 360 }; 361 362 uint32_t Value; 363 } DW08; 364 365 // DWORD 9 366 union 367 { 368 // RangeWgt1 369 struct 370 { 371 uint32_t RangeWgt1; 372 }; 373 374 uint32_t Value; 375 } DW09; 376 377 // DWORD 10 378 union 379 { 380 // RangeWgt2 381 struct 382 { 383 uint32_t RangeWgt2; 384 }; 385 386 uint32_t Value; 387 } DW10; 388 389 // DWORD 11 390 union 391 { 392 // RangeWgt3 393 struct 394 { 395 uint32_t RangeWgt3; 396 }; 397 398 uint32_t Value; 399 } DW11; 400 401 // DWORD 12 402 union 403 { 404 // RangeWgt4 405 struct 406 { 407 uint32_t RangeWgt4; 408 }; 409 410 uint32_t Value; 411 } DW12; 412 413 // DWORD 13 414 union 415 { 416 // RangeWgt5 417 struct 418 { 419 uint32_t RangeWgt5; 420 }; 421 422 uint32_t Value; 423 } DW13; 424 425 // DWORD 14 426 union 427 { 428 // Reserved 429 struct 430 { 431 uint32_t Reserved; 432 }; 433 434 uint32_t Value; 435 } DW14; 436 437 // DWORD 15 438 union 439 { 440 // Reserved 441 struct 442 { 443 uint32_t Reserved; 444 }; 445 446 uint32_t Value; 447 } DW15; 448 449 // DWORD 16 - 41: DistWgt[5][5] 450 uint32_t DistWgt[5][5]; 451 452 // Padding for 32-byte alignment, VEBOX_SPATIAL_ATTRIBUTES_CONFIGURATION_G9 is 7 uint32_ts 453 uint32_t dwPad[7]; 454 }; 455 456 //! 457 //! \brief Kernel IDs 458 //! 459 typedef enum _VPHAL_VEBOX_KERNELID 460 { 461 KERNEL_RESERVED = 0, 462 KERNEL_UPDATEDNSTATE, 463 KERNEL_VEBOX_BASE_MAX, 464 } VPHAL_VEBOX_KERNELID, *PVPHAL_VEBOX_KERNELID; 465 466 //! 467 //! \brief VPHAL Query Type for Vebox Statistics Surface 468 //! 469 typedef enum _VEBOX_STAT_QUERY_TYPE 470 { 471 VEBOX_STAT_QUERY_FMD_OFFEST = 0, 472 VEBOX_STAT_QUERY_WB_OFFEST, 473 VEBOX_STAT_QUERY_GNE_OFFEST, 474 VEBOX_STAT_QUERY_STD_OFFEST, 475 VEBOX_STAT_QUERY_GCC_OFFEST, 476 VEBOX_STAT_QUERY_PER_FRAME_SIZE 477 } VEBOX_STAT_QUERY_TYPE; 478 479 #define VPHAL_VEBOX_RGB_HISTOGRAM_SIZE_PER_SLICE (256 * 4) 480 #define VPHAL_VEBOX_ACE_HISTOGRAM_SIZE_PER_FRAME_PER_SLICE (256 * 4) 481 482 //! 483 //! \brief Secure Block Copy kernel width 484 //! 485 #define SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH 64 486 487 //! 488 //! \brief Secure Block Copy kernel block height 489 //! 490 #define SECURE_BLOCK_COPY_KERNEL_BLOCK_HEIGHT 24 491 492 //! 493 //! \brief Secure Block Copy kernel inline data size 494 //! 495 #define SECURE_BLOCK_COPY_KERNEL_INLINE_SIZE (1 * sizeof(uint32_t)) 496 497 #define VPHAL_NUM_RGB_CHANNEL 3 498 #define VPHAL_NUM_FRAME_PREVIOUS_CURRENT 2 499 500 //No matter how many vebox running, the histogram slice number is always 4. 501 //When there is only one VEBOX, 0 is written to the other histogram slices by HW. 502 #define VPHAL_VEBOX_HISTOGRAM_SLICES_COUNT 4 503 504 //! 505 //! \brief Binding Table Index for Secure Block Copy kernel 506 //! 507 #define BI_SECURE_BLOCK_COPY_INPUT 0 508 #define BI_SECURE_BLOCK_COPY_OUTPUT 1 509 510 //! 511 //! \brief Binding Table index for DN Update kernel 512 //! 513 #define BI_DN_STATISTICS_SURFACE 0 514 #define BI_DN_VEBOX_STATE_SURFACE 1 515 #define BI_DN_TEMP_SURFACE 2 516 #define BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE 3 517 518 519 //! 520 //! \brief Judgement for Vebox surface height alignment 521 //! 1. _a should be an integal of power(2,n) 522 //! 523 #define IS_VEBOX_SURFACE_HEIGHT_UNALIGNED(_pSrcSurface, _a) \ 524 ((MOS_MIN((uint32_t)_pSrcSurface->dwHeight, (uint32_t)_pSrcSurface->rcMaxSrc.bottom)) & \ 525 (uint32_t)((_a) - 1)) 526 527 typedef struct VPHAL_VEBOX_STATE_PARAMS *PVPHAL_VEBOX_STATE_PARAMS; 528 typedef struct VPHAL_VEBOX_STATE_PARAMS_EXT *PVPHAL_VEBOX_STATE_PARAMS_EXT; 529 struct VPHAL_VEBOX_STATE_PARAMS 530 { VPHAL_VEBOX_STATE_PARAMSVPHAL_VEBOX_STATE_PARAMS531 VPHAL_VEBOX_STATE_PARAMS() 532 { 533 pVphalVeboxIecpParams = nullptr; 534 pVphalVeboxDndiParams = nullptr; 535 } ~VPHAL_VEBOX_STATE_PARAMSVPHAL_VEBOX_STATE_PARAMS536 virtual ~VPHAL_VEBOX_STATE_PARAMS() 537 { 538 pVphalVeboxIecpParams = nullptr; 539 pVphalVeboxDndiParams = nullptr; 540 } InitVPHAL_VEBOX_STATE_PARAMS541 virtual void Init() 542 { 543 pVphalVeboxIecpParams = nullptr; 544 pVphalVeboxDndiParams = nullptr; 545 } GetExtParamsVPHAL_VEBOX_STATE_PARAMS546 virtual PVPHAL_VEBOX_STATE_PARAMS_EXT GetExtParams() {return nullptr;} 547 548 PMHW_VEBOX_DNDI_PARAMS pVphalVeboxDndiParams; 549 PVPHAL_VEBOX_IECP_PARAMS pVphalVeboxIecpParams; 550 }; 551 552 //! 553 //! \brief Chroma Denoise params 554 //! 555 typedef struct _VPHAL_DNUV_PARAMS 556 { 557 uint32_t dwHistoryInitUV; 558 uint32_t dwHistoryDeltaUV; 559 uint32_t dwHistoryMaxUV; 560 uint32_t dwSTADThresholdU; 561 uint32_t dwSTADThresholdV; 562 uint32_t dwLTDThresholdU; 563 uint32_t dwLTDThresholdV; 564 uint32_t dwTDThresholdU; 565 uint32_t dwTDThresholdV; 566 } VPHAL_DNUV_PARAMS, *PVPHAL_DNUV_PARAMS; 567 568 typedef struct _VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS 569 { 570 PVPHAL_SURFACE pSurfInput; 571 PVPHAL_SURFACE pSurfOutput; 572 PVPHAL_SURFACE pSurfSTMM; 573 PVPHAL_SURFACE pSurfDNOutput; 574 PVPHAL_SURFACE pSurfSkinScoreOutput; 575 bool bDIEnable; 576 bool b3DlutEnable; 577 } VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS, *PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS; 578 579 //! 580 //! \brief Structure to handle DNDI sampler states 581 //! 582 typedef struct _VPHAL_SAMPLER_STATE_DNDI_PARAM 583 { 584 uint32_t dwDenoiseASDThreshold; 585 uint32_t dwDenoiseHistoryDelta; 586 uint32_t dwDenoiseMaximumHistory; 587 uint32_t dwDenoiseSTADThreshold; 588 uint32_t dwDenoiseSCMThreshold; 589 uint32_t dwDenoiseMPThreshold; 590 uint32_t dwLTDThreshold; 591 uint32_t dwTDThreshold; 592 uint32_t dwGoodNeighborThreshold; 593 bool bDNEnable; 594 bool bDIEnable; 595 bool bDNDITopFirst; 596 bool bProgressiveDN; 597 uint32_t dwFMDFirstFieldCurrFrame; 598 uint32_t dwFMDSecondFieldPrevFrame; 599 } VPHAL_SAMPLER_STATE_DNDI_PARAM, *PVPHAL_SAMPLER_STATE_DNDI_PARAM; 600 601 //! 602 //! \brief Transient Render data populated for every BLT call 603 //! 604 typedef struct VPHAL_VEBOX_RENDER_DATA *PVPHAL_VEBOX_RENDER_DATA; 605 typedef struct VPHAL_VEBOX_RENDER_DATA_EXT *PVPHAL_VEBOX_RENDER_DATA_EXT; 606 struct VPHAL_VEBOX_RENDER_DATA 607 { 608 public: VPHAL_VEBOX_RENDER_DATAVPHAL_VEBOX_RENDER_DATA609 VPHAL_VEBOX_RENDER_DATA() 610 { 611 // Flags 612 bRefValid = false; 613 bSameSamples = false; 614 bProgressive = false; 615 bDenoise = false; 616 #if VEBOX_AUTO_DENOISE_SUPPORTED 617 bAutoDenoise = false; 618 #endif 619 bChromaDenoise = false; 620 bOutOfBound = false; 621 bVDIWalker = false; 622 b2PassesCSC = false; 623 bBT2020TosRGB = false; 624 bIECP = false; 625 bColorPipe = false; 626 bProcamp = false; 627 // DNDI/Vebox 628 bDeinterlace = false; 629 bSingleField = false; 630 bTFF = false; 631 bTopField = false; 632 bBeCsc = false; 633 bFeCsc = false; 634 bCcmCsc = false; 635 bVeboxBypass = false; 636 b60fpsDi = false; 637 bQueryVariance = false; 638 // Surface Information 639 iFrame0 = 0; 640 iFrame1 = 0; 641 iCurDNIn = 0; 642 iCurDNOut = 0; 643 iCurHistIn = 0; 644 iCurHistOut = 0; 645 // Geometry 646 iBlocksX = 0; 647 iBlocksY = 0; 648 iBindingTable = 0; 649 iMediaID0 = 0; 650 iMediaID1 = 0; 651 // Perf 652 PerfTag = VPHAL_NONE; 653 // BT202 CSC destination Color Space 654 BT2020DstColorSpace = CSpace_Any; 655 // States 656 pMediaState = nullptr; 657 pVeboxState = nullptr; 658 pRenderTarget = nullptr; 659 SamplerStateParams = { }; 660 VeboxDNDIParams = { }; 661 VeboxChromaParams = { }; 662 pAlphaParams = nullptr; 663 // Batch Buffer rendering arguments 664 BbArgs = { }; 665 // Vebox output parameters 666 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP; 667 // Kernel Information 668 for (int i = 0; i < VPHAL_NUM_KERNEL_VEBOX; i++) 669 { 670 pKernelParam[i] = nullptr; 671 KernelEntry[i] = { }; 672 } 673 pDNUVParams = nullptr; 674 iCurbeLength = 0; 675 iCurbeOffset = 0; 676 iInlineLength = 0; 677 // Debug parameters 678 pKernelName = nullptr; 679 Component = COMPONENT_UNKNOWN; 680 // Memory compression flag 681 bEnableMMC = false; 682 683 pOutputTempField = nullptr; 684 685 fScaleX = 0.0f; 686 fScaleY = 0.0f; 687 688 bHdr3DLut = false; 689 bUseVEHdrSfc = false; 690 uiMaxDisplayLum = 4000; 691 uiMaxContentLevelLum = 1000; 692 hdrMode = VPHAL_HDR_MODE_NONE; 693 694 m_pVeboxStateParams = nullptr; 695 m_pVeboxIecpParams = nullptr; 696 } 697 VPHAL_VEBOX_RENDER_DATA(const VPHAL_VEBOX_RENDER_DATA&) = delete; 698 VPHAL_VEBOX_RENDER_DATA& operator=(const VPHAL_VEBOX_RENDER_DATA&) = delete; 699 virtual ~VPHAL_VEBOX_RENDER_DATA(); 700 virtual MOS_STATUS Init(); GetVeboxStateParamsVPHAL_VEBOX_RENDER_DATA701 PVPHAL_VEBOX_STATE_PARAMS GetVeboxStateParams() { return m_pVeboxStateParams;} GetVeboxIECPParamsVPHAL_VEBOX_RENDER_DATA702 PVPHAL_VEBOX_IECP_PARAMS GetVeboxIECPParams() { return m_pVeboxIecpParams; } GetExtDataVPHAL_VEBOX_RENDER_DATA703 virtual PVPHAL_VEBOX_RENDER_DATA_EXT GetExtData() { return nullptr;} 704 705 // Flags 706 bool bRefValid; 707 bool bSameSamples; 708 bool bProgressive; 709 bool bDenoise; 710 #if VEBOX_AUTO_DENOISE_SUPPORTED 711 bool bAutoDenoise; 712 #endif 713 bool bChromaDenoise; 714 bool bOutOfBound; 715 bool bVDIWalker; 716 bool b2PassesCSC; 717 bool bBT2020TosRGB; 718 bool bIECP; 719 bool bColorPipe; 720 bool bProcamp; 721 722 // DNDI/Vebox 723 bool bDeinterlace; 724 bool bSingleField; 725 bool bTFF; 726 bool bTopField; 727 bool bBeCsc; 728 bool bFeCsc; 729 bool bCcmCsc; 730 bool bVeboxBypass; 731 bool b60fpsDi; 732 bool bQueryVariance; 733 734 // Surface Information 735 int32_t iFrame0; 736 int32_t iFrame1; 737 int32_t iCurDNIn; 738 int32_t iCurDNOut; 739 int32_t iCurHistIn; 740 int32_t iCurHistOut; 741 742 // Geometry 743 int32_t iBlocksX; 744 int32_t iBlocksY; 745 int32_t iBindingTable; 746 int32_t iMediaID0; 747 int32_t iMediaID1; 748 749 // Perf 750 VPHAL_PERFTAG PerfTag; 751 752 // BT202 CSC destination Color Space 753 VPHAL_CSPACE BT2020DstColorSpace; 754 755 // States 756 PRENDERHAL_MEDIA_STATE pMediaState; 757 PMHW_VEBOX_HEAP_STATE pVeboxState; 758 PVPHAL_SURFACE pRenderTarget; 759 760 MHW_SAMPLER_STATE_PARAM SamplerStateParams; 761 762 MHW_VEBOX_DNDI_PARAMS VeboxDNDIParams; 763 764 MHW_VEBOX_CHROMA_PARAMS VeboxChromaParams; 765 766 PVPHAL_ALPHA_PARAMS pAlphaParams; 767 768 // Batch Buffer rendering arguments 769 VPHAL_ADVPROC_BB_ARGS BbArgs; 770 771 // Vebox output parameters 772 VPHAL_OUTPUT_PIPE_MODE OutputPipe; 773 774 // Kernel Information 775 PRENDERHAL_KERNEL_PARAM pKernelParam[VPHAL_NUM_KERNEL_VEBOX]; 776 Kdll_CacheEntry KernelEntry[VPHAL_NUM_KERNEL_VEBOX]; 777 PVPHAL_DNUV_PARAMS pDNUVParams; 778 int32_t iCurbeLength; 779 int32_t iCurbeOffset; 780 int32_t iInlineLength; 781 782 // Debug parameters 783 char* pKernelName; //!< Kernel used for current rendering 784 785 // Current component 786 MOS_COMPONENT Component; 787 788 // Memory compression flag 789 bool bEnableMMC; //!< Enable memory compression flag 790 791 // Temp surface for the field won't be output 792 PVPHAL_SURFACE pOutputTempField; 793 794 // Scaling ratio from source to render target 795 // Scaling ratio is needed to determine if SFC or VEBOX is used 796 float fScaleX; //!< X Scaling ratio 797 float fScaleY; //!< Y Scaling ratio 798 799 bool bHdr3DLut; //!< Enable 3DLut to process HDR 800 bool bUseVEHdrSfc; //!< Use SFC to perform CSC/Scaling for HDR content 801 uint32_t uiMaxDisplayLum; //!< Maximum Display Luminance 802 uint32_t uiMaxContentLevelLum; //!< Maximum Content Level Luminance 803 VPHAL_HDR_MODE hdrMode; 804 805 protected: 806 // Vebox State Parameters 807 PVPHAL_VEBOX_STATE_PARAMS m_pVeboxStateParams; //!< auto allocated param instance for set/submit VEBOX cmd 808 // Vebox IECP Parameters 809 PVPHAL_VEBOX_IECP_PARAMS m_pVeboxIecpParams; //!< auto allocated param instance for set/submit VEBOX IECP cmd 810 }; 811 812 //! 813 //! \brief VPHAL VEBOX/IECP State 814 //! 815 typedef class VPHAL_VEBOX_STATE *PVPHAL_VEBOX_STATE; 816 class VPHAL_VEBOX_STATE : public RenderState 817 { 818 public: 819 VPHAL_VEBOX_STATE( 820 PMOS_INTERFACE pOsInterface, 821 PMHW_VEBOX_INTERFACE pVeboxInterface, 822 PMHW_SFC_INTERFACE pSfcInterface, 823 PRENDERHAL_INTERFACE pRenderHal, 824 PVPHAL_VEBOX_EXEC_STATE pVeboxExecState, 825 PVPHAL_RNDR_PERF_DATA pPerfData, 826 const VPHAL_DNDI_CACHE_CNTL &dndiCacheCntl, 827 MOS_STATUS *peStatus); 828 VPHAL_VEBOX_STATE(const VPHAL_VEBOX_STATE&) = delete; 829 VPHAL_VEBOX_STATE& operator=(const VPHAL_VEBOX_STATE&) = delete; 830 virtual ~VPHAL_VEBOX_STATE(); 831 AllocateExecRenderData()832 virtual MOS_STATUS AllocateExecRenderData() 833 { 834 if (!m_pLastExecRenderData) 835 { 836 m_pLastExecRenderData = MOS_New(VPHAL_VEBOX_RENDER_DATA); 837 if (!m_pLastExecRenderData) 838 { 839 return MOS_STATUS_NO_SPACE; 840 } 841 m_pLastExecRenderData->Init(); 842 } 843 return MOS_STATUS_SUCCESS; 844 } GetLastExecRenderData()845 virtual PVPHAL_VEBOX_RENDER_DATA GetLastExecRenderData() { if (!m_pLastExecRenderData) { AllocateExecRenderData(); } return m_pLastExecRenderData; } 846 847 //! 848 //! \brief copy Report data 849 //! \details copy Report data from this render 850 //! \param [out] pReporting 851 //! pointer to the Report data to copy data to 852 //! 853 void CopyReporting(VphalFeatureReport *pReporting); 854 855 //! 856 //! \brief copy Report data about features 857 //! \details copy Report data from this render 858 //! \param [out] pReporting 859 //! pointer to the Report data to copy data to 860 //! 861 void CopyFeatureReporting(VphalFeatureReport *pReporting); 862 863 //! 864 //! \brief copy Report data about resources 865 //! \details copy Report data from this render 866 //! \param [out] pReporting 867 //! pointer to the Report data to copy data to 868 //! 869 void CopyResourceReporting(VphalFeatureReport *pReporting); 870 871 //! 872 //! \brief Allocate sfc temp surface for Vebox output 873 //! \details Allocate sfc temp surface for Vebox output 874 //! \param VphalRenderer* pRenderer 875 //! [in,out] VPHAL renderer pointer 876 //! \param PCVPHAL_RENDER_PARAMS pcRenderParams 877 //! [in] Const pointer to VPHAL render parameter 878 //! \param PVPHAL_VEBOX_RENDER_DATA pRenderData 879 //! [in] pointer to VPHAL VEBOX render parameter 880 //! \param PVPHAL_SURFACE pInSurface 881 //! [in] Pointer to input surface 882 //! \param PVPHAL_SURFACE pOutSurface 883 //! [in] Pointer to output surface 884 //! \return MOS_STATUS 885 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 886 //! 887 MOS_STATUS AllocateSfcTempSurfaces( 888 VphalRenderer *pRenderer, 889 PCVPHAL_RENDER_PARAMS pcRenderParams, 890 PVPHAL_VEBOX_RENDER_DATA pRenderData, 891 PVPHAL_SURFACE pInSurface, 892 PVPHAL_SURFACE pOutSurface); 893 894 //! 895 //! \brief Allocate sfc 2pass 2nd time surface for Vebox output, only for multi-lays. 896 //! \details Allocate sfc temp surface for Vebox output 897 //! \param VphalRenderer* pRenderer 898 //! [in,out] VPHAL renderer pointer 899 //! \param PCVPHAL_RENDER_PARAMS pcRenderParams 900 //! [in] Const pointer to VPHAL render parameter 901 //! \param PVPHAL_VEBOX_RENDER_DATA pRenderData 902 //! [in] pointer to VPHAL VEBOX render parameter 903 //! \param PVPHAL_SURFACE pInSurface 904 //! [in] Pointer to input surface 905 //! \param PVPHAL_SURFACE pOutSurface 906 //! [in] Pointer to output surface 907 //! \return MOS_STATUS 908 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 909 //! 910 MOS_STATUS AllocateSfc2ndTempSurfaces( 911 VphalRenderer *pRenderer, 912 PCVPHAL_RENDER_PARAMS pcRenderParams, 913 PVPHAL_VEBOX_RENDER_DATA pRenderData, 914 PVPHAL_SURFACE pInSurface, 915 PVPHAL_SURFACE pOutSurface); 916 917 void DestorySfcTempSurface(); 918 919 // External components 920 PMHW_VEBOX_INTERFACE m_pVeboxInterface; //!< Pointer to MHW Vebox Structure Interface 921 PMHW_SFC_INTERFACE m_pSfcInterface; //!< Pointer to SFC Structure Interface 922 Kdll_State *m_pKernelDllState; //!< Kernel DLL state 923 VpKernelID m_currKernelId; //!< Kernel ID 924 VPHAL_SURFACE m_BT2020CSCTempSurface; //!< BT2020 temp surface for Vebox Gen9+ 925 VphalSfcState *m_sfcPipeState; //!< SFC state 926 927 // Execution state 928 PVPHAL_VEBOX_RENDER_DATA m_pLastExecRenderData; //!< Cache last render operation info 929 PVPHAL_VEBOX_EXEC_STATE m_pVeboxExecState; //!< Vebox Execution State 930 931 // CSC in VEBOX params 932 VPHAL_CSPACE CscOutputCspace; //!< Cspace of Output Frame 933 VPHAL_CSPACE CscInputCspace; //!< Cspace of Input frame 934 float fCscCoeff[9]; //!< [3x3] Coeff matrix for CSC 935 float fCscInOffset[3]; //!< [3x1] Input Offset matrix for CSC 936 float fCscOutOffset[3]; //!< [3x1] Output Offset matrix for CSC 937 938 // Front End CSC in VEBOX params 939 float *fFeCscCoeff; //!< [3x3] Coeff matrix for CSC 940 float *fFeCscInOffset; //!< [3x1] Input Offset matrix for CSC 941 float *fFeCscOutOffset; //!< [3x1] Output Offset matrix for CSC 942 943 // Dynamic linking filter 944 Kdll_FilterEntry SearchFilter[2]; 945 946 // Threshold for discontinuity check 947 int32_t iSameSampleThreshold; 948 949 // Resources 950 VPHAL_SURFACE *m_currentSurface; //!< Current frame 951 VPHAL_SURFACE *m_previousSurface; //!< Previous frame 952 RENDERHAL_SURFACE RenderHalCurrentSurface; //!< Current frame for MHW 953 RENDERHAL_SURFACE RenderHalPreviousSurface; //!< Previous frame for MHW 954 955 union 956 { 957 // DNDI/VEBOX 958 struct 959 { 960 VPHAL_SURFACE *FFDISurfaces[VPHAL_MAX_NUM_FFDI_SURFACES]; //!< FFDI output surface structure 961 }; 962 }; 963 VPHAL_SURFACE VeboxRGBHistogram = {}; //!< VEBOX RGB Histogram surface for Vebox Gen9+ 964 VPHAL_SURFACE VeboxStatisticsSurface; //!< Statistics Surface for VEBOX 965 RENDERHAL_SURFACE RenderHalVeboxStatisticsSurface; //!< Statistics Surface for VEBOX for MHW 966 #if VEBOX_AUTO_DENOISE_SUPPORTED 967 VPHAL_SURFACE VeboxTempSurface; //!< Temp Surface for Vebox State update kernels 968 VPHAL_SURFACE VeboxSpatialAttributesConfigurationSurface; //!< Spatial Attributes Configuration Surface for DN kernel Gen9+ 969 RENDERHAL_SURFACE RenderHalVeboxSpatialAttributesConfigurationSurface; //!< Spatial Attributes Configuration Surface for DN kernel Gen9+ for MHW 970 VPHAL_SURFACE VeboxHeapResource; //!< Vebox Heap resource for DN kernel 971 VPHAL_SURFACE tmpResource; //!< Temp resource for DN kernel 972 RENDERHAL_SURFACE RenderHalVeboxHeapResource; //!< Vebox Heap resource for DN kernel for MHW 973 RENDERHAL_SURFACE RenderHalTmpResource; //!< Temp resource for DN kernel for MHW 974 #endif 975 union 976 { 977 // DNDI 978 struct 979 { 980 VPHAL_SURFACE *FFDNSurfaces[VPHAL_NUM_FFDN_SURFACES]; //!< Denoise output surfaces 981 VPHAL_SURFACE STMMSurfaces[VPHAL_NUM_STMM_SURFACES]; //!< Motion history (DI) 982 }; 983 }; 984 985 // BNE system memory pointer 986 uint8_t* pBNEData; //!< System memory for GNE calculating 987 uint32_t dwBNESize; //!< System memory size for BNE surface 988 989 // Statistics 990 uint32_t dwVeboxPerBlockStatisticsWidth; //!< Per block statistics width 991 uint32_t dwVeboxPerBlockStatisticsHeight; //!< Per block statistics height 992 993 // Cache attributes 994 VPHAL_DNDI_CACHE_CNTL DnDiSurfMemObjCtl; //!< Surface memory object control 995 996 // Batch Buffers 997 int32_t iBatchBufferCount; //!< Number of batch buffers 998 MHW_BATCH_BUFFER BatchBuffer[VPHAL_DNDI_BUFFERS_MAX]; //!< Batch buffers 999 VPHAL_BATCH_BUFFER_PARAMS BufferParam[VPHAL_DNDI_BUFFERS_MAX]; //!< Batch buffer parameters 1000 1001 // Denoise output control 1002 int32_t iCurDNIndex; //!< Current index of Denoise Output 1003 1004 // DNDI 1005 struct 1006 { 1007 int32_t iNumFFDISurfaces; //!< Actual number of FFDISurfaces. Is <= VPHAL_NUM_FFDI_SURFACES 1008 int32_t iCurStmmIndex; //!< Current index of Motion History Buffer 1009 uint32_t dwGlobalNoiseLevel; //!< Global Noise Level 1010 }; 1011 1012 // Chroma DN 1013 struct 1014 { 1015 int32_t iCurHistIndex; //!< Current index of Chroma Denoise History Buffer 1016 uint32_t dwGlobalNoiseLevelU; //!< Global Noise Level for U 1017 uint32_t dwGlobalNoiseLevelV; //!< Global Noise Level for V 1018 bool bFirstFrame; //!< First frame case for Chroma DN 1019 }; 1020 1021 // timestamps for DI output control 1022 int32_t iCurFrameID; //!< Current Frame ID 1023 int32_t iPrvFrameID; //!< Previous Frame ID 1024 1025 // for Pre-Processing 1026 bool bSameSamples; //!< True for second DI 1027 int32_t iCallID; //!< Current render call ID; 1028 bool bDNEnabled; //!< DN was enabled in the previous call 1029 bool bDIEnabled; //!< DI was enabled in the previous call 1030 1031 // Platform dependent states 1032 PRENDERHAL_KERNEL_PARAM pKernelParamTable; //!< Kernel Parameter table 1033 1034 // HW Params 1035 uint32_t dwKernelUpdate; //!< Enable/Disable kernel update 1036 1037 uint32_t dwCompBypassMode; //!< Bypass Composition Optimization read from User feature keys 1038 1039 // Debug parameters 1040 char* pKernelName; //!< Kernel Used for current rendering 1041 bool bNullHwRenderDnDi; //!< Null rendering for DnDi function 1042 1043 bool bEnableMMC; //!< Memory compression enbale flag - read from User feature keys 1044 bool bDisableTemporalDenoiseFilter; //!< Temporal denoise filter disable flag - read from User feature keys 1045 bool bDisableTemporalDenoiseFilterUserKey; //!< Backup temporal denoise filter disable flag - read from User feature keys 1046 1047 // S3D channel 1048 uint32_t uiCurrentChannel; //!< 0=StereoLeft or nonStereo, 1=StereoRight. N/A in nonStereo 1049 1050 MOS_GPU_CONTEXT RenderGpuContext; //!< Render GPU context 1051 1052 VPHAL_SURFACE Vebox3DLookUpTables = {}; 1053 PVPHAL_SURFACE m_sfcTempSurface = nullptr; 1054 PVPHAL_SURFACE m_sfc2ndTempSurface = nullptr; 1055 1056 VphalHVSDenoiser *m_hvsDenoiser; //!< Human Vision System Based Denoiser - Media Kernel to generate DN parameter 1057 uint8_t *m_hvsKernelBinary; //!< Human Vision System Based Denoiser - Pointer to HVS kernel Binary 1058 uint32_t m_hvsKernelBinarySize; //!< Human Vision System Based Denoiser - Size of HVS kernel Binary 1059 1060 bool bPhasedSubmission; //!< Flag to indicate if secondary command buffers are submitted together (Win) or separately (Linux) 1061 1062 protected: 1063 PVPHAL_VEBOX_IECP_RENDERER m_IECP; //!< pointer to IECP Renderer module, which contains more filters like TCC, STE. 1064 1065 public: 1066 //! 1067 //! \brief Initialize VEBOX state 1068 //! \param [in] pSettings 1069 //! Pointer to VPHAL settings 1070 //! \param [in] pKernelDllState 1071 //! Pointer to KDLL state 1072 //! \return MOS_STATUS 1073 //! MOS_STATUS_SUCCESS if successful, otherwise failed 1074 //! 1075 virtual MOS_STATUS Initialize( 1076 const VphalSettings *pSettings, 1077 Kdll_State *pKernelDllState); 1078 1079 virtual void Destroy(); 1080 1081 //! 1082 //! \brief RenderState Rendering 1083 //! \details VpHal RenderState entry 1084 //! \param [in] pcRenderParams 1085 //! Pointer to Render parameters 1086 //! \param [in,out] pRenderPassData 1087 //! Pointer to Render data 1088 //! \return MOS_STATUS 1089 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1090 //! 1091 virtual MOS_STATUS Render( 1092 PCVPHAL_RENDER_PARAMS pcRenderParams, 1093 RenderpassData *pRenderPassData); 1094 1095 //! 1096 //! \brief Set DI output frame 1097 //! \details Choose 2nd Field of Previous frame or 1st Field of Current frame 1098 //! or both frames 1099 //! \param [in] pRenderData 1100 //! Pointer to Render data 1101 //! \param [in] pVeboxState 1102 //! Pointer to Vebox State 1103 //! \param [in] pVeboxMode 1104 //! Pointer to Vebox Mode 1105 //! \return GFX_MEDIA_VEBOX_DI_OUTPUT_MODE 1106 //! Return Previous/Current/Both frames 1107 //! 1108 virtual GFX_MEDIA_VEBOX_DI_OUTPUT_MODE SetDIOutputFrame( 1109 PVPHAL_VEBOX_RENDER_DATA pRenderData, 1110 PVPHAL_VEBOX_STATE pVeboxState, 1111 PMHW_VEBOX_MODE pVeboxMode); 1112 1113 //! 1114 //! \brief Judge if render is needed 1115 //! \details Check Render parameter/data if render needed 1116 //! \param [in] pcRenderParams 1117 //! Pointer to Render parameters 1118 //! \param [in,out] pRenderPassData 1119 //! Pointer to Render data 1120 //! \return bool 1121 //! true if meeded. Else false 1122 //! 1123 virtual bool IsNeeded( 1124 PCVPHAL_RENDER_PARAMS pcRenderParams, 1125 RenderpassData *pRenderPassData) = 0; 1126 1127 //! 1128 //! \brief Judge if render support multiple stream rendering 1129 //! \details Judge if render support multiple stream rendering 1130 //! \return bool 1131 //! true if supported. Else false 1132 //! IsMultipleStreamSupported()1133 virtual bool IsMultipleStreamSupported() 1134 { 1135 // VEBOX render is for single layer only. 1136 return false; 1137 } 1138 1139 virtual MOS_STATUS AllocateResources() = 0; 1140 1141 virtual void FreeResources() = 0; 1142 1143 //! 1144 //! \brief Setup kernels for Vebox auto mode features 1145 //! \details Setup kernels that co-operate with Vebox auto mode features 1146 //! \param [in] iKDTIndex 1147 //! Index to Kernel Parameter Array (defined platform specific) 1148 //! \return MOS_STATUS 1149 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1150 //! 1151 virtual MOS_STATUS SetupVeboxKernel( 1152 int32_t iKDTIndex) = 0; 1153 1154 virtual MOS_STATUS SetupDiIecpState( 1155 bool bDiScdEnable, 1156 PMHW_VEBOX_DI_IECP_CMD_PARAMS 1157 pVeboxDiIecpCmdParams) = 0; 1158 1159 virtual void SetupSurfaceStates( 1160 bool bDiVarianceEnable, 1161 PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS 1162 pVeboxSurfaceStateCmdParams) = 0; 1163 1164 virtual MOS_STATUS VeboxQueryStatLayout( 1165 VEBOX_STAT_QUERY_TYPE QueryType, 1166 uint32_t* pQuery) = 0; 1167 //! 1168 //! \brief Update RenderGpuContext 1169 //! \details Update RenderGpuContext 1170 //! \param [in] renderGpuContext 1171 //! \return MOS_STATUS 1172 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1173 //! 1174 virtual MOS_STATUS UpdateRenderGpuContext( 1175 MOS_GPU_CONTEXT renderGpuContext); 1176 1177 #if VEBOX_AUTO_DENOISE_SUPPORTED 1178 //! 1179 //! \brief Load update kernel curbe data 1180 //! \details Loads the static data of update kernel to curbe 1181 //! \param [out] iCurbeOffsetOutDN 1182 //! Pointer to DN kernel curbe offset 1183 //! \return MOS_STATUS 1184 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1185 //! 1186 virtual MOS_STATUS LoadUpdateDenoiseKernelStaticData( 1187 int32_t* iCurbeOffsetOutDN) = 0; 1188 1189 //! 1190 //! \brief Setup surface states for Denoise 1191 //! \details Setup Surface State for Vebox States Auto DN kernel 1192 //! \return MOS_STATUS 1193 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1194 //! 1195 virtual MOS_STATUS SetupSurfaceStatesForDenoise() = 0; 1196 #endif 1197 1198 virtual MOS_STATUS PostCompRender( 1199 PVPHAL_VEBOX_EXEC_STATE pVeboxExecState, 1200 PVPHAL_SURFACE pPriSurface); 1201 1202 virtual bool IsFormatSupported( 1203 PVPHAL_SURFACE pSrcSurface) = 0; 1204 1205 virtual bool IsRTFormatSupported( 1206 PVPHAL_SURFACE pSrcSurface, 1207 PVPHAL_SURFACE pRTSurface) = 0; 1208 1209 virtual bool IsDnFormatSupported( 1210 PVPHAL_SURFACE pSrcSurface) = 0; 1211 1212 virtual bool IsDiFormatSupported( 1213 PVPHAL_SURFACE pSrcSurface) = 0; 1214 1215 virtual bool UseKernelResource()=0; 1216 1217 virtual void VeboxGetBeCSCMatrix( 1218 PVPHAL_SURFACE pSrcSurface, 1219 PVPHAL_SURFACE pOutSurface) = 0; 1220 1221 //! 1222 //! \brief Check if the BeCSCMatrx need to be calculated 1223 //! \param [in] pSrcSurface 1224 //! Pointer to source surface 1225 //! \param [in] pOutSurface 1226 //! Pointer to output surface 1227 //! \return Return MOS_STATUS_SUCCESS if successful, otherwise failed 1228 //! VeboxIsBeCSCMatrixNeeded(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pOutSurface)1229 virtual bool VeboxIsBeCSCMatrixNeeded( 1230 PVPHAL_SURFACE pSrcSurface, 1231 PVPHAL_SURFACE pOutSurface) 1232 { 1233 if (!pSrcSurface || !pOutSurface) 1234 { 1235 VPHAL_RENDER_ASSERTMESSAGE("Null surface pointer"); 1236 return false; 1237 } 1238 1239 if ((CscInputCspace != pSrcSurface->ColorSpace) || 1240 (CscOutputCspace != pOutSurface->ColorSpace)) 1241 { 1242 return true; 1243 } 1244 else 1245 { 1246 return false; 1247 1248 } 1249 } 1250 IsIECPEnabled()1251 virtual bool IsIECPEnabled() 1252 { 1253 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData(); 1254 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData); 1255 1256 return pRenderData->bIECP; 1257 finish: 1258 return false; 1259 } IsQueryVarianceEnabled()1260 virtual bool IsQueryVarianceEnabled() {return false;} 1261 1262 virtual MOS_STATUS VeboxSetPerfTag(MOS_FORMAT srcFmt); VeboxClearFmdStates()1263 virtual void VeboxClearFmdStates() { } 1264 1265 protected: 1266 //! 1267 //! \brief Vebox set up vebox state heap 1268 //! \details Setup Vebox indirect states: DNDI and etc 1269 //! \param [in] pSrcSurface 1270 //! Pointer to input surface of Vebox 1271 //! \param [in] pOutSurface 1272 //! Pointer to output surface of Vebox 1273 //! \return MOS_STATUS 1274 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1275 //! 1276 virtual MOS_STATUS VeboxSetupIndirectStates( 1277 PVPHAL_SURFACE pSrcSurface, 1278 PVPHAL_SURFACE pOutSurface); 1279 1280 //! 1281 //! \brief Vebox Set VEBOX parameter 1282 //! \details Set up the VEBOX parameter value 1283 //! \param [in] pSrcSurface 1284 //! Pointer to input surface of Vebox 1285 //! \return MOS_STATUS 1286 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1287 //! 1288 virtual MOS_STATUS VeboxSetDNDIParams( 1289 PVPHAL_SURFACE pSrcSurface); 1290 IsDnDisabled()1291 virtual bool IsDnDisabled() 1292 { 1293 return false; 1294 } 1295 1296 //! 1297 //! \brief Vebox Set FMD parameter 1298 //! \details Set up the FMD parameters for DNDI State 1299 //! \param [out] pLumaParams 1300 //! Pointer to DNDI Param for set FMD parameters 1301 //! \return MOS_STATUS 1302 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1303 //! 1304 virtual MOS_STATUS VeboxSetFMDParams( 1305 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams); 1306 1307 //! 1308 //! \brief Vebox Populate DNDI parameters 1309 //! \details Populate the VEBOX state DNDI parameters to VEBOX RenderData 1310 //! \param [in] pLumaParams 1311 //! Pointer to Luma DN and DI parameter 1312 //! \param [in] pChromaParams 1313 //! Pointer to Chroma DN parameter 1314 //! \return MOS_STATUS 1315 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1316 //! 1317 virtual MOS_STATUS VeboxPopulateDNDIParams( 1318 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams, 1319 PVPHAL_DNUV_PARAMS pChromaParams); 1320 1321 //! 1322 //! \brief Flush command buffer for update kernels 1323 //! \details Flush the command buffer for Update kernels 1324 //! \return MOS_STATUS 1325 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1326 //! 1327 virtual MOS_STATUS VeboxFlushUpdateStateCmdBuffer(); 1328 1329 //! 1330 //! \brief Copy Vebox state heap 1331 //! \details Call HW interface function, 1332 //! use Secure_Block_Copy kernel, 1333 //! copy Vebox state heap between different memory 1334 //! \return MOS_STATUS 1335 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1336 //! 1337 virtual MOS_STATUS VeboxCopyVeboxStates(); 1338 1339 //! 1340 //! \brief Copy and update vebox state 1341 //! \details Copy and update vebox state for input frame. 1342 //! \param [in] pSrcSurface 1343 //! Pointer to input surface of Vebox 1344 //! \return MOS_STATUS 1345 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1346 //! 1347 virtual MOS_STATUS VeboxCopyAndUpdateVeboxState( 1348 PVPHAL_SURFACE pSrcSurface); 1349 1350 //! 1351 //! \brief Vebox state heap update for auto mode features 1352 //! \details Update Vebox indirect states for auto mode features 1353 //! \param [in] pSrcSurface 1354 //! Pointer to input surface of Vebox 1355 //! \return MOS_STATUS 1356 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1357 //! 1358 virtual MOS_STATUS VeboxUpdateVeboxStates( 1359 PVPHAL_SURFACE pSrcSurface); 1360 1361 //! 1362 //! \brief Doing prepare stage tasks for VeboxSendVeboxCmd 1363 //! Parameters might remain unchanged in case 1364 //! \param [out] CmdBuffer 1365 //! reference to Cmd buffer control struct 1366 //! \param [out] GenericPrologParams 1367 //! Generic prolog params struct to be set 1368 //! \param [out] iRemaining 1369 //! integer showing initial cmd buffer usage 1370 //! \return MOS_STATUS 1371 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1372 //! 1373 virtual MOS_STATUS VeboxSendVeboxCmd_Prepare( 1374 MOS_COMMAND_BUFFER &CmdBuffer, 1375 RENDERHAL_GENERIC_PROLOG_PARAMS &GenericPrologParams, 1376 int32_t &iRemaining); 1377 1378 //! 1379 //! \brief Check whether the Vebox command parameters are correct 1380 //! \param [in] VeboxStateCmdParams 1381 //! MHW vebox state cmd params 1382 //! \param [in] VeboxDiIecpCmdParams 1383 //! DiIecpCmd params struct 1384 //! \return MOS_STATUS 1385 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1386 //! 1387 virtual MOS_STATUS VeboxIsCmdParamsValid( 1388 const MHW_VEBOX_STATE_CMD_PARAMS &VeboxStateCmdParams, 1389 const MHW_VEBOX_DI_IECP_CMD_PARAMS &VeboxDiIecpCmdParams, 1390 const VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS &VeboxSurfaceStateCmdParams); 1391 1392 //! 1393 //! \brief Render the Vebox Cmd buffer for VeboxSendVeboxCmd 1394 //! Parameters might remain unchanged in case 1395 //! \param [in,out] CmdBuffer 1396 //! reference to Cmd buffer control struct 1397 //! \param [out] VeboxDiIecpCmdParams 1398 //! DiIecpCmd params struct to be set 1399 //! \param [out] VeboxSurfaceStateCmdParams 1400 //! VPHAL surface state cmd to be set 1401 //! \param [out] MhwVeboxSurfaceStateCmdParams 1402 //! MHW surface state cmd to be set 1403 //! \param [out] VeboxStateCmdParams 1404 //! MHW vebox state cmd to be set 1405 //! \param [out] FlushDwParams 1406 //! MHW MI_FLUSH_DW cmd to be set 1407 //! \param [in] pGenericPrologParams 1408 //! pointer to Generic prolog params struct to send to cmd buffer header 1409 //! \return MOS_STATUS 1410 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1411 //! 1412 virtual MOS_STATUS VeboxRenderVeboxCmd( 1413 MOS_COMMAND_BUFFER &CmdBuffer, 1414 MHW_VEBOX_DI_IECP_CMD_PARAMS &VeboxDiIecpCmdParams, 1415 VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS &VeboxSurfaceStateCmdParams, 1416 MHW_VEBOX_SURFACE_STATE_CMD_PARAMS &MhwVeboxSurfaceStateCmdParams, 1417 MHW_VEBOX_STATE_CMD_PARAMS &VeboxStateCmdParams, 1418 MHW_MI_FLUSH_DW_PARAMS &FlushDwParams, 1419 PRENDERHAL_GENERIC_PROLOG_PARAMS pGenericPrologParams); 1420 1421 //! 1422 //! \brief Render pipe cmds to Vebox Cmd buffer for VeboxSendVeboxCmd 1423 //! \details Render pipe cmds to Vebox Cmd buffer for VeboxSendVeboxCmd 1424 //! Parameters might remain unchanged in case 1425 //! \param pVeboxInterface 1426 //! [in] Pointers to Vebox Interface 1427 //! \param pMhwMiInterface 1428 //! [in] Pointers to MI HW Interface 1429 //! \param pVeboxSurfaceParams 1430 //! [in] Pointers to Vebox Surface Params Interface 1431 //! \param pVeboxDiIecpCmdParams 1432 //! [in] Pointers to DI/IECP CMD Params Interface 1433 //! \param pCmdBuffer 1434 //! [in,out] pointer to CMD buffer 1435 //! \return MOS_STATUS 1436 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1437 //! VeboxRenderMMCPipeCmd(PMHW_VEBOX_INTERFACE pVeboxInterface,MhwMiInterface * pMhwMiInterface,PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceParams,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams,PMOS_COMMAND_BUFFER pCmdBuffer)1438 virtual MOS_STATUS VeboxRenderMMCPipeCmd( 1439 PMHW_VEBOX_INTERFACE pVeboxInterface, 1440 MhwMiInterface * pMhwMiInterface, 1441 PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceParams, 1442 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams, 1443 PMOS_COMMAND_BUFFER pCmdBuffer) 1444 { 1445 MOS_UNUSED(*pCmdBuffer); 1446 return MOS_STATUS_SUCCESS; 1447 } 1448 1449 //! 1450 //! \brief Vebox send Vebox ring HW commands 1451 //! \details Send Vebox ring Commands. 1452 //! \return MOS_STATUS 1453 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1454 //! 1455 virtual MOS_STATUS VeboxSendVeboxCmd(); 1456 1457 //! 1458 //! \brief Sync for Indirect state Copy and Update Kernels 1459 //! \details Sync for Indirect state Copy and Update Kernels before Send Vebox ring Commands. 1460 //! \return MOS_STATUS 1461 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1462 //! 1463 virtual MOS_STATUS VeboxSyncIndirectStateCmd(); 1464 1465 //! 1466 //! \brief Set extra parameters before submit Vebox Cmd 1467 //! \details Set extra parameters before submit Vebox Cmd 1468 //! \return MOS_STATUS 1469 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1470 //! VeboxSendVeboxCmdSetParamBeforeSubmit()1471 virtual MOS_STATUS VeboxSendVeboxCmdSetParamBeforeSubmit() 1472 { return MOS_STATUS_SUCCESS; } 1473 1474 //! 1475 //! \brief Vebox set common rendering flag 1476 //! \details Common flags should be set before other flags, 1477 //! and it should be independent with other flags 1478 //! \param [in] pSrc 1479 //! Pointer to input surface of Vebox 1480 //! \param [in] pRenderTarget 1481 //! Pointer to Render targe surface of VPP BLT 1482 //! \return void 1483 //! 1484 virtual void VeboxSetCommonRenderingFlags( 1485 PVPHAL_SURFACE pSrc, 1486 PVPHAL_SURFACE pRenderTarget); 1487 1488 //! 1489 //! \brief Vebox set Field related rendering flag 1490 //! \details Set Field related flags for interlaced or related features 1491 //! \param [in] pSrc 1492 //! Pointer to input surface of Vebox 1493 //! \return void 1494 //! 1495 virtual void VeboxSetFieldRenderingFlags( 1496 PVPHAL_SURFACE pSrc); 1497 1498 //! 1499 //! \brief Vebox set rendering flag 1500 //! \details Setup Rendering Flags due to different usage case - main entrance 1501 //! \param [in] pSrc 1502 //! Pointer to input surface of Vebox 1503 //! \param [in] pRenderTarget 1504 //! Pointer to Render targe surface of VPP BLT 1505 //! \return void 1506 //! 1507 virtual void VeboxSetRenderingFlags( 1508 PVPHAL_SURFACE pSrc, 1509 PVPHAL_SURFACE pRenderTarget); 1510 1511 //! 1512 //! \brief Copy Dndi Surface Params 1513 //! \details Copies surface params to output surface 1514 //! based on src and temp surfaces 1515 //! \param [in] pSrcSurface 1516 //! Pointer to Source Surface 1517 //! \param [in] pTempSurface 1518 //! Pointer to Temporary Surface 1519 //! \param [in,out] pOutSurface 1520 //! Pointer to Out Surface 1521 //! \return void 1522 //! 1523 virtual void VeboxCopySurfaceParams( 1524 const PVPHAL_SURFACE pSrcSurface, 1525 const PVPHAL_SURFACE pTempSurface, 1526 PVPHAL_SURFACE pOutSurface); 1527 1528 //! 1529 //! \brief Vebox initialize STMM History 1530 //! \details Initialize STMM History surface 1531 //! Description: 1532 //! This function is used by VEBox for initializing 1533 //! the STMM surface. The STMM / Denoise history is a custom surface used 1534 //! for both input and output. Each cache line contains data for 4 4x4s. 1535 //! The STMM for each 4x4 is 8 bytes, while the denoise history is 1 byte 1536 //! and the chroma denoise history is 1 byte for each U and V. 1537 //! Byte Data\n 1538 //! 0 STMM for 2 luma values at luma Y=0, X=0 to 1\n 1539 //! 1 STMM for 2 luma values at luma Y=0, X=2 to 3\n 1540 //! 2 Luma Denoise History for 4x4 at 0,0\n 1541 //! 3 Not Used\n 1542 //! 4-5 STMM for luma from X=4 to 7\n 1543 //! 6 Luma Denoise History for 4x4 at 0,4\n 1544 //! 7 Not Used\n 1545 //! 8-15 Repeat for 4x4s at 0,8 and 0,12\n 1546 //! 16 STMM for 2 luma values at luma Y=1,X=0 to 1\n 1547 //! 17 STMM for 2 luma values at luma Y=1, X=2 to 3\n 1548 //! 18 U Chroma Denoise History\n 1549 //! 19 Not Used\n 1550 //! 20-31 Repeat for 3 4x4s at 1,4, 1,8 and 1,12\n 1551 //! 32 STMM for 2 luma values at luma Y=2,X=0 to 1\n 1552 //! 33 STMM for 2 luma values at luma Y=2, X=2 to 3\n 1553 //! 34 V Chroma Denoise History\n 1554 //! 35 Not Used\n 1555 //! 36-47 Repeat for 3 4x4s at 2,4, 2,8 and 2,12\n 1556 //! 48 STMM for 2 luma values at luma Y=3,X=0 to 1\n 1557 //! 49 STMM for 2 luma values at luma Y=3, X=2 to 3\n 1558 //! 50-51 Not Used\n 1559 //! 36-47 Repeat for 3 4x4s at 3,4, 3,8 and 3,12\n 1560 //! \param [in] iSurfaceIndex 1561 //! Index of STMM surface array 1562 //! \return MOS_STATUS 1563 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1564 //! 1565 MOS_STATUS VeboxInitSTMMHistory( 1566 int32_t iSurfaceIndex); 1567 1568 #if VEBOX_AUTO_DENOISE_SUPPORTED 1569 //! 1570 //! \brief Vebox initialize Spatial Configuration Surface 1571 //! \details Initialize Spatial Configuration History surface 1572 //! Description: 1573 //! This function is used by VEBox for initializing 1574 //! the Spatial Attributes Configuration surface. 1575 //! The GEN9+ DN kernel will use the init data in this surface and write back output data 1576 //! \return MOS_STATUS 1577 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1578 //! 1579 MOS_STATUS VeboxInitSpatialAttributesConfiguration(); 1580 #endif 1581 1582 //! 1583 //! \brief Update Vebox Execution State for Vebox/Render parallelism 1584 //! \details 1585 //! Purpose : Handle Vebox execution state machine transitions 1586 //! 1587 //! Mode0: Enter or stay in this state as long has (a) there are no future 1588 //! frames present or (b) FRC is active. Parallel execution is 1589 //! handled different in FRC mode. (c) Vebox/SFC output path is 1590 //! applied. Parallel execution is not needed when it is Vebox/SFC 1591 //! to output. Mode0 is considered the legacy serial vebox execution mode. 1592 //! Mode0To2: Enter this state when a future frame becomes present. In this 1593 //! state, perform a one time start up sequence in order to transistion 1594 //! to Mode2 parallel execution state. 1595 //! Mode2: Enter this state as long a future frame is present. This is the 1596 //! steady parallel execution state where we process 1 frame ahead. 1597 //! i.e. On BLT(N), we do vebox on the future frame N+1 and composite 1598 //! frame N in the same BLT(). 1599 //! Mode2To0: Enter this state when in Mode2 and no future frame is present. 1600 //! Transition back to Mode0. 1601 //! \param [in] pSrcSurface 1602 //! Pointer to input surface of Vebox 1603 //! \param [in] OutputPipe 1604 //! The output path the driver uses to write the RenderTarget 1605 //! \return MOS_STATUS 1606 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1607 //! 1608 virtual MOS_STATUS UpdateVeboxExecutionState( 1609 PVPHAL_SURFACE pSrcSurface, 1610 VPHAL_OUTPUT_PIPE_MODE OutputPipe); 1611 1612 //! 1613 //! \brief Vebox render mode2 1614 //! \details VEBOX/IECP Rendering for future frame 1615 //! [Flow] 1. For future frame; send cmd. 1616 //! 2. setup state for next vebox operation. 1617 //! 3. Request "speculative" copy state, update state. 1618 //! \param [in] pSrcSurface 1619 //! Pointer to input surface of Vebox 1620 //! \param [in] pOutputSurface 1621 //! Pointer to output surface of Vebox 1622 //! \return MOS_STATUS 1623 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1624 //! 1625 virtual MOS_STATUS VeboxRenderMode2( 1626 PVPHAL_SURFACE pSrcSurface, 1627 PVPHAL_SURFACE pOutputSurface); 1628 1629 //! 1630 //! \brief Vebox render mode0to2 1631 //! \details Purpose : VEBOX/IECP Rendering for current and future frame 1632 //! [Flow] 1. For current frame; setup state, copy state, update state, send cmd. 1633 //! 2. For future frame; setup state, copy state, update state, send cmd. 1634 //! 3. setup state for next vebox operation. 1635 //! 4. Request "speculative" copy state, update state. 1636 //! \param [in] pSrcSurface 1637 //! Pointer to input surface of Vebox 1638 //! \param [in] pOutputSurface 1639 //! Pointer to output surface of Vebox 1640 //! \return MOS_STATUS 1641 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1642 //! 1643 virtual MOS_STATUS VeboxRenderMode0To2( 1644 PVPHAL_SURFACE pSrcSurface, 1645 PVPHAL_SURFACE pOutputSurface); 1646 1647 //! 1648 //! \brief Vebox Render mode0 1649 //! \details VEBOX/IECP Rendering for current frame 1650 //! [Flow] 1. For current frame; setup state, copy state, update state, send cmd. 1651 //! \param [in] pSrcSurface 1652 //! Pointer to input surface of Vebox 1653 //! \param [in] pOutputSurface 1654 //! Pointer to output surface of Vebox 1655 //! \return MOS_STATUS 1656 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1657 //! 1658 virtual MOS_STATUS VeboxRenderMode0( 1659 PVPHAL_SURFACE pSrcSurface, 1660 PVPHAL_SURFACE pOutputSurface); 1661 1662 //! 1663 //! \brief Update output surface for FFDI Same sample case with SFC 1664 //! \param [in] pSrcSurface 1665 //! Pointer to input surface of Vebox 1666 //! \return output surface for the same sample case 1667 //! 1668 virtual PVPHAL_SURFACE GetOutputSurfForDiSameSampleWithSFC( 1669 PVPHAL_SURFACE pSrcSurface); 1670 1671 //! 1672 //! \brief Set DI output sample 1673 //! \details Set DI sample to be used for compositing stage followed by VEBOX 1674 //! feature reporting 1675 //! \param [in] pSrcSurface 1676 //! Pointer to Source Surface 1677 //! \param [in,out] pOutputSurface 1678 //! Pointer to Output Surface 1679 //! \return MOS_STATUS 1680 //! MOS_STATUS_SUCCESS if no error else MOS_STATUS_UNKNOWN 1681 //! 1682 virtual MOS_STATUS VeboxSetDiOutput( 1683 PVPHAL_SURFACE pSrcSurface, 1684 PVPHAL_SURFACE pOutputSurface); 1685 1686 //! 1687 //! \brief Setup reference surfaces 1688 //! \details Setup reference surfaces for app feeds reference case and 1689 //! no reference frame case 1690 //! \param [in] pSrcSurface 1691 //! Pointer to Source Surface 1692 //! \return PVPHAL_SURFACE 1693 //! Pointer to Reference surface or nullptr if no reference 1694 //! 1695 PVPHAL_SURFACE VeboxSetReference( 1696 PVPHAL_SURFACE pSrcSurface); 1697 1698 //! 1699 //! \brief Add Extra kernels when VeboxFLushUpdateState 1700 //! \param [in] CmdBuffer 1701 //! reference to MOS_COMMAND_BUFFER 1702 //! \param [out] MediaObjectParams 1703 //! Reference to Media object params 1704 //! \return MOS_STATUS 1705 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1706 //! VeboxFlushUpdateStateAddExtraKernels(MOS_COMMAND_BUFFER & CmdBuffer,MHW_MEDIA_OBJECT_PARAMS & MediaObjectParams)1707 virtual MOS_STATUS VeboxFlushUpdateStateAddExtraKernels( 1708 MOS_COMMAND_BUFFER& CmdBuffer, 1709 MHW_MEDIA_OBJECT_PARAMS& MediaObjectParams) 1710 { 1711 MOS_UNUSED(CmdBuffer); 1712 MOS_UNUSED(MediaObjectParams); 1713 return MOS_STATUS_SUCCESS; 1714 } 1715 1716 //! 1717 //! \brief Check whether DN surface limitation is satisfied 1718 //! \param [in] bDenoise 1719 //! Flag to indicate whether DN is enabled 1720 //! \param [in] CurrentSurface 1721 //! Input surface of Vebox 1722 //! \param [in] FFDNSurface 1723 //! DN surface of Vebox 1724 //! \return bool 1725 //! Return true for limitation satisfied, otherwise false 1726 //! 1727 bool VeboxDNSurfaceLimitationSatisfied( 1728 bool bDenoise, 1729 VPHAL_SURFACE *CurrentSurface, 1730 VPHAL_SURFACE *FFDNSurface); 1731 1732 //! 1733 //! \brief Send Vecs Status Tag 1734 //! \details Add MI Flush with write back into command buffer for GPU to write 1735 //! back GPU Tag. This should be the last command in 1st level batch. 1736 //! This ensures sync tag will be written after rendering is complete. 1737 //! \param [in] pMhwMiInterface 1738 //! MHW MI interface 1739 //! \param [in] pOsInterface 1740 //! Pointer to OS Interface 1741 //! \param [out] pCmdBuffer 1742 //! Pointer to Command Buffer 1743 //! \return MOS_STATUS 1744 //! 1745 MOS_STATUS VeboxSendVecsStatusTag( 1746 PMHW_MI_INTERFACE pMhwMiInterface, 1747 PMOS_INTERFACE pOsInterface, 1748 PMOS_COMMAND_BUFFER pCmdBuffer); 1749 1750 //! 1751 //! \brief Calculate offsets of statistics surface address based on the 1752 //! functions which were enabled in the previous call, 1753 //! and store the width and height of the per-block statistics into DNDI_STATE 1754 //! \details 1755 //! Layout of Statistics surface when Temporal DI enabled 1756 //! --------------------------------------------------------------\n 1757 //! | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n 1758 //! |-------------------------------------------------------------\n 1759 //! | 16 bytes for x=0, Y=4 | ...\n 1760 //! |------------------------------\n 1761 //! | ...\n 1762 //! |------------------------------\n 1763 //! | 16 bytes for x=0, Y=height-4| ...\n 1764 //! |-----------------------------------------------Pitch----------------------------------------------------------\n 1765 //! | 256 DW of ACE histogram Slice 0 (Previous)| 17 DW Reserved | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n 1766 //! |--------------------------------------------------------------------------------------------------------------\n 1767 //! | 256 DW of ACE histogram Slice 0 (Current) | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n 1768 //! |--------------------------------------------------------------------------------------------------------------\n 1769 //! | 256 DW of ACE histogram Slice 1 (Previous)| 17 DW Reserved | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n 1770 //! |--------------------------------------------------------------------------------------------------------------\n 1771 //! | 256 DW of ACE histogram Slice 1 (Current) | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n 1772 //! ---------------------------------------------------------------------------------------------------------------\n 1773 //! 1774 //! Layout of Statistics surface when DN or Spatial DI enabled (and Temporal DI disabled) 1775 //! --------------------------------------------------------------\n 1776 //! | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n 1777 //! |-------------------------------------------------------------\n 1778 //! | 16 bytes for x=0, Y=4 | ...\n 1779 //! |------------------------------\n 1780 //! | ...\n 1781 //! |------------------------------\n 1782 //! | 16 bytes for x=0, Y=height-4| ...\n 1783 //! |-----------------------------------------------Pitch----------------------------------------------------------\n 1784 //! | 256 DW of ACE histogram Slice 0 (Input) | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n 1785 //! |--------------------------------------------------------------------------------------------------------------\n 1786 //! | 256 DW of ACE histogram Slice 1 (Input) | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n 1787 //! ---------------------------------------------------------------------------------------------------------------\n 1788 //! 1789 //! Layout of Statistics surface when both DN and DI are disabled 1790 //! ------------------------------------------------Pitch----------------------------------------------------------\n 1791 //! | 256 DW of ACE histogram Slice 0 (Input) | 17 DW Reserved | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n 1792 //! |--------------------------------------------------------------------------------------------------------------\n 1793 //! | 256 DW of ACE histogram Slice 1 (Input) | 17 DW Reserved | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n 1794 //! ---------------------------------------------------------------------------------------------------------------\n 1795 //! \param [out] pStatSlice0Offset 1796 //! Statistics surface Slice 0 base pointer 1797 //! \param [out] pStatSlice1Offset 1798 //! Statistics surface Slice 1 base pointer 1799 //! \return MOS_STATUS 1800 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1801 //! 1802 MOS_STATUS VeboxGetStatisticsSurfaceOffsets( 1803 int32_t* pStatSlice0Offset, 1804 int32_t* pStatSlice1Offset); 1805 1806 //! 1807 //! \brief Vebox get statistics surface base 1808 //! \details Calculate address of statistics surface address based on the 1809 //! functions which were enabled in the previous call. 1810 //! \param uint8_t* pStat 1811 //! [in] Pointer to Statistics surface 1812 //! \param uint8_t* * pStatSlice0Base 1813 //! [out] Statistics surface Slice 0 base pointer 1814 //! \param uint8_t* * pStatSlice1Base 1815 //! [out] Statistics surface Slice 1 base pointer 1816 //! \return MOS_STATUS 1817 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1818 //! 1819 MOS_STATUS VeboxGetStatisticsSurfaceBase( 1820 uint8_t * pStat, 1821 uint8_t **pStatSlice0Base, 1822 uint8_t **pStatSlice1Base); 1823 1824 //! 1825 //! \brief Check if 2 passes CSC are supported on the platform 1826 //! Is2PassesCscPlatformSupported()1827 virtual bool Is2PassesCscPlatformSupported() 1828 { 1829 return false; 1830 } 1831 1832 //! 1833 //! \brief Check if 2 passes CSC are needed 1834 //! \param [in] pSrc 1835 //! Pointer to input surface of Vebox 1836 //! \param [in] pRenderTarget 1837 //! Pointer to Render targe surface of VPP BLT 1838 //! \return bool 1839 //! return true if 2 Passes CSC is needed, otherwise false 1840 //! 1841 bool VeboxIs2PassesCSCNeeded( 1842 PVPHAL_SURFACE pSrc, 1843 PVPHAL_SURFACE pRenderTarget); 1844 1845 //! 1846 //! \brief Copy Surface value 1847 //! \param [in] pTargetSurface 1848 //! Pointer to surface copy value to 1849 //! \param [in] pSourceSurface 1850 //! Pointer to surface copy value from 1851 //! \return void 1852 //! CopySurfaceValue(PVPHAL_SURFACE pTargetSurface,PVPHAL_SURFACE pSourceSurface)1853 virtual void CopySurfaceValue( 1854 PVPHAL_SURFACE pTargetSurface, 1855 PVPHAL_SURFACE pSourceSurface) 1856 { 1857 *pTargetSurface = *pSourceSurface; 1858 } 1859 1860 //! 1861 //! \brief Vebox get Luma default value 1862 //! \details Initialize luma denoise paramters w/ default values. 1863 //! \param [out] pLumaParams 1864 //! Pointer to Luma DN parameter 1865 //! \return void 1866 //! 1867 virtual void GetLumaDefaultValue( 1868 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams) = 0; 1869 1870 //! 1871 //! \brief Vebox set DNDI parameter 1872 //! \details Set denoise params for luma and chroma and deinterlace params 1873 //! \param [in] pSrcSurface 1874 //! Pointer to input surface of Vebox 1875 //! \param [in] pLumaParams 1876 //! Pointer to Luma DN parameter 1877 //! \param [in] pChromaParams 1878 //! Pointer to Chroma DN parameter 1879 //! \return MOS_STATUS 1880 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1881 //! 1882 virtual MOS_STATUS SetDNDIParams( 1883 PVPHAL_SURFACE pSrcSurface, 1884 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams, 1885 PVPHAL_DNUV_PARAMS pChromaParams) = 0; 1886 1887 //! 1888 //! \brief Setup Vebox_State Command parameter 1889 //! \param [in] bDiVarianceEnable 1890 //! Is DI/Variances report enabled 1891 //! \param [in,out] pVeboxStateCmdParams 1892 //! Pointer to VEBOX_STATE command parameters 1893 //! \return MOS_STATUS 1894 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1895 //! 1896 virtual MOS_STATUS SetupVeboxState( 1897 bool bDiVarianceEnable, 1898 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams) = 0; 1899 1900 //! 1901 //! \brief Create the platform specific sfc state 1902 //! \return VphalSfcState* 1903 //! Return created VphalSfcState pointer 1904 //! 1905 virtual VphalSfcState* CreateSfcState() = 0; 1906 1907 //! 1908 //! \brief Vebox Set Human Vision System based Denoise parameter 1909 //! \details Vebox Set Human Vision System based Denoise parameter 1910 //! \param [in] pSrcSurface 1911 //! Pointer to input surface of Vebox 1912 //! \return MOS_STATUS 1913 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1914 //! 1915 virtual MOS_STATUS VeboxSetHVSDNParams( 1916 PVPHAL_SURFACE pSrcSurface); 1917 1918 //! 1919 //! \brief Comp can be bypassed when the following conditions are all met 1920 //! 1921 bool IS_COMP_BYPASS_FEASIBLE(bool _bCompNeeded, PCVPHAL_RENDER_PARAMS _pcRenderParams, PVPHAL_SURFACE _pSrcSurface); 1922 1923 //! 1924 //! \brief Vebox can be the output pipe when the following conditions are all met 1925 //! 1926 bool IS_OUTPUT_PIPE_VEBOX_FEASIBLE(PVPHAL_VEBOX_STATE _pVeboxState, PCVPHAL_RENDER_PARAMS _pcRenderParams, PVPHAL_SURFACE _pSrcSurface); 1927 1928 //! 1929 //! \brief Check for DN only case 1930 //! \details Check for DN only case 1931 //! \return bool 1932 //! Return true if DN only case, otherwise not 1933 //! 1934 virtual bool IsDNOnly() = 0; 1935 }; 1936 1937 //! 1938 //! \brief Perform Rendering in VEBOX 1939 //! \details Check whether VEBOX Rendering is enabled. When it's enabled, perform VEBOX Rendering 1940 //! on the input surface and get the output surface 1941 //! \param [in,out] pRenderer 1942 //! VPHAL renderer pointer 1943 //! \param [in] pcRenderParams 1944 //! Const pointer to VPHAL render parameter 1945 //! \param [in,out] pRenderPassData 1946 //! Pointer to the VPHAL render pass data 1947 //! \return MOS_STATUS 1948 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1949 //! 1950 MOS_STATUS VpHal_RndrRenderVebox( 1951 VphalRenderer *pRenderer, 1952 PCVPHAL_RENDER_PARAMS pcRenderParams, 1953 RenderpassData *pRenderPassData); 1954 #endif // __VPHAL_RENDER_VEBOX_BASE_H__ 1955