1 //
2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #include "RefConvolution2dWorkload.hpp"
7
8 #include "ConvImpl.hpp"
9 #include "RefWorkloadUtils.hpp"
10
11 #include "Profiling.hpp"
12
13 namespace armnn
14 {
RefConvolution2dWorkload(const Convolution2dQueueDescriptor & descriptor,const WorkloadInfo & info)15 RefConvolution2dWorkload::RefConvolution2dWorkload(const Convolution2dQueueDescriptor& descriptor,
16 const WorkloadInfo& info)
17 : RefBaseWorkload<Convolution2dQueueDescriptor>(descriptor, info)
18 , m_InputShape(info.m_InputTensorInfos[0].GetShape())
19 , m_FilterShape(info.m_InputTensorInfos[1].GetShape())
20 , m_OutputShape(info.m_OutputTensorInfos[0].GetShape())
21 {
22 WorkloadInfo detailsInfo;
23 detailsInfo.m_InputTensorInfos = info.m_InputTensorInfos;
24 detailsInfo.m_OutputTensorInfos = info.m_OutputTensorInfos;
25
26 // Report Profiling Details
27 ARMNN_REPORT_PROFILING_WORKLOAD_DESC("RefConvolution2dWorkload_Construct",
28 descriptor.m_Parameters,
29 detailsInfo,
30 this->GetGuid());
31 }
32
Execute() const33 void RefConvolution2dWorkload::Execute() const
34 {
35 Execute(m_Data.m_Inputs, m_Data.m_Outputs);
36 }
37
ExecuteAsync(ExecutionData & executionData)38 void RefConvolution2dWorkload::ExecuteAsync(ExecutionData& executionData)
39 {
40 WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
41 Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
42 }
43
Execute(std::vector<ITensorHandle * > inputs,std::vector<ITensorHandle * > outputs) const44 void RefConvolution2dWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
45 {
46 ARMNN_SCOPED_PROFILING_EVENT_GUID(Compute::CpuRef, "RefConvolution2dWorkload_Execute", this->GetGuid());
47
48 std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]), inputs[0]->Map());
49 std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]), outputs[0]->Map());
50
51 std::unique_ptr<Decoder<float>> weightsDecoder = MakeDecoder<float>(GetTensorInfo(inputs[1]), inputs[1]->Map());
52 std::unique_ptr<Decoder<float>> biasDecoder;
53
54 if (m_Data.m_Parameters.m_BiasEnabled)
55 {
56 biasDecoder = MakeDecoder<float>(GetTensorInfo(inputs[2]), inputs[2]->Map());
57 }
58
59 Convolve(m_InputShape, *inputDecoder, m_OutputShape, *outputEncoder, m_FilterShape,
60 *weightsDecoder, m_Data.m_Parameters.m_BiasEnabled, biasDecoder.get(),
61 m_Data.m_Parameters.m_DataLayout, m_Data.m_Parameters.m_PadTop, m_Data.m_Parameters.m_PadLeft,
62 m_Data.m_Parameters.m_StrideX, m_Data.m_Parameters.m_StrideY,
63 m_Data.m_Parameters.m_DilationX, m_Data.m_Parameters.m_DilationY);
64 }
65
66 } //namespace armnn