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Searched refs:resolveVariantSchedClass (Results 1 – 23 of 23) sorted by relevance

/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/LoongArch/
H A DLoongArchGenSubtargetInfo.inc142 unsigned resolveVariantSchedClass(unsigned SchedClass,
207 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, …
238 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned…
240 } // LoongArchGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/MC/
H A DMCSchedule.cpp78 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
124 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
H A DMCSchedule.cpp77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/RISCV/
H A DRISCVGenSubtargetInfo.inc419 unsigned resolveVariantSchedClass(unsigned SchedClass,
512 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const ove…
543 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const {
545 } // RISCVGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
H A DMCSubtargetInfo.h214 resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, in resolveVariantSchedClass() function
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/MC/
H A DMCSubtargetInfo.h220 virtual unsigned resolveVariantSchedClass(unsigned SchedClass, in resolveVariantSchedClass() function
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/MC/
DMCSubtargetInfo.h220 virtual unsigned resolveVariantSchedClass(unsigned SchedClass, in resolveVariantSchedClass() function
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/MC/
DMCSubtargetInfo.h220 virtual unsigned resolveVariantSchedClass(unsigned SchedClass, in resolveVariantSchedClass() function
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/MC/
DMCSubtargetInfo.h220 virtual unsigned resolveVariantSchedClass(unsigned SchedClass, in resolveVariantSchedClass() function
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/MC/
DMCSubtargetInfo.h220 virtual unsigned resolveVariantSchedClass(unsigned SchedClass, in resolveVariantSchedClass() function
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/MCA/
H A DInstrBuilder.cpp533 STI.resolveVariantSchedClass(SchedClassID, &MCI, &MCII, CPUID); in createInstrDescImpl()
613 SchedClassID = STI.resolveVariantSchedClass(SchedClassID, &MCI, &MCII, CPUID); in getOrCreateInstrDesc()
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
H A DInstrBuilder.cpp526 SchedClassID = STI.resolveVariantSchedClass(SchedClassID, &MCI, CPUID); in createInstrDescImpl()
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
H A DPPCGenSubtargetInfo.inc8093 unsigned resolveVariantSchedClass(unsigned SchedClass,
8219 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const ove…
8252 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const {
8254 } // PPCGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
H A DMipsGenSubtargetInfo.inc3773 unsigned resolveVariantSchedClass(unsigned SchedClass,
3871 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const ove…
4063 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const {
4065 } // MipsGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/Mips/
H A DMipsGenSubtargetInfo.inc3839 unsigned resolveVariantSchedClass(unsigned SchedClass,
3940 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, …
4132 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned…
4134 } // MipsGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/RISCV/
H A DRISCVGenSubtargetInfo.inc7521 unsigned resolveVariantSchedClass(unsigned SchedClass,
7684 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, …
7715 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned…
7717 } // RISCVGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
H A DARMGenSubtargetInfo.inc19337 unsigned resolveVariantSchedClass(unsigned SchedClass,
19559 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const ove…
23184 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const {
23186 } // ARMGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
H A DX86GenSubtargetInfo.inc23069 unsigned resolveVariantSchedClass(unsigned SchedClass,
23246 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const ove…
24661 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const {
24663 } // X86GenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
H A DAArch64GenSubtargetInfo.inc19158 unsigned resolveVariantSchedClass(unsigned SchedClass,
19361 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const ove…
24929 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, unsigned CPUID) const {
24931 } // AArch64GenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/PowerPC/
H A DPPCGenSubtargetInfo.inc19927 unsigned resolveVariantSchedClass(unsigned SchedClass,
20085 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, …
26742 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned…
26744 } // PPCGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/ARM/
H A DARMGenSubtargetInfo.inc27404 unsigned resolveVariantSchedClass(unsigned SchedClass,
27674 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, …
32942 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned…
32944 } // ARMGenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/X86/
H A DX86GenSubtargetInfo.inc37294 unsigned resolveVariantSchedClass(unsigned SchedClass,
37507 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, …
39619 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned…
39621 } // X86GenSubtargetInfo::resolveVariantSchedClass
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/AArch64/
H A DAArch64GenSubtargetInfo.inc35468 unsigned resolveVariantSchedClass(unsigned SchedClass,
35759 …unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, …
41568 ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned…
41570 } // AArch64GenSubtargetInfo::resolveVariantSchedClass