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Searched refs:ADC_CSR_OVR1_Pos (Results 1 – 24 of 24) sorted by relevance

/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h1226 #define ADC_CSR_OVR1_Pos (5U) macro
1227 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f410tx.h1216 #define ADC_CSR_OVR1_Pos (5U) macro
1217 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f410cx.h1226 #define ADC_CSR_OVR1_Pos (5U) macro
1227 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f401xe.h1328 #define ADC_CSR_OVR1_Pos (5U) macro
1329 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f401xc.h1328 #define ADC_CSR_OVR1_Pos (5U) macro
1329 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f411xe.h1331 #define ADC_CSR_OVR1_Pos (5U) macro
1332 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f412cx.h1521 #define ADC_CSR_OVR1_Pos (5U) macro
1522 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f405xx.h1562 #define ADC_CSR_OVR1_Pos (5U) macro
1563 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f415xx.h1636 #define ADC_CSR_OVR1_Pos (5U) macro
1637 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f412zx.h1581 #define ADC_CSR_OVR1_Pos (5U) macro
1582 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f407xx.h1666 #define ADC_CSR_OVR1_Pos (5U) macro
1667 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f412vx.h1579 #define ADC_CSR_OVR1_Pos (5U) macro
1580 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f413xx.h1710 #define ADC_CSR_OVR1_Pos (5U) macro
1711 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f423xx.h1746 #define ADC_CSR_OVR1_Pos (5U) macro
1747 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f412rx.h1575 #define ADC_CSR_OVR1_Pos (5U) macro
1576 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f417xx.h1740 #define ADC_CSR_OVR1_Pos (5U) macro
1741 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f446xx.h1683 #define ADC_CSR_OVR1_Pos (5U) macro
1684 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f427xx.h1760 #define ADC_CSR_OVR1_Pos (5U) macro
1761 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f437xx.h1838 #define ADC_CSR_OVR1_Pos (5U) macro
1839 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f429xx.h1816 #define ADC_CSR_OVR1_Pos (5U) macro
1817 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f439xx.h1892 #define ADC_CSR_OVR1_Pos (5U) macro
1893 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f469xx.h1907 #define ADC_CSR_OVR1_Pos (5U) macro
1908 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
H A Dstm32f479xx.h1983 #define ADC_CSR_OVR1_Pos (5U) macro
1984 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h1682 #define ADC_CSR_OVR1_Pos (5U) macro
1683 #define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */