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Searched refs:DFSDM1_BASE (Results 1 – 8 of 8) sorted by relevance

/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l476xx.h1221 #define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000UL) macro
1222 #define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x0000UL)
1223 #define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x0020UL)
1224 #define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x0040UL)
1225 #define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x0060UL)
1226 #define DFSDM1_Channel4_BASE (DFSDM1_BASE + 0x0080UL)
1227 #define DFSDM1_Channel5_BASE (DFSDM1_BASE + 0x00A0UL)
1228 #define DFSDM1_Channel6_BASE (DFSDM1_BASE + 0x00C0UL)
1229 #define DFSDM1_Channel7_BASE (DFSDM1_BASE + 0x00E0UL)
1230 #define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x0100UL)
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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f412cx.h859 #define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000UL) macro
860 #define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x00UL)
861 #define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x20UL)
862 #define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x40UL)
863 #define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x60UL)
864 #define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x100UL)
865 #define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x180UL)
H A Dstm32f412zx.h904 #define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000UL) macro
905 #define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x00UL)
906 #define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x20UL)
907 #define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x40UL)
908 #define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x60UL)
909 #define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x100UL)
910 #define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x180UL)
H A Dstm32f412vx.h904 #define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000UL) macro
905 #define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x00UL)
906 #define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x20UL)
907 #define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x40UL)
908 #define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x60UL)
909 #define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x100UL)
910 #define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x180UL)
H A Dstm32f413xx.h992 #define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000UL) macro
994 #define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x00UL)
995 #define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x20UL)
996 #define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x40UL)
997 #define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x60UL)
998 #define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x100UL)
999 #define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x180UL)
H A Dstm32f423xx.h1026 #define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000UL) macro
1028 #define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x00UL)
1029 #define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x20UL)
1030 #define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x40UL)
1031 #define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x60UL)
1032 #define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x100UL)
1033 #define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x180UL)
H A Dstm32f412rx.h904 #define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000UL) macro
905 #define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x00UL)
906 #define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x20UL)
907 #define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x40UL)
908 #define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x60UL)
909 #define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x100UL)
910 #define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x180UL)
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h1014 #define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000UL) macro
1015 #define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x0000UL)
1016 #define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x0020UL)
1017 #define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x0040UL)
1018 #define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x0060UL)
1019 #define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x0100UL)
1020 #define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x0180UL)