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Searched refs:PCM (Results 1 – 15 of 15) sorted by relevance

/btstack/port/msp432p401lp-cc256x/ti/devices/msp432p4xx/driverlib/
H A Dpcm.c64 regValue = PCM->CTL0; in __PCM_setCoreVoltageLevelAdvanced()
71 PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE1) in __PCM_setCoreVoltageLevelAdvanced()
77 PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE0) in __PCM_setCoreVoltageLevelAdvanced()
86 while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) in __PCM_setCoreVoltageLevelAdvanced()
215 regValue = PCM->CTL0; in __PCM_setPowerModeAdvanced()
221 PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE0 in __PCM_setPowerModeAdvanced()
226 PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE1 in __PCM_setPowerModeAdvanced()
233 PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE1 in __PCM_setPowerModeAdvanced()
237 PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE1 in __PCM_setPowerModeAdvanced()
248 PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE0 in __PCM_setPowerModeAdvanced()
[all …]
/btstack/port/msp432p401lp-cc256x/
H A Dsystem_msp432p401r.c281 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
282 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
283 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
304 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
305 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
306 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
327 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
328 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
329 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
350 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
[all …]
/btstack/chipset/
H A DREADME.md41 …d via the HCI interface or via an explicit PCM/I2S interface on the chipset. Most chipsets default…
99 …t it's rather fragile in general. For these, it's necessary to use the I2S/PCM interface for stabl…
152 … Speech is supported via I2C/PCM pins. Newer Controllers provide an mSBC codec that allows to use …
173 …ongles, but not for UART connections. HSP and HFP Narrow Band Speech is supported via I2C/PCM pins.
285 **SCO data** can either be routed over HCI with working flow control or over I2S/PCM. The 8822CS su…
410 - SCO Data is be routed over HCI with `ENABLE_SCO_OVER_HCI` or to PCM/I2S with `ENABLE_SCO_OVER_PCM…
411 …LE_CC256X_ASSISTED_HFP` and SCO is routed over PCM/I2S with `ENABLE_SCO_OVER_PCM`. During startup,…
/btstack/3rd-party/hxcmod-player/
H A Dreadme.txt81 The default output format is signed 44100Hz 16-bit Stereo PCM samples.
/btstack/
H A DCHANGELOG.md485 - HCI: `btstack_transport_sco.h` supports SCO over physical PCM/I2S interface (`HAVE_SCO_TRANSPORT`)
580 - CC256x: with ENABLE_CC256X_ASSISTED_HFP, HFP enables WBS codec on demand and configures PCM/I2S i…
581 - BCM: with ENABLE_BCM_PCM_WBS, HFP enables WBS codec on demand and configures PCM/I2S interface fo…
/btstack/doc/manual/docs-template/
H A Dhow_to.md96 | ENABLE_SCO_OVER_PCM | Enable SCO ofer PCM/I2S f…
/btstack/port/msp432p401lp-cc256x/ti/devices/msp432p4xx/inc/
H A Dmsp432p401m.h1390 #define PCM ((PCM_Type *) PCM_BASE) macro
H A Dmsp432p401r.h1390 #define PCM ((PCM_Type *) PCM_BASE) macro
H A Dmsp432p401y.h1398 #define PCM ((PCM_Type *) PCM_BASE) macro
H A Dmsp432p4011.h1398 #define PCM ((PCM_Type *) PCM_BASE) macro
H A Dmsp432p401v.h1398 #define PCM ((PCM_Type *) PCM_BASE) macro
H A Dmsp432p411y.h1444 #define PCM ((PCM_Type *) PCM_BASE) macro
H A Dmsp432p411v.h1444 #define PCM ((PCM_Type *) PCM_BASE) macro
H A Dmsp432p4111.h1444 #define PCM ((PCM_Type *) PCM_BASE) macro
H A Dmsp432p4xx.h1295 #define PCM ((PCM_Type *) PCM_BASE) macro