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Searched refs:R_SYSTEM_Type (Results 1 – 7 of 7) sorted by relevance

/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/src/driver/r_cgc/hw/
H A Dhw_cgc.h125 __STATIC_INLINE void HW_CGC_SetHighSpeedMode (R_SYSTEM_Type * p_system_reg) in HW_CGC_SetHighSpeedMode()
136 __STATIC_INLINE void HW_CGC_SetMiddleSpeedMode (R_SYSTEM_Type * p_system_reg) in HW_CGC_SetMiddleSpeedMode()
147 __STATIC_INLINE void HW_CGC_SetLowVoltageMode (R_SYSTEM_Type * p_system_reg) in HW_CGC_SetLowVoltageMode()
158 __STATIC_INLINE void HW_CGC_SetLowSpeedMode (R_SYSTEM_Type * p_system_reg) in HW_CGC_SetLowSpeedMode()
169 __STATIC_INLINE void HW_CGC_SetSubOscSpeedMode (R_SYSTEM_Type * p_system_reg) in HW_CGC_SetSubOscSpeedMode()
183 __STATIC_INLINE void HW_CGC_LCDClockCfg (R_SYSTEM_Type * p_system_reg, uint8_t clock) in HW_CGC_LCDClockCfg()
194 __STATIC_INLINE uint8_t HW_CGC_LCDClockCfgGet (R_SYSTEM_Type * p_system_reg) in HW_CGC_LCDClockCfgGet()
205 __STATIC_INLINE void HW_CGC_LCDClockEnable (R_SYSTEM_Type * p_system_reg) in HW_CGC_LCDClockEnable()
216 __STATIC_INLINE void HW_CGC_LCDClockDisable (R_SYSTEM_Type * p_system_reg) in HW_CGC_LCDClockDisable()
227 __STATIC_INLINE bool HW_CGC_LCDClockIsEnabled (R_SYSTEM_Type * p_system_reg) in HW_CGC_LCDClockIsEnabled()
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H A Dhw_cgc_private.h63 void HW_CGC_MemWaitSet (R_SYSTEM_Type * p_system_reg, uint32_t setting);
65 uint32_t HW_CGC_MemWaitGet (R_SYSTEM_Type * p_system_reg);
67 void HW_CGC_OscStopDetectEnable (R_SYSTEM_Type * p_system_reg); // enable hardw…
69 void HW_CGC_SRAM_ProtectLock (R_SYSTEM_Type * p_system_reg);
71 void HW_CGC_SRAM_ProtectUnLock (R_SYSTEM_Type * p_system_reg);
73 void HW_CGC_SRAM_RAMWaitSet (R_SYSTEM_Type * p_system_reg, uint32_t setting);
75 void HW_CGC_SRAM_HSRAMWaitSet (R_SYSTEM_Type * p_system_reg, uint32_t setting);
77 void HW_CGC_ROMWaitSet (R_SYSTEM_Type * p_system_reg, uint32_t setting);
79 uint32_t HW_CGC_ROMWaitGet (R_SYSTEM_Type * p_system_reg);
/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/src/driver/r_cgc/
H A Dr_cgc.c104 static void r_cgc_main_clock_drive_set (R_SYSTEM_Type * p_system_reg, uint8_t val);
105 static void r_cgc_subclock_drive_set (R_SYSTEM_Type * p_system_reg, uint8_t val);
106 static void r_cgc_clock_start (R_SYSTEM_Type * p_system_reg, cgc_clock_t clock);
107 static void r_cgc_clock_stop (R_SYSTEM_Type * p_system_reg, cgc_clock_t clock);
108 static bool r_cgc_clock_check (R_SYSTEM_Type * p_system_reg, cgc_clock_t clock);
109 static void r_cgc_mainosc_source_set (R_SYSTEM_Type * p_system_reg, cgc_osc_source_t osc);
110 static void r_cgc_clock_wait_set (R_SYSTEM_Type * p_system_reg, cgc_clock_t clock, uint8_t time);
111 static void r_cgc_clock_source_set (R_SYSTEM_Type * p_system_reg, cgc_clock_t clock);
112 static void r_cgc_system_dividers_get (R_SYSTEM_Type * p_system_reg, cgc_system_clock_cfg_t * cfg);
113 static uint32_t r_cgc_clock_divider_get (R_SYSTEM_Type * p_system_reg, cgc_system_clocks_t clock);
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H A Dr_cgc_private.h67 bool r_cgc_clock_run_state_get (R_SYSTEM_Type * p_system_reg, cgc_clock_t clock);
68 cgc_operating_modes_t r_cgc_operating_mode_get (R_SYSTEM_Type * p_system_reg);
69 void r_cgc_operating_hw_modeset (R_SYSTEM_Type * p_system_reg, cgc_operating_modes_t operating_mode…
70 void r_cgc_hoco_wait_control_set (R_SYSTEM_Type * p_system_reg, uint8_t hoco_wait);
/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
H A Dbase_addresses.h195 #define R_SYSTEM ((R_SYSTEM_Type *) R_SYSC_BASE)
616 #define R_SYSTEM ((R_SYSTEM_Type *) R_SYSTEM_BASE)
H A Drenesas.h23099 } R_SYSTEM_Type; /*!< Size = 1792 (0x700) … typedef
/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/src/bsp/cmsis/Device/RENESAS/S1JA/Include/
H A DS1JA.h2779 } R_SYSTEM_Type; typedef
13509 #define R_SYSTEM ((R_SYSTEM_Type *) R_SYSTEM_BASE)