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Searched refs:COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h8396 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h8950 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT 0x0 macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h10389 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_9_2_1_sh_mask.h11667 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_9_4_3_sh_mask.h13381 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_9_1_sh_mask.h11866 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_9_4_2_sh_mask.h24360 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_11_5_0_sh_mask.h11595 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_11_0_0_sh_mask.h14780 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_12_0_0_sh_mask.h7573 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_11_0_3_sh_mask.h16932 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_10_1_0_sh_mask.h17266 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro
Dgc_10_3_0_sh_mask.h15578 #define COMPUTE_DISPATCH_ID__DISPATCH_ID__SHIFT … macro