1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef _SOC_DISPLAY_DSI_PHY_PLL_H 4 #define _SOC_DISPLAY_DSI_PHY_PLL_H 5 6 #include <types.h> 7 8 enum { 9 MDSS_DSI_PLL_10NM, 10 MDSS_UNKNOWN_PLL, 11 }; 12 13 struct mdss_pll_vco_calc { 14 s32 div_frac_start1; 15 s32 div_frac_start2; 16 s32 div_frac_start3; 17 s64 dec_start1; 18 s64 dec_start2; 19 s64 pll_plllock_cmp1; 20 s64 pll_plllock_cmp2; 21 s64 pll_plllock_cmp3; 22 }; 23 24 void dsi_phy_pll_vco_10nm_set_rate(unsigned long rate); 25 26 #endif 27