1/* 2 * 3 * Copyright 2013 Google Inc. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 .text 30 31 .align 6 32 .arm 33 .global exception_table 34exception_table: 35 b 1f 36 b 2f 37 b 3f 38 b 4f 39 b 5f 40 b 6f 41 b 7f 42 b 8f 43 441: 45 mov sp, #0 46 b exception_common 47 48/* Undefined Instruction (CAREFUL: the PC offset is specific to thumb mode!) */ 492: 50 sub lr, lr, #2 51 mov sp, #1 52 b exception_common 53 54/* Software Interrupt (no PC offset necessary) */ 553: 56 mov sp, #2 57 b exception_common 58 59/* Prefetch Abort */ 604: 61 sub lr, lr, #4 62 mov sp, #3 63 b exception_common 64 65/* Data Abort */ 665: 67 sub lr, lr, #8 68 mov sp, #4 69 b exception_common 70 71/* (not used) */ 726: 73 mov sp, #5 74 b exception_common 75 76/* Interrupt */ 777: 78 sub lr, lr, #4 79 mov sp, #6 80 b exception_common 81 82/* Fast Interrupt */ 838: 84 sub lr, lr, #4 85 mov sp, #7 86 b exception_common 87 88exception_common: 89 str sp, exception_idx 90 ldr sp, exception_state_ptr 91 stmia sp!, { r0 - r12 } /* Save regs from bottom to top */ 92 stmia sp, { sp, lr }^ /* Save banked SP/LR (no writeback) */ 93 str lr, [sp, #(4 * 2)] /* Save PC to ®s[13] + 2 */ 94 mrs r0, SPSR 95 str r0, [sp, #(4 * 3)] /* Save SPSR to ®s[13] + 3 */ 96 ldr sp, exception_stack_end /* Point SP to the stack for C code */ 97 ldr r0, exception_idx 98 blx exception_dispatch 99 ldr sp, exception_state_ptr 100 ldr r0, [sp, #(4 * 16)] /* Load SPSR from ®s[0] + 16... */ 101 msr SPSR_cxsf, r0 /* ...and get it out of the way */ 102 ldmia sp!, { r0 - r12 } /* Restore regs from bottom to top */ 103 ldmia sp, { sp, lr }^ /* Restore SP/LR to banked location */ 104 add sp, sp, #8 /* Adjust SP (no writeback allowed) */ 105 ldmia sp!, { pc }^ /* Do exception return (mode switch) */ 106 107 108 .align 2 109 .global exception_stack_end 110exception_stack_end: 111 .word 0 112 .global exception_state_ptr 113exception_state_ptr: 114 .word 0 115 116exception_idx: 117 .word 0 118 119 .thumb 120 .global set_vbar 121 .thumb_func 122set_vbar: 123 mcr p15, 0, r0, c12, c0, 0 124 bx lr 125