xref: /aosp_15_r20/external/coreboot/src/soc/intel/baytrail/romstage/gfx.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/pci_ops.h>
4 #include <soc/gfx.h>
5 #include <soc/pci_devs.h>
6 #include <soc/romstage.h>
7 
gfx_init(void)8 void gfx_init(void)
9 {
10 	uint32_t ggc;
11 	uint8_t msac;
12 	const unsigned int gfx_dev = PCI_DEV(0, GFX_DEV, GFX_FUNC);
13 
14 	/* The GFX device needs to set the aperture, gtt stolen size, and
15 	 * graphics stolen memory stolen size before running MRC. For now
16 	 * just hard code the defaults. Options can be added to the device
17 	 * tree if needed. */
18 
19 	ggc = pci_read_config32(gfx_dev, GGC);
20 	msac = pci_read_config8(gfx_dev, MSAC);
21 
22 	ggc &= ~(GGC_GTT_SIZE_MASK | GGC_GSM_SIZE_MASK);
23 	/* 32MB GSM is not supported with <C0 stepping. */
24 	ggc |= GGC_GTT_SIZE_2MB | GGC_GSM_SIZE_64MB;
25 	/* Enable VGA decoding as well. */
26 	ggc &= ~(GGC_VGA_DISABLE);
27 
28 	msac &= ~(APERTURE_SIZE_MASK);
29 	msac |= APERTURE_SIZE_256MB;
30 
31 	pci_write_config32(gfx_dev, GGC, ggc);
32 	pci_write_config8(gfx_dev, MSAC, msac);
33 }
34