1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <console/console.h>
4 #include <device/pci.h>
5 #include <arch/io.h>
6 #include <device/pci_ops.h>
7 #include "amd_pci_util.h"
8 #include <pc80/i8259.h>
9 #include "amd_pci_int_defs.h"
10 #include "amd_pci_int_types.h"
11
12 const struct pirq_struct * pirq_data_ptr = NULL;
13 u32 pirq_data_size = 0;
14 const u8 *intr_data_ptr = NULL;
15 const u8 *picr_data_ptr = NULL;
16
17 /*
18 * Read the FCH PCI_INTR registers 0xC00/0xC01 at a
19 * given index and a given PIC (0) or IOAPIC (1) mode
20 */
read_pci_int_idx(u8 index,int mode)21 u8 read_pci_int_idx(u8 index, int mode)
22 {
23 outb((mode << 7) | index, PCI_INTR_INDEX);
24 return inb(PCI_INTR_DATA);
25 }
26
27 /*
28 * Write a value to the FCH PCI_INTR registers 0xC00/0xC01
29 * at a given index and PIC (0) or IOAPIC (1) mode
30 */
write_pci_int_idx(u8 index,int mode,u8 data)31 void write_pci_int_idx(u8 index, int mode, u8 data)
32 {
33 outb((mode << 7) | index, PCI_INTR_INDEX);
34 outb(data, PCI_INTR_DATA);
35 }
36
37 /*
38 * Write the FCH PCI_INTR registers 0xC00/0xC01 with values
39 * given in global variables intr_data and picr_data.
40 * These variables are defined in mainboard.c
41 */
write_pci_int_table(void)42 void write_pci_int_table(void)
43 {
44 u8 byte;
45
46 if (picr_data_ptr == NULL || intr_data_ptr == NULL) {
47 printk(BIOS_ERR, "Warning: Can't write PCI_INTR 0xC00/0xC01 registers because\n"
48 "'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL\n");
49 return;
50 }
51
52 /* PIC IRQ routine */
53 printk(BIOS_DEBUG, "PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing:\n"
54 "\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n");
55 for (byte = 0; byte < FCH_INT_TABLE_SIZE; byte++) {
56 if (intr_types[byte]) {
57 write_pci_int_idx(byte, 0, (u8)picr_data_ptr[byte]);
58 printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n",
59 byte, intr_types[byte], read_pci_int_idx(byte, 0));
60 }
61 }
62
63 /* APIC IRQ routine */
64 printk(BIOS_DEBUG, "PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing:\n"
65 "\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n");
66 for (byte = 0; byte < FCH_INT_TABLE_SIZE; byte++) {
67 if (intr_types[byte]) {
68 write_pci_int_idx(byte, 1, (u8)intr_data_ptr[byte]);
69 printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n",
70 byte, intr_types[byte], read_pci_int_idx(byte, 1));
71 }
72 }
73 }
74
75 /*
76 * Function to write the PCI config space Interrupt
77 * registers based on the values given in PCI_INTR
78 * table at I/O port 0xC00/0xC01
79 */
write_pci_cfg_irqs(void)80 void write_pci_cfg_irqs(void)
81 {
82 struct device *dev = NULL; /* Our current device to route IRQs to */
83 struct device *target_dev = NULL; /* The bridge that a device may be connected to */
84 u16 int_pin = 0; /* Value of the INT_PIN register 0x3D */
85 u16 target_pin = 0; /* Pin we will search our tables for */
86 u16 int_line = 0; /* IRQ number read from PCI_INTR table and programmed to INT_LINE reg 0x3C */
87 u16 pci_intr_idx = 0; /* Index into PCI_INTR table, 0xC00/0xC01 */
88 u16 devfn = 0; /* A PCI Device and Function number */
89 u32 i = 0;
90
91 if (pirq_data_ptr == NULL) {
92 printk(BIOS_WARNING, "Can't write PCI IRQ assignments because"
93 " 'mainboard_pirq_data' structure does not exist\n");
94 return;
95 }
96
97 /* Populate the PCI cfg space header with the IRQ assignment */
98 printk(BIOS_DEBUG, "PCI_CFG IRQ: Write PCI config space IRQ assignments\n");
99
100 for (dev = all_devices; dev; dev = dev->next) {
101 /*
102 * Step 1: Get the INT_PIN and device structure to look for in the
103 * PCI_INTR table pirq_data
104 */
105 target_dev = NULL;
106 target_pin = get_pci_irq_pins(dev, &target_dev);
107 if (target_dev == NULL)
108 continue;
109
110 if (target_pin < 1)
111 continue;
112
113 /* Get the original INT_PIN for record keeping */
114 int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN);
115 if (int_pin < 1 || int_pin > 4)
116 continue; /* Device has invalid INT_PIN so skip it */
117
118 devfn = target_dev->path.pci.devfn;
119
120 /*
121 * Step 2: Use the INT_PIN and DevFn number to find the PCI_INTR
122 * register (0xC00) index for this device
123 */
124 pci_intr_idx = 0xBAD; /* Will check to make sure it changed */
125 for (i = 0; i < pirq_data_size; i++) {
126 if (pirq_data_ptr[i].devfn != devfn)
127 continue;
128
129 /* PIN_A is index 0 in pirq_data array but 1 in PCI cfg reg */
130 pci_intr_idx = pirq_data_ptr[i].PIN[target_pin - 1];
131 printk(BIOS_SPEW, "\tFound this device in pirq_data table entry %d\n", i);
132 break;
133 }
134
135 /*
136 * Step 3: Make sure we got a valid index and use it to get
137 * the IRQ number from the PCI_INTR register table
138 */
139 if (pci_intr_idx == 0xBAD) { /* Not on a bridge or in pirq_data table, skip it */
140 printk(BIOS_SPEW, "PCI Devfn (0x%x) not found in pirq_data table\n", devfn);
141 continue;
142 } else if (pci_intr_idx == 0x1F) { /* Index found is not defined */
143 printk(BIOS_SPEW, "Got index 0x1F (Not Connected), perhaps this device was defined wrong?\n");
144 continue;
145 } else if (pci_intr_idx >= FCH_INT_TABLE_SIZE) { /* Index out of bounds */
146 printk(BIOS_ERR, "%s: got 0xC00/0xC01 table index 0x%x, max is 0x%x\n",
147 __func__, pci_intr_idx, FCH_INT_TABLE_SIZE);
148 continue;
149 }
150
151 /* Find the value to program into the INT_LINE register from the PCI_INTR registers */
152 int_line = read_pci_int_idx(pci_intr_idx, 0);
153 if (int_line == PIRQ_NC) { /* The IRQ found is disabled */
154 printk(BIOS_SPEW, "Got IRQ 0x1F (disabled), perhaps this device was defined wrong?\n");
155 continue;
156 }
157
158 /*
159 * Step 4: Program the INT_LINE register in this device's
160 * PCI config space with the IRQ number we found in step 3
161 * and make it Level Triggered
162 */
163 pci_write_config8(dev, PCI_INTERRUPT_LINE, int_line);
164
165 /* Set this IRQ to level triggered since it is used by a PCI device */
166 i8259_configure_irq_trigger(int_line, IRQ_LEVEL_TRIGGERED);
167
168 /*
169 * Step 5: Print out debug info and move on to next device
170 */
171 printk(BIOS_SPEW, "\tOrig INT_PIN\t: %d (%s)\n",
172 int_pin, pin_to_str(int_pin));
173
174 printk(BIOS_SPEW, "\tPCI_INTR idx\t: 0x%02x (%s)\n"
175 "\tINT_LINE\t: 0x%X (IRQ %d)\n",
176 pci_intr_idx, intr_types[pci_intr_idx], int_line, int_line);
177 } /* for (dev = all_devices) */
178 printk(BIOS_DEBUG, "PCI_CFG IRQ: Finished writing PCI config space IRQ assignments\n");
179 }
180