1 /* 2 * 3 * Copyright 2014 Google Inc. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _ARCH_EXCEPTION_H 30 #define _ARCH_EXCEPTION_H 31 32 #define EXCEPTION_STATE_ELR 0x0 33 #define EXCEPTION_STATE_ESR 0x8 34 #define EXCEPTION_STATE_SPSR 0x10 35 #define EXCEPTION_STATE_SP 0x18 36 #define EXCEPTION_STATE_REG(r) (0x20 + r * 0x8) 37 38 #define ESR_EC_UNKNOWN 0b000000 39 #define ESR_EC_SVC_64 0b010101 40 #define ESR_EC_INSN_ABT_LOWER 0b100000 41 #define ESR_EC_INSN_ABT_SAME 0b100001 42 #define ESR_EC_DATA_ABT_LOWER 0b100100 43 #define ESR_EC_DATA_ABT_SAME 0b100101 44 #define ESR_EC_SERROR 0b101111 45 #define ESR_EC_SS_SAME 0b110011 46 #define ESR_EC_BKPT_64 0b111100 47 48 #define MDCR_TDE (1 << 8) 49 50 #define MDSCR_SS (1 << 0) 51 #define MDSCR_KDE (1 << 13) 52 #define MDSCR_MDE (1 << 15) 53 54 #ifndef __ASSEMBLER__ 55 56 #include <stddef.h> 57 #include <stdint.h> 58 59 struct exception_state 60 { 61 uint64_t elr; 62 union { 63 uint64_t esr; 64 union { 65 struct { 66 uint64_t iss : 25; 67 uint64_t il : 1; 68 uint64_t ec : 6; 69 uint64_t _res0 : 32; 70 }; 71 struct { 72 uint64_t isfc : 6; 73 uint64_t _res0 : 1; 74 uint64_t s1ptw : 1; 75 uint64_t _res1 : 1; 76 uint64_t ea : 1; 77 uint64_t fnv : 1; 78 uint64_t _res2 : 53; 79 } insn_abt; 80 }; 81 }; 82 union { 83 uint32_t spsr; 84 struct { 85 uint32_t sp : 1; /* M[0] */ 86 uint32_t _res0 : 1; /* M[1] */ 87 uint32_t el : 2; /* M[3:2] */ 88 uint32_t arch : 1; /* M[4] */ 89 uint32_t _res1 : 1; 90 uint32_t f : 1; 91 uint32_t i : 1; 92 uint32_t a : 1; 93 uint32_t d : 1; 94 uint32_t _res2 : 10; 95 uint32_t il : 1; 96 uint32_t ss : 1; 97 uint32_t _res3 : 6; 98 uint32_t v : 1; 99 uint32_t c : 1; 100 uint32_t z : 1; 101 uint32_t n : 1; 102 } pstate; 103 }; 104 uint32_t spsr_high_unused; 105 uint64_t sp; 106 uint64_t regs[31]; 107 } __packed; 108 109 #define CHECK_ES(field, constant) \ 110 _Static_assert(offsetof(struct exception_state, field) == constant, \ 111 "(struct exception_state)." #field " doesn't match constant " #constant) 112 CHECK_ES(elr, EXCEPTION_STATE_ELR); 113 CHECK_ES(esr, EXCEPTION_STATE_ESR); 114 CHECK_ES(spsr, EXCEPTION_STATE_SPSR); 115 CHECK_ES(sp, EXCEPTION_STATE_SP); 116 CHECK_ES(regs[0], EXCEPTION_STATE_REG(0)); 117 CHECK_ES(regs[30], EXCEPTION_STATE_REG(30)); 118 119 extern struct exception_state exception_state; 120 extern u64 exception_stack[]; 121 extern u64 *exception_stack_end; 122 123 void exception_set_state_ptr(struct exception_state *exception_state_ptr); 124 125 enum { 126 EXC_SYNC_SP0 = 0, 127 EXC_IRQ_SP0, 128 EXC_FIQ_SP0, 129 EXC_SERROR_SP0, 130 EXC_SYNC_SPX, 131 EXC_IRQ_SPX, 132 EXC_FIQ_SPX, 133 EXC_SERROR_SPX, 134 EXC_SYNC_ELX_64, 135 EXC_IRQ_ELX_64, 136 EXC_FIQ_ELX_64, 137 EXC_SERROR_ELX_64, 138 EXC_SYNC_ELX_32, 139 EXC_IRQ_ELX_32, 140 EXC_FIQ_ELX_32, 141 EXC_SERROR_ELX_32, 142 EXC_COUNT 143 }; 144 145 #endif /* !__ASSEMBLER__ */ 146 147 #endif 148