xref: /aosp_15_r20/external/mesa3d/src/freedreno/ir2/instr-a2xx.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright © 2012 Rob Clark <[email protected]>
3  * SPDX-License-Identifier: MIT
4  */
5 
6 #ifndef INSTR_A2XX_H_
7 #define INSTR_A2XX_H_
8 
9 #define PACKED __attribute__((__packed__))
10 
11 #include "util/u_math.h"
12 #include "adreno_common.xml.h"
13 #include "adreno_pm4.xml.h"
14 #include "a2xx.xml.h"
15 
16 /*
17  * ALU instructions:
18  */
19 
20 typedef enum {
21    ADDs = 0,
22    ADD_PREVs = 1,
23    MULs = 2,
24    MUL_PREVs = 3,
25    MUL_PREV2s = 4,
26    MAXs = 5,
27    MINs = 6,
28    SETEs = 7,
29    SETGTs = 8,
30    SETGTEs = 9,
31    SETNEs = 10,
32    FRACs = 11,
33    TRUNCs = 12,
34    FLOORs = 13,
35    EXP_IEEE = 14,
36    LOG_CLAMP = 15,
37    LOG_IEEE = 16,
38    RECIP_CLAMP = 17,
39    RECIP_FF = 18,
40    RECIP_IEEE = 19,
41    RECIPSQ_CLAMP = 20,
42    RECIPSQ_FF = 21,
43    RECIPSQ_IEEE = 22,
44    MOVAs = 23,
45    MOVA_FLOORs = 24,
46    SUBs = 25,
47    SUB_PREVs = 26,
48    PRED_SETEs = 27,
49    PRED_SETNEs = 28,
50    PRED_SETGTs = 29,
51    PRED_SETGTEs = 30,
52    PRED_SET_INVs = 31,
53    PRED_SET_POPs = 32,
54    PRED_SET_CLRs = 33,
55    PRED_SET_RESTOREs = 34,
56    KILLEs = 35,
57    KILLGTs = 36,
58    KILLGTEs = 37,
59    KILLNEs = 38,
60    KILLONEs = 39,
61    SQRT_IEEE = 40,
62    MUL_CONST_0 = 42,
63    MUL_CONST_1 = 43,
64    ADD_CONST_0 = 44,
65    ADD_CONST_1 = 45,
66    SUB_CONST_0 = 46,
67    SUB_CONST_1 = 47,
68    SIN = 48,
69    COS = 49,
70    RETAIN_PREV = 50,
71    SCALAR_NONE = 63,
72 } instr_scalar_opc_t;
73 
74 typedef enum {
75    ADDv = 0,
76    MULv = 1,
77    MAXv = 2,
78    MINv = 3,
79    SETEv = 4,
80    SETGTv = 5,
81    SETGTEv = 6,
82    SETNEv = 7,
83    FRACv = 8,
84    TRUNCv = 9,
85    FLOORv = 10,
86    MULADDv = 11,
87    CNDEv = 12,
88    CNDGTEv = 13,
89    CNDGTv = 14,
90    DOT4v = 15,
91    DOT3v = 16,
92    DOT2ADDv = 17,
93    CUBEv = 18,
94    MAX4v = 19,
95    PRED_SETE_PUSHv = 20,
96    PRED_SETNE_PUSHv = 21,
97    PRED_SETGT_PUSHv = 22,
98    PRED_SETGTE_PUSHv = 23,
99    KILLEv = 24,
100    KILLGTv = 25,
101    KILLGTEv = 26,
102    KILLNEv = 27,
103    DSTv = 28,
104    MOVAv = 29,
105    VECTOR_NONE = 31,
106 } instr_vector_opc_t;
107 
108 typedef struct PACKED {
109    /* dword0: */
110    uint8_t vector_dest : 6;
111    uint8_t vector_dest_rel : 1;
112    uint8_t low_precision_16b_fp : 1;
113    uint8_t scalar_dest : 6;
114    uint8_t scalar_dest_rel : 1;
115    uint8_t export_data : 1;
116    uint8_t vector_write_mask : 4;
117    uint8_t scalar_write_mask : 4;
118    uint8_t vector_clamp : 1;
119    uint8_t scalar_clamp : 1;
120    instr_scalar_opc_t scalar_opc : 6;
121    /* dword1: */
122    uint8_t src3_swiz : 8;
123    uint8_t src2_swiz : 8;
124    uint8_t src1_swiz : 8;
125    uint8_t src3_reg_negate : 1;
126    uint8_t src2_reg_negate : 1;
127    uint8_t src1_reg_negate : 1;
128    uint8_t pred_select : 2;
129    uint8_t relative_addr : 1;
130    uint8_t const_1_rel_abs : 1;
131    uint8_t const_0_rel_abs : 1;
132    /* dword2: */
133    union {
134       struct {
135          uint8_t src3_reg : 6;
136          uint8_t src3_reg_select : 1;
137          uint8_t src3_reg_abs : 1;
138          uint8_t src2_reg : 6;
139          uint8_t src2_reg_select : 1;
140          uint8_t src2_reg_abs : 1;
141          uint8_t src1_reg : 6;
142          uint8_t src1_reg_select : 1;
143          uint8_t src1_reg_abs : 1;
144       };
145       /* constants have full 8-bit index */
146       struct {
147          uint8_t src3_reg_byte : 8;
148          uint8_t src2_reg_byte : 8;
149          uint8_t src1_reg_byte : 8;
150       };
151    };
152    instr_vector_opc_t vector_opc : 5;
153    uint8_t src3_sel : 1;
154    uint8_t src2_sel : 1;
155    uint8_t src1_sel : 1;
156 } instr_alu_t;
157 
158 /*
159  * CF instructions:
160  */
161 
162 typedef enum {
163    NOP = 0,
164    EXEC = 1,
165    EXEC_END = 2,
166    COND_EXEC = 3,
167    COND_EXEC_END = 4,
168    COND_PRED_EXEC = 5,
169    COND_PRED_EXEC_END = 6,
170    LOOP_START = 7,
171    LOOP_END = 8,
172    COND_CALL = 9,
173    RETURN = 10,
174    COND_JMP = 11,
175    ALLOC = 12,
176    COND_EXEC_PRED_CLEAN = 13,
177    COND_EXEC_PRED_CLEAN_END = 14,
178    MARK_VS_FETCH_DONE = 15,
179 } instr_cf_opc_t;
180 
181 typedef enum {
182    RELATIVE_ADDR = 0,
183    ABSOLUTE_ADDR = 1,
184 } instr_addr_mode_t;
185 
186 typedef enum {
187    SQ_NO_ALLOC = 0,
188    SQ_POSITION = 1,
189    SQ_PARAMETER_PIXEL = 2,
190    SQ_MEMORY = 3,
191 } instr_alloc_type_t;
192 
193 typedef struct PACKED {
194    uint16_t address : 9;
195    uint8_t reserved0 : 3;
196    uint8_t count : 3;
197    uint8_t yeild : 1;
198    uint16_t serialize : 12;
199    uint32_t vc : 6; /* vertex cache? */
200    uint32_t bool_addr : 8;
201    uint8_t condition : 1;
202    instr_addr_mode_t address_mode : 1;
203    instr_cf_opc_t opc : 4;
204 } instr_cf_exec_t;
205 
206 typedef struct PACKED {
207    uint16_t address : 10;
208    uint8_t reserved0 : 6;
209    uint8_t loop_id : 5;
210    uint32_t reserved1 : 22;
211    instr_addr_mode_t address_mode : 1;
212    instr_cf_opc_t opc : 4;
213 } instr_cf_loop_t;
214 
215 typedef struct PACKED {
216    uint16_t address : 10;
217    uint8_t reserved0 : 3;
218    uint8_t force_call : 1;
219    uint8_t predicated_jmp : 1;
220    uint32_t reserved1 : 18;
221    uint8_t direction : 1;
222    uint32_t bool_addr : 8;
223    uint8_t condition : 1;
224    instr_addr_mode_t address_mode : 1;
225    instr_cf_opc_t opc : 4;
226 } instr_cf_jmp_call_t;
227 
228 typedef struct PACKED {
229    uint8_t size : 4;
230    uint64_t reserved0 : 36;
231    uint8_t no_serial : 1;
232    instr_alloc_type_t buffer_select : 2;
233    uint8_t alloc_mode : 1;
234    instr_cf_opc_t opc : 4;
235 } instr_cf_alloc_t;
236 
237 typedef union PACKED {
238    instr_cf_exec_t exec;
239    instr_cf_loop_t loop;
240    instr_cf_jmp_call_t jmp_call;
241    instr_cf_alloc_t alloc;
242    struct PACKED {
243       uint64_t dummy : 44;
244       instr_cf_opc_t opc : 4;
245    };
246 } instr_cf_t;
247 
248 /*
249  * FETCH instructions:
250  */
251 
252 typedef enum {
253    VTX_FETCH = 0,
254    TEX_FETCH = 1,
255    TEX_GET_BORDER_COLOR_FRAC = 16,
256    TEX_GET_COMP_TEX_LOD = 17,
257    TEX_GET_GRADIENTS = 18,
258    TEX_GET_WEIGHTS = 19,
259    TEX_SET_TEX_LOD = 24,
260    TEX_SET_GRADIENTS_H = 25,
261    TEX_SET_GRADIENTS_V = 26,
262    TEX_RESERVED_4 = 27,
263 } instr_fetch_opc_t;
264 
265 typedef enum {
266    TEX_FILTER_POINT = 0,
267    TEX_FILTER_LINEAR = 1,
268    TEX_FILTER_BASEMAP = 2, /* only applicable for mip-filter */
269    TEX_FILTER_USE_FETCH_CONST = 3,
270 } instr_tex_filter_t;
271 
272 typedef enum {
273    ANISO_FILTER_DISABLED = 0,
274    ANISO_FILTER_MAX_1_1 = 1,
275    ANISO_FILTER_MAX_2_1 = 2,
276    ANISO_FILTER_MAX_4_1 = 3,
277    ANISO_FILTER_MAX_8_1 = 4,
278    ANISO_FILTER_MAX_16_1 = 5,
279    ANISO_FILTER_USE_FETCH_CONST = 7,
280 } instr_aniso_filter_t;
281 
282 typedef enum {
283    ARBITRARY_FILTER_2X4_SYM = 0,
284    ARBITRARY_FILTER_2X4_ASYM = 1,
285    ARBITRARY_FILTER_4X2_SYM = 2,
286    ARBITRARY_FILTER_4X2_ASYM = 3,
287    ARBITRARY_FILTER_4X4_SYM = 4,
288    ARBITRARY_FILTER_4X4_ASYM = 5,
289    ARBITRARY_FILTER_USE_FETCH_CONST = 7,
290 } instr_arbitrary_filter_t;
291 
292 typedef enum {
293    SAMPLE_CENTROID = 0,
294    SAMPLE_CENTER = 1,
295 } instr_sample_loc_t;
296 
297 typedef enum a2xx_sq_surfaceformat instr_surf_fmt_t;
298 
299 typedef struct PACKED {
300    /* dword0: */
301    instr_fetch_opc_t opc : 5;
302    uint32_t src_reg : 6;
303    uint8_t src_reg_am : 1;
304    uint32_t dst_reg : 6;
305    uint8_t dst_reg_am : 1;
306    uint8_t fetch_valid_only : 1;
307    uint32_t const_idx : 5;
308    uint8_t tx_coord_denorm : 1;
309    uint8_t src_swiz : 6;
310    /* dword1: */
311    uint16_t dst_swiz : 12;
312    instr_tex_filter_t mag_filter : 2;
313    instr_tex_filter_t min_filter : 2;
314    instr_tex_filter_t mip_filter : 2;
315    instr_aniso_filter_t aniso_filter : 3;
316    instr_arbitrary_filter_t arbitrary_filter : 3;
317    instr_tex_filter_t vol_mag_filter : 2;
318    instr_tex_filter_t vol_min_filter : 2;
319    uint8_t use_comp_lod : 1;
320    uint8_t use_reg_lod : 2; /* 0 for cube, 1 for 2d */
321    uint8_t pred_select : 1;
322    /* dword2: */
323    uint8_t use_reg_gradients : 1;
324    instr_sample_loc_t sample_location : 1;
325    uint32_t lod_bias : 7;
326    uint8_t unused : 7;
327    uint8_t offset_x : 5;
328    uint32_t offset_y : 5;
329    uint8_t offset_z : 5;
330    uint8_t pred_condition : 1;
331 } instr_fetch_tex_t;
332 
333 typedef struct PACKED {
334    /* dword0: */
335    instr_fetch_opc_t opc : 5;
336    uint32_t src_reg : 6;
337    uint8_t src_reg_am : 1;
338    uint32_t dst_reg : 6;
339    uint8_t dst_reg_am : 1;
340    uint8_t must_be_one : 1;
341    uint32_t const_index : 5;
342    uint8_t const_index_sel : 2;
343    uint8_t reserved0 : 3;
344    uint8_t src_swiz : 2;
345    /* dword1: */
346    uint16_t dst_swiz : 12;
347    uint8_t format_comp_all : 1; /* '1' for signed, '0' for unsigned? */
348    uint8_t num_format_all : 1;  /* '0' for normalized, '1' for unnormalized */
349    uint8_t signed_rf_mode_all : 1;
350    uint8_t reserved1 : 1;
351    instr_surf_fmt_t format : 6;
352    uint8_t reserved2 : 2;
353    uint8_t exp_adjust_all : 6;
354    uint8_t reserved3 : 1;
355    uint8_t pred_select : 1;
356    /* dword2: */
357    uint8_t stride : 8;
358    uint32_t offset : 22;
359    uint8_t reserved4 : 1;
360    uint8_t pred_condition : 1;
361 } instr_fetch_vtx_t;
362 
363 typedef union PACKED {
364    instr_fetch_tex_t tex;
365    instr_fetch_vtx_t vtx;
366    struct PACKED {
367       /* dword0: */
368       instr_fetch_opc_t opc : 5;
369       uint32_t dummy0 : 27;
370       /* dword1: */
371       uint32_t dummy1 : 31;
372       uint8_t pred_select : 1;
373       /* dword2: */
374       uint32_t dummy2 : 31;
375       uint8_t pred_condition : 1;
376    };
377 } instr_fetch_t;
378 
379 typedef union PACKED {
380    instr_alu_t alu;
381    instr_fetch_t fetch;
382 } instr_t;
383 
384 #endif /* INSTR_H_ */
385