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/linux-6.14.4/Documentation/devicetree/bindings/riscv/
Dextensions.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V ISA extensions
10 - Paul Walmsley <[email protected]>
11 - Palmer Dabbelt <[email protected]>
12 - Conor Dooley <[email protected]>
15 RISC-V has a large number of extensions, some of which are "standard"
16 extensions, meaning they are ratified by RISC-V International, and others
36 Identifies the specific RISC-V instruction set architecture
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/linux-6.14.4/Documentation/arch/riscv/
Duabi.rst1 .. SPDX-License-Identifier: GPL-2.0
3 RISC-V Linux User ABI
7 ------------------------------------
14 #. Single-letter extensions come first, in canonical order.
17 #. All multi-letter extensions will be separated from other extensions by an
21 single-letter extensions and before any higher-privileged extensions.
29 #. Standard supervisor-level extensions (starting with 'S') will be listed
30 after standard unprivileged extensions. If multiple supervisor-level
33 #. Standard machine-level extensions (starting with 'Zxm') will be listed
34 after any lower-privileged, standard extensions. If multiple machine-level
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/linux-6.14.4/Documentation/virt/kvm/x86/
Dhypercalls.rst1 .. SPDX-License-Identifier: GPL-2.0
8 KVM Hypercalls have a three-byte sequence of either the vmcall or the vmmcall
18 R2-R7 are used for parameters 1-6. In addition, R1 is used for hypercall
25 refer to Documentation/virt/kvm/s390/s390-diag.rst.
28 It uses R3-R10 and hypercall number in R11. R4-R11 are used as output registers.
31 KVM hypercalls uses 4 byte opcode, that are patched with 'hypercall-instructions'
33 For more information refer to Documentation/virt/kvm/ppc-pv.rst
37 number in $2 (v0). Up to four arguments may be placed in $4-$7 (a0-a3) and
50 ------------------------
58 ----------------
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/linux-6.14.4/Documentation/userspace-api/
Dseccomp_filter.rst25 to time-of-check-time-of-use (TOCTOU) attacks that are common in system
46 An additional seccomp mode is added and is enabled using the same
65 call will return -1 and set errno to ``EINVAL``.
73 true, ``-EACCES`` will be returned. This requirement ensures that filter
82 The above call returns 0 on success and non-zero on error.
106 task without executing the system call. ``siginfo->si_call_addr``
108 ``siginfo->si_syscall`` and ``siginfo->si_arch`` will indicate which
111 instruction). The return value register will contain an arch-
112 dependent value -- if resuming execution, set it to something
114 it with ``-ENOSYS`` could overwrite some useful information.)
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/linux-6.14.4/arch/x86/kernel/fpu/
Dxstate.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 xsave->header.xcomp_bv = mask | XCOMP_BV_COMPACTED_FORMAT; in xstate_init_xcomp_bv()
25 struct fpu *fpu = &current->group_leader->thread.fpu; in xstate_get_group_perm()
29 perm = guest ? &fpu->guest_perm : &fpu->perm; in xstate_get_group_perm()
30 return READ_ONCE(perm->__state_perm); in xstate_get_group_perm()
49 enum xstate_copy_mode mode);
83 /* Mark PKRU as in-use so that it is restored correctly. */ in update_pkru_in_sigframe()
86 err = __put_user(xstate_bv, &buf->header.xfeatures); in update_pkru_in_sigframe()
124 * If XSAVES is enabled, it replaces XSAVEC because it supports supervisor
178 u64 xfd = fpstate->xfd; in xfd_update_state()
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/linux-6.14.4/arch/powerpc/include/asm/
Dreg.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * number used in the Programming Environments Manual For 32-Bit
17 #include <asm/asm-const.h>
18 #include <asm/feature-fixups.h>
31 #define MSR_SF_LG 63 /* Enable 64 bit mode */
49 #define MSR_FE0_LG 11 /* Floating Exception mode 0 */
53 #define MSR_FE1_LG 8 /* Floating Exception mode 1 */
58 #define MSR_PX_LG 2 /* Protection Exclusive Mode */
70 #define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */
74 /* so tests for these bits fail on 32-bit */
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/linux-6.14.4/Documentation/virt/kvm/
Dppc-pv.rst1 .. SPDX-License-Identifier: GPL-2.0
35 'hypercall-instructions'. This property contains at most 4 opcodes that make
43 r0 - volatile
53 r12 - volatile
74 page that contains parts of supervisor visible register state. The guest can
79 MMU is enabled. The second parameter indicates the address in real mode, if
80 applicable to the target. For now, we always map the page to -4096. This way we
84 ld rX, -4096(0)
133 - MSR_EE
134 - MSR_RI
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Dapi.rst1 .. SPDX-License-Identifier: GPL-2.0
4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation
24 - System ioctls: These query and set global attributes which affect the
28 - VM ioctls: These query and set attributes that affect an entire virtual
35 - vcpu ioctls: These query and set attributes that control the operation
43 - device ioctls: These query and set attributes that control the operation
92 facility that allows backward-compatible extensions to the API to be
133 -----------------------
150 -----------------
178 memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the
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/linux-6.14.4/tools/arch/x86/kcpuid/
Dcpuid.csv1 # SPDX-License-Identifier: CC0-1.0
2 # Generator: x86-cpuid-db v1.0
5 # Auto-generated file.
6 # Please submit all updates and bugfixes to https://x86-cpuid.org
16 0, 0, ebx, 31:0, cpu_vendorid_0 , CPU vendor ID string bytes 0 - 3
17 0, 0, ecx, 31:0, cpu_vendorid_2 , CPU vendor ID string bytes 8 - 11
18 0, 0, edx, 31:0, cpu_vendorid_1 , CPU vendor ID string bytes 4 - 7
35 1, 0, ecx, 2, dtes64 , 64-bit DS save area
39 1, 0, ecx, 6, smx , Safer Mode Extensions
49 1, 0, ecx, 17, pcid , Process-context identifiers
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/linux-6.14.4/arch/m68k/ifpsp060/src/
Disp.S3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
98 mov.l %d0,-(%sp)
99 mov.l (_060ISP_TABLE-0x80+_off_chk,%pc),%d0
100 pea.l (_060ISP_TABLE-0x80,%pc,%d0)
106 mov.l %d0,-(%sp)
107 mov.l (_060ISP_TABLE-0x80+_off_divbyzero,%pc),%d0
108 pea.l (_060ISP_TABLE-0x80,%pc,%d0)
114 mov.l %d0,-(%sp)
115 mov.l (_060ISP_TABLE-0x80+_off_trace,%pc),%d0
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/linux-6.14.4/arch/x86/include/asm/
Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 22 /* N 32-bit words worth of info */
17 #define NBUGINTS 2 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* "vme" Virtual Mode Extensions */
34 #define X86_FEATURE_MSR ( 0*32+ 5) /* "msr" Model-Specific Registers */
45 #define X86_FEATURE_PSE36 ( 0*32+17) /* "pse36" 36-bit PSEs */
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/linux-6.14.4/tools/arch/x86/include/asm/
Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 22 /* N 32-bit words worth of info */
17 #define NBUGINTS 2 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* "vme" Virtual Mode Extensions */
34 #define X86_FEATURE_MSR ( 0*32+ 5) /* "msr" Model-Specific Registers */
45 #define X86_FEATURE_PSE36 ( 0*32+17) /* "pse36" 36-bit PSEs */
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/linux-6.14.4/drivers/iommu/amd/
Damd_iommu_types.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
21 #include <linux/io-pgtable.h>
116 * The current driver only support 16-bit PASID.
117 * Currently, hardware only implement upto 16-bit PASID
259 #define PPR_FLAG_US 0x040 /* 1: User, 0: Supervisor */
300 /* Special mode where page-sizes are limited to 4 KiB */
336 ((1ULL << PM_LEVEL_SHIFT((x))) - 1): \
347 (~((1ULL << (12 + ((lvl) * 9))) - 1)))
352 * Pagesize is expected to be a power-of-two
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/linux-6.14.4/arch/x86/kvm/mmu/
Dmmu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
57 #include <asm/spec-ctrl.h>
64 int __read_mostly nx_huge_pages = -1;
100 * When setting this variable to true it enables Two-Dimensional-Paging
102 * 1. the guest-virtual to guest-physical
103 * 2. while doing 1. it walks guest-physical to host-physical
203 return !!(regs->reg & flag); \
225 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \
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/linux-6.14.4/arch/powerpc/kernel/
Dprocess.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Copyright (C) 1995-1996 Gary Thomas ([email protected])
57 #include <asm/text-patching.h>
61 #include <asm/asm-prototypes.h>
77 * Are we running in "Suspend disabled" mode? If so we have to block any
91 if (tsk == current && tsk->thread.regs && in check_if_tm_restore_required()
92 MSR_TM_ACTIVE(tsk->thread.regs->msr) && in check_if_tm_restore_required()
94 regs_set_return_msr(&tsk->thread.ckpt_regs, in check_if_tm_restore_required()
95 tsk->thread.regs->msr); in check_if_tm_restore_required()
156 msr = tsk->thread.regs->msr; in __giveup_fpu()
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/linux-6.14.4/arch/powerpc/kvm/
Dbook3s_hv_uvmem.c1 // SPDX-License-Identifier: GPL-2.0
10 * A pseries guest can be run as secure guest on Ultravisor-enabled
15 * The page-in or page-out requests from UV will come to HV as hcalls and
31 * kvm->arch.uvmem_lock is a per-guest lock that prevents concurrent
32 * page-in and page-out requests for the same GPA. Concurrent accesses
37 * migrate_vma routines and page-in/out routines.
39 * Per-guest mutex comes with a cost though. Mainly it serializes the
40 * fault path as page-out can occur when HV faults on accessing secure
41 * guest pages. Currently UV issues page-in requests for all the guest
43 * not a cause for concern. Also currently the number of page-outs caused
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Dbooke.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2010-2011 Freescale Semiconductor, Inc.
94 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip, in kvmppc_dump_vcpu()
95 vcpu->arch.shared->msr); in kvmppc_dump_vcpu()
96 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link, in kvmppc_dump_vcpu()
97 vcpu->arch.regs.ctr); in kvmppc_dump_vcpu()
98 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, in kvmppc_dump_vcpu()
99 vcpu->arch.shared->srr1); in kvmppc_dump_vcpu()
101 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); in kvmppc_dump_vcpu()
119 vcpu->arch.shadow_msr &= ~MSR_SPE; in kvmppc_vcpu_disable_spe()
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/linux-6.14.4/arch/x86/kvm/vmx/
Dvmx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
31 #include <linux/entry-kvm.h>
50 #include <asm/spec-ctrl.h>
77 MODULE_DESCRIPTION("KVM support for VMX (Intel VT-x) extensions");
140 /* Guest_tsc -> host_tsc conversion requires 64-bit division. */
192 * These 2 parameters are used to config the controls for Pause-Loop Exiting:
208 /* Default doubles per-vcpu window every exit. */
212 /* Default resets per-vcpu window every exit to ple_window. */
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/linux-6.14.4/Documentation/admin-guide/
Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nocmcff -- Disable firmware first mode for corrected
28 nospcr -- disable console in ACPI SPCR table as
45 If set to vendor, prefer vendor-specific driver
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