xref: /XiangShan/README.md (revision a2ba9cdc3eb2d0f5c0550daa13e52d06811c01d8)
105f23f57SWilliam Wang# XiangShan
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3*a2ba9cdcSYinan XuXiangShan is an open-source high-performance RISC-V processor.
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5*a2ba9cdcSYinan XuNOTE: XiangShan has not been officially released to the public open-source community.
6*a2ba9cdcSYinan XuLicense and docs to be added later.
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8*a2ba9cdcSYinan XuCopyright 2020-2021 by Institute of Computing Technology, Chinese Academy of Sciences.
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10*a2ba9cdcSYinan Xu## Prepare environment
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12*a2ba9cdcSYinan Xu* Set environment variable `NEMU_HOME` to the **absolute path** of the [NEMU project](https://github.com/OpenXiangShan/NEMU).
13*a2ba9cdcSYinan Xu* Set environment variable `NOOP_HOME` to the **absolute path** of the XiangShan project.
14*a2ba9cdcSYinan Xu* Set environment variable `AM_HOME` to the **absolute path** of the [AM project](https://github.com/OpenXiangShan/nexus-am).
15*a2ba9cdcSYinan Xu* Install `mill`. Refer to [the Manual section in this guide](https://com-lihaoyi.github.io/mill/mill/Intro_to_Mill.html#_installation).
16*a2ba9cdcSYinan Xu* Run `make init` to initialize submodules.
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18*a2ba9cdcSYinan Xu## Run simulation
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20*a2ba9cdcSYinan Xu* Install [Verilator](https://verilator.org/guide/latest/), the open-source Verilog simulator.
21*a2ba9cdcSYinan Xu* Run `make emu` to build the C++ simulator `./build/emu` with Verilator.
22*a2ba9cdcSYinan Xu* Refer to `./build/emu --help` for run-time arguments of the simulator.
23*a2ba9cdcSYinan Xu* Refer to `Makefile` and `verilator.mk` for more information.
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2505f23f57SWilliam WangExample:
26*a2ba9cdcSYinan Xu```bash
27*a2ba9cdcSYinan Xumake emu CONFIG=MinimalConfig SIM_ARGS=--disable-log EMU_THREADS=2 -j10
28*a2ba9cdcSYinan Xu./build/emu -b 0 -e 0 -i $AM_HOME/apps/coremark/build/coremark-riscv64-noop.bin
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31*a2ba9cdcSYinan Xu## Generate Verilog
32*a2ba9cdcSYinan Xu* Run `make verilog` to generate verilog code. The output file is `build/XSTop.v`.
33*a2ba9cdcSYinan Xu* Refer to `Makefile` for more information.
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