1package utils 2 3import chisel3._ 4import freechips.rocketchip.tilelink.{TLBundle, TLBundleA, TLBundleB, TLBundleC, TLBundleD, TLBundleE, TLChannel} 5import xiangshan.HasXSLog 6 7trait HasTLDump { this: HasXSLog => 8 9 implicit class dumpA(a: TLBundleA) { 10 def dump = 11 XSDebug(false, true.B, 12 a.channelName + " opcode: %x param: %x size: %x source: %d address: %x mask: %x data: %x corrupt: %b\n", 13 a.opcode, a.param, a.size, a.source, a.address, a.mask, a.data, a.corrupt 14 ) 15 } 16 17 implicit class dumpB(b: TLBundleB) { 18 def dump = 19 XSDebug(false, true.B, 20 b.channelName + " opcode: %x param: %x size: %x source: %d address: %x mask: %x data: %x corrupt: %b\n", 21 b.opcode, b.param, b.size, b.source, b.address, b.mask, b.data, b.corrupt 22 ) 23 } 24 25 implicit class dumpC(c: TLBundleC) { 26 def dump = 27 XSDebug(false, true.B, 28 c.channelName + " opcode: %x param: %x size: %x source: %d address: %x data: %x corrupt: %b\n", 29 c.opcode, c.param, c.size, c.source, c.address, c.data, c.corrupt 30 ) 31 } 32 33 implicit class dumpD(d: TLBundleD) { 34 def dump = 35 XSDebug(false, true.B, 36 d.channelName + " opcode: %x param: %x size: %x source: %d sink: %d denied: %b data: %x corrupt: %b\n", 37 d.opcode, d.param, d.size, d.source, d.sink, d.denied, d.data, d.corrupt 38 ) 39 } 40 41 implicit class dumpE(e: TLBundleE) { 42 def dump = 43 XSDebug(false, true.B, e.channelName + " sink: %d\n", e.sink) 44 } 45} 46