1package xiangshan.backend.rename 2 3import chisel3._ 4import chisel3.util._ 5import xiangshan._ 6import utils.{ParallelOR, XSDebug} 7 8class BusyTable(numReadPorts: Int, numWritePorts: Int) extends XSModule { 9 val io = IO(new Bundle() { 10 val flush = Input(Bool()) 11 // set preg state to busy 12 val allocPregs = Vec(RenameWidth, Flipped(ValidIO(UInt(PhyRegIdxWidth.W)))) 13 // set preg state to ready (write back regfile + roq walk) 14 val wbPregs = Vec(numWritePorts, Flipped(ValidIO(UInt(PhyRegIdxWidth.W)))) 15 // set preg state to busy when replay 16 val replayPregs = Vec(ReplayWidth, Flipped(ValidIO(UInt(PhyRegIdxWidth.W)))) 17 // read preg state 18 val rfReadAddr = Vec(numReadPorts, Input(UInt(PhyRegIdxWidth.W))) 19 val pregRdy = Vec(numReadPorts, Output(Bool())) 20 }) 21 22 val table = RegInit(0.U(NRPhyRegs.W)) 23 24 def reqVecToMask(rVec: Vec[Valid[UInt]]): UInt = { 25 ParallelOR(rVec.map(v => Mux(v.valid, UIntToOH(v.bits), 0.U))) 26 } 27 28 val wbMask = reqVecToMask(io.wbPregs) 29 val allocMask = reqVecToMask(io.allocPregs) 30 val replayMask = reqVecToMask(io.replayPregs) 31 32 val tableAfterWb = table & (~wbMask).asUInt 33 val tableAfterAlloc = tableAfterWb | allocMask 34 val tableAfterReplay = tableAfterAlloc | replayMask 35 36 for((raddr, rdy) <- io.rfReadAddr.zip(io.pregRdy)){ 37 rdy := !tableAfterWb(raddr) 38 } 39 40 table := tableAfterReplay 41 42// for((alloc, i) <- io.allocPregs.zipWithIndex){ 43// when(alloc.valid){ 44// table(alloc.bits) := true.B 45// } 46// XSDebug(alloc.valid, "Allocate %d\n", alloc.bits) 47// } 48 49 50// for((wb, i) <- io.wbPregs.zipWithIndex){ 51// when(wb.valid){ 52// table(wb.bits) := false.B 53// } 54// XSDebug(wb.valid, "writeback %d\n", wb.bits) 55// } 56 57 when(io.flush){ 58 table := 0.U(NRPhyRegs.W) 59 } 60 61 XSDebug(p"table : ${Binary(table)}\n") 62 XSDebug(p"tableNext: ${Binary(tableAfterAlloc)}\n") 63 XSDebug(p"allocMask: ${Binary(allocMask)}\n") 64 XSDebug(p"wbMask : ${Binary(wbMask)}\n") 65 for (i <- 0 until NRPhyRegs) { 66 XSDebug(table(i), "%d is busy\n", i.U) 67 } 68} 69