xref: /aosp_15_r20/external/arm-trusted-firmware/docs/plat/stm32mp1.rst (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong ParkSTMicroelectronics STM32MP1
2*54fd6939SJiyong Park===========================
3*54fd6939SJiyong Park
4*54fd6939SJiyong ParkSTM32MP1 is a microprocessor designed by STMicroelectronics
5*54fd6939SJiyong Parkbased on a dual Arm Cortex-A7.
6*54fd6939SJiyong ParkIt is an Armv7-A platform, using dedicated code from TF-A.
7*54fd6939SJiyong ParkThe STM32MP1 chip also embeds a Cortex-M4.
8*54fd6939SJiyong ParkMore information can be found on `STM32MP1 Series`_ page.
9*54fd6939SJiyong Park
10*54fd6939SJiyong Park
11*54fd6939SJiyong ParkSTM32MP1 Versions
12*54fd6939SJiyong Park-----------------
13*54fd6939SJiyong ParkThe STM32MP1 series is available in 3 different lines which are pin-to-pin compatible:
14*54fd6939SJiyong Park
15*54fd6939SJiyong Park- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD
16*54fd6939SJiyong Park- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD
17*54fd6939SJiyong Park- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz
18*54fd6939SJiyong Park
19*54fd6939SJiyong ParkEach line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:
20*54fd6939SJiyong Park
21*54fd6939SJiyong Park- A      Basic + Cortex-A7 @ 650 MHz
22*54fd6939SJiyong Park- C      Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
23*54fd6939SJiyong Park- D      Basic + Cortex-A7 @ 800 MHz
24*54fd6939SJiyong Park- F      Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
25*54fd6939SJiyong Park
26*54fd6939SJiyong ParkThe `STM32MP1 part number codification`_ page gives more information about part numbers.
27*54fd6939SJiyong Park
28*54fd6939SJiyong ParkDesign
29*54fd6939SJiyong Park------
30*54fd6939SJiyong ParkThe STM32MP1 resets in the ROM code of the Cortex-A7.
31*54fd6939SJiyong ParkThe primary boot core (core 0) executes the boot sequence while
32*54fd6939SJiyong Parksecondary boot core (core 1) is kept in a holding pen loop.
33*54fd6939SJiyong ParkThe ROM code boot sequence loads the TF-A binary image from boot device
34*54fd6939SJiyong Parkto embedded SRAM.
35*54fd6939SJiyong Park
36*54fd6939SJiyong ParkThe TF-A image must be properly formatted with a STM32 header structure
37*54fd6939SJiyong Parkfor ROM code is able to load this image.
38*54fd6939SJiyong ParkTool stm32image can be used to prepend this header to the generated TF-A binary.
39*54fd6939SJiyong Park
40*54fd6939SJiyong ParkBoot with FIP
41*54fd6939SJiyong Park~~~~~~~~~~~~~
42*54fd6939SJiyong ParkThe use of FIP is now the recommended way to boot STM32MP1 platform.
43*54fd6939SJiyong ParkOnly BL2 (with STM32 header) is loaded by ROM code. The other binaries are
44*54fd6939SJiyong Parkinside the FIP binary: BL32 (SP_min or OP-TEE), U-Boot and their respective
45*54fd6939SJiyong Parkdevice tree blobs.
46*54fd6939SJiyong Park
47*54fd6939SJiyong ParkSTM32IMAGE bootchain
48*54fd6939SJiyong Park~~~~~~~~~~~~~~~~~~~~
49*54fd6939SJiyong ParkAlthough still supported, this way of booting is not recommended.
50*54fd6939SJiyong ParkPease use FIP instead.
51*54fd6939SJiyong ParkAt compilation step, BL2, BL32 and DTB file are linked together in a single
52*54fd6939SJiyong Parkbinary. The stm32image tool is also generated and the header is added to TF-A
53*54fd6939SJiyong Parkbinary. This binary file with header is named tf-a-stm32mp157c-ev1.stm32.
54*54fd6939SJiyong ParkIt can then be copied in the first partition of the boot device.
55*54fd6939SJiyong Park
56*54fd6939SJiyong Park
57*54fd6939SJiyong ParkMemory mapping
58*54fd6939SJiyong Park~~~~~~~~~~~~~~
59*54fd6939SJiyong Park
60*54fd6939SJiyong Park::
61*54fd6939SJiyong Park
62*54fd6939SJiyong Park    0x00000000 +-----------------+
63*54fd6939SJiyong Park               |                 |   ROM
64*54fd6939SJiyong Park    0x00020000 +-----------------+
65*54fd6939SJiyong Park               |                 |
66*54fd6939SJiyong Park               |       ...       |
67*54fd6939SJiyong Park               |                 |
68*54fd6939SJiyong Park    0x2FFC0000 +-----------------+ \
69*54fd6939SJiyong Park               |     BL32 DTB    | |
70*54fd6939SJiyong Park    0x2FFC5000 +-----------------+ |
71*54fd6939SJiyong Park               |       BL32      | |
72*54fd6939SJiyong Park    0x2FFDF000 +-----------------+ |
73*54fd6939SJiyong Park               |       ...       | |
74*54fd6939SJiyong Park    0x2FFE3000 +-----------------+ |
75*54fd6939SJiyong Park               |     BL2 DTB     | | Embedded SRAM
76*54fd6939SJiyong Park    0x2FFEA000 +-----------------+ |
77*54fd6939SJiyong Park               |       BL2       | |
78*54fd6939SJiyong Park    0x2FFFF000 +-----------------+ |
79*54fd6939SJiyong Park               |  SCMI mailbox   | |
80*54fd6939SJiyong Park    0x30000000 +-----------------+ /
81*54fd6939SJiyong Park               |                 |
82*54fd6939SJiyong Park               |       ...       |
83*54fd6939SJiyong Park               |                 |
84*54fd6939SJiyong Park    0x40000000 +-----------------+
85*54fd6939SJiyong Park               |                 |
86*54fd6939SJiyong Park               |                 |   Devices
87*54fd6939SJiyong Park               |                 |
88*54fd6939SJiyong Park    0xC0000000 +-----------------+ \
89*54fd6939SJiyong Park               |                 | |
90*54fd6939SJiyong Park    0xC0100000 +-----------------+ |
91*54fd6939SJiyong Park               |       BL33      | | Non-secure RAM (DDR)
92*54fd6939SJiyong Park               |       ...       | |
93*54fd6939SJiyong Park               |                 | |
94*54fd6939SJiyong Park    0xFFFFFFFF +-----------------+ /
95*54fd6939SJiyong Park
96*54fd6939SJiyong Park
97*54fd6939SJiyong ParkBoot sequence
98*54fd6939SJiyong Park~~~~~~~~~~~~~
99*54fd6939SJiyong Park
100*54fd6939SJiyong ParkROM code -> BL2 (compiled with BL2_AT_EL3) -> BL32 (SP_min) -> BL33 (U-Boot)
101*54fd6939SJiyong Park
102*54fd6939SJiyong Parkor if Op-TEE is used:
103*54fd6939SJiyong Park
104*54fd6939SJiyong ParkROM code -> BL2 (compiled with BL2_AT_EL3) -> OP-TEE -> BL33 (U-Boot)
105*54fd6939SJiyong Park
106*54fd6939SJiyong Park
107*54fd6939SJiyong ParkBuild Instructions
108*54fd6939SJiyong Park------------------
109*54fd6939SJiyong ParkBoot media(s) supported by BL2 must be specified in the build command.
110*54fd6939SJiyong ParkAvailable storage medias are:
111*54fd6939SJiyong Park
112*54fd6939SJiyong Park- ``STM32MP_SDMMC``
113*54fd6939SJiyong Park- ``STM32MP_EMMC``
114*54fd6939SJiyong Park- ``STM32MP_RAW_NAND``
115*54fd6939SJiyong Park- ``STM32MP_SPI_NAND``
116*54fd6939SJiyong Park- ``STM32MP_SPI_NOR``
117*54fd6939SJiyong Park
118*54fd6939SJiyong ParkBoot with FIP
119*54fd6939SJiyong Park~~~~~~~~~~~~~
120*54fd6939SJiyong ParkYou need to build BL2, BL32 (SP_min or OP-TEE) and BL33 (U-Boot) before building FIP binary.
121*54fd6939SJiyong Park
122*54fd6939SJiyong ParkU-Boot
123*54fd6939SJiyong Park______
124*54fd6939SJiyong Park
125*54fd6939SJiyong Park.. code:: bash
126*54fd6939SJiyong Park
127*54fd6939SJiyong Park    cd <u-boot_directory>
128*54fd6939SJiyong Park    make stm32mp15_trusted_defconfig
129*54fd6939SJiyong Park    make DEVICE_TREE=stm32mp157c-ev1 all
130*54fd6939SJiyong Park
131*54fd6939SJiyong ParkOP-TEE (optional)
132*54fd6939SJiyong Park_________________
133*54fd6939SJiyong Park
134*54fd6939SJiyong Park.. code:: bash
135*54fd6939SJiyong Park
136*54fd6939SJiyong Park    cd <optee_directory>
137*54fd6939SJiyong Park    make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 \
138*54fd6939SJiyong Park        CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts
139*54fd6939SJiyong Park
140*54fd6939SJiyong Park
141*54fd6939SJiyong ParkTF-A BL32 (SP_min)
142*54fd6939SJiyong Park__________________
143*54fd6939SJiyong ParkIf you choose not to use OP-TEE, you can use TF-A SP_min.
144*54fd6939SJiyong ParkTo build TF-A BL32, and its device tree file:
145*54fd6939SJiyong Park
146*54fd6939SJiyong Park.. code:: bash
147*54fd6939SJiyong Park
148*54fd6939SJiyong Park    make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
149*54fd6939SJiyong Park        AARCH32_SP=sp_min DTB_FILE_NAME=stm32mp157c-ev1.dtb bl32 dtbs
150*54fd6939SJiyong Park
151*54fd6939SJiyong ParkTF-A BL2
152*54fd6939SJiyong Park________
153*54fd6939SJiyong ParkTo build TF-A BL2 with its STM32 header for SD-card boot:
154*54fd6939SJiyong Park
155*54fd6939SJiyong Park.. code:: bash
156*54fd6939SJiyong Park
157*54fd6939SJiyong Park    make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
158*54fd6939SJiyong Park        DTB_FILE_NAME=stm32mp157c-ev1.dtb STM32MP_SDMMC=1
159*54fd6939SJiyong Park
160*54fd6939SJiyong ParkFor other boot devices, you have to replace STM32MP_SDMMC in the previous command
161*54fd6939SJiyong Parkwith the desired device flag.
162*54fd6939SJiyong Park
163*54fd6939SJiyong ParkThis BL2 is independent of the BL32 used (SP_min or OP-TEE)
164*54fd6939SJiyong Park
165*54fd6939SJiyong Park
166*54fd6939SJiyong ParkFIP
167*54fd6939SJiyong Park___
168*54fd6939SJiyong ParkWith BL32 SP_min:
169*54fd6939SJiyong Park
170*54fd6939SJiyong Park.. code:: bash
171*54fd6939SJiyong Park
172*54fd6939SJiyong Park    make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
173*54fd6939SJiyong Park        AARCH32_SP=sp_min \
174*54fd6939SJiyong Park        DTB_FILE_NAME=stm32mp157c-ev1.dtb \
175*54fd6939SJiyong Park        BL33=<u-boot_directory>/u-boot-nodtb.bin \
176*54fd6939SJiyong Park        BL33_CFG=<u-boot_directory>/u-boot.dtb \
177*54fd6939SJiyong Park        fip
178*54fd6939SJiyong Park
179*54fd6939SJiyong ParkWith OP-TEE:
180*54fd6939SJiyong Park
181*54fd6939SJiyong Park.. code:: bash
182*54fd6939SJiyong Park
183*54fd6939SJiyong Park    make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
184*54fd6939SJiyong Park        AARCH32_SP=optee \
185*54fd6939SJiyong Park        DTB_FILE_NAME=stm32mp157c-ev1.dtb \
186*54fd6939SJiyong Park        BL33=<u-boot_directory>/u-boot-nodtb.bin \
187*54fd6939SJiyong Park        BL33_CFG=<u-boot_directory>/u-boot.dtb \
188*54fd6939SJiyong Park        BL32=<optee_directory>/tee-header_v2.bin \
189*54fd6939SJiyong Park        BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin
190*54fd6939SJiyong Park        BL32_EXTRA2=<optee_directory>/tee-pageable_v2.bin
191*54fd6939SJiyong Park        fip
192*54fd6939SJiyong Park
193*54fd6939SJiyong Park
194*54fd6939SJiyong ParkSTM32IMAGE bootchain
195*54fd6939SJiyong Park~~~~~~~~~~~~~~~~~~~~
196*54fd6939SJiyong ParkYou need to add the following flag to the make command:
197*54fd6939SJiyong Park``STM32MP_USE_STM32IMAGE=1``
198*54fd6939SJiyong Park
199*54fd6939SJiyong ParkTo build with SP_min and support for SD-card boot:
200*54fd6939SJiyong Park
201*54fd6939SJiyong Park.. code:: bash
202*54fd6939SJiyong Park
203*54fd6939SJiyong Park    make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
204*54fd6939SJiyong Park        AARCH32_SP=sp_min STM32MP_SDMMC=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb \
205*54fd6939SJiyong Park        STM32MP_USE_STM32IMAGE=1
206*54fd6939SJiyong Park
207*54fd6939SJiyong Park    cd <u-boot_directory>
208*54fd6939SJiyong Park    make stm32mp15_trusted_defconfig
209*54fd6939SJiyong Park    make DEVICE_TREE=stm32mp157c-ev1 all
210*54fd6939SJiyong Park
211*54fd6939SJiyong ParkTo build TF-A with OP-TEE support for SD-card boot:
212*54fd6939SJiyong Park
213*54fd6939SJiyong Park.. code:: bash
214*54fd6939SJiyong Park
215*54fd6939SJiyong Park    make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
216*54fd6939SJiyong Park        AARCH32_SP=optee STM32MP_SDMMC=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb \
217*54fd6939SJiyong Park        STM32MP_USE_STM32IMAGE=1
218*54fd6939SJiyong Park
219*54fd6939SJiyong Park    cd <optee_directory>
220*54fd6939SJiyong Park    make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 \
221*54fd6939SJiyong Park        CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts
222*54fd6939SJiyong Park
223*54fd6939SJiyong Park    cd <u-boot_directory>
224*54fd6939SJiyong Park    make stm32mp15_trusted_defconfig
225*54fd6939SJiyong Park    make DEVICE_TREE=stm32mp157c-ev1 all
226*54fd6939SJiyong Park
227*54fd6939SJiyong Park
228*54fd6939SJiyong ParkThe following build options are supported:
229*54fd6939SJiyong Park
230*54fd6939SJiyong Park- ``ENABLE_STACK_PROTECTOR``: To enable the stack protection.
231*54fd6939SJiyong Park
232*54fd6939SJiyong Park
233*54fd6939SJiyong ParkPopulate SD-card
234*54fd6939SJiyong Park----------------
235*54fd6939SJiyong Park
236*54fd6939SJiyong ParkBoot with FIP
237*54fd6939SJiyong Park~~~~~~~~~~~~~
238*54fd6939SJiyong ParkThe SD-card has to be formatted with GPT.
239*54fd6939SJiyong ParkIt should contain at least those partitions:
240*54fd6939SJiyong Park
241*54fd6939SJiyong Park- fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary (BL2)
242*54fd6939SJiyong Park- fip: which contains the FIP binary
243*54fd6939SJiyong Park
244*54fd6939SJiyong ParkUsually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl.
245*54fd6939SJiyong Park
246*54fd6939SJiyong ParkSTM32IMAGE bootchain
247*54fd6939SJiyong Park~~~~~~~~~~~~~~~~~~~~
248*54fd6939SJiyong ParkThe SD-card has to be formatted with GPT.
249*54fd6939SJiyong ParkIt should contain at least those partitions:
250*54fd6939SJiyong Park
251*54fd6939SJiyong Park- fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary
252*54fd6939SJiyong Park- ssbl: to copy the u-boot.stm32 binary
253*54fd6939SJiyong Park
254*54fd6939SJiyong ParkUsually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl.
255*54fd6939SJiyong Park
256*54fd6939SJiyong ParkOP-TEE artifacts go into separate partitions as follows:
257*54fd6939SJiyong Park
258*54fd6939SJiyong Park- teeh: tee-header_v2.stm32
259*54fd6939SJiyong Park- teed: tee-pageable_v2.stm32
260*54fd6939SJiyong Park- teex: tee-pager_v2.stm32
261*54fd6939SJiyong Park
262*54fd6939SJiyong Park
263*54fd6939SJiyong Park.. _STM32MP1 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html
264*54fd6939SJiyong Park.. _STM32MP1 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP15_microprocessor#Part_number_codification
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