xref: /aosp_15_r20/external/arm-trusted-firmware/drivers/brcm/mdio/mdio.c (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright (c) 2016 - 2021, Broadcom
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  */
6*54fd6939SJiyong Park #include <string.h>
7*54fd6939SJiyong Park 
8*54fd6939SJiyong Park #include <platform_def.h>
9*54fd6939SJiyong Park 
10*54fd6939SJiyong Park #include <common/debug.h>
11*54fd6939SJiyong Park #include <drivers/delay_timer.h>
12*54fd6939SJiyong Park #include <lib/mmio.h>
13*54fd6939SJiyong Park #include <mdio.h>
14*54fd6939SJiyong Park 
mdio_op_status(uint32_t result)15*54fd6939SJiyong Park static int mdio_op_status(uint32_t result)
16*54fd6939SJiyong Park {
17*54fd6939SJiyong Park 	uint32_t timeout = 1000000U; /* loop for 1s */
18*54fd6939SJiyong Park 	uint32_t val;
19*54fd6939SJiyong Park 
20*54fd6939SJiyong Park 	do {
21*54fd6939SJiyong Park 		val = mmio_read_32(CMIC_MIIM_STAT);
22*54fd6939SJiyong Park 		if ((val & MDIO_STAT_DONE) == result) {
23*54fd6939SJiyong Park 			return 0;
24*54fd6939SJiyong Park 		}
25*54fd6939SJiyong Park 
26*54fd6939SJiyong Park 		udelay(1U);
27*54fd6939SJiyong Park 	} while (timeout-- != 0U);
28*54fd6939SJiyong Park 	return -1;
29*54fd6939SJiyong Park }
30*54fd6939SJiyong Park 
mdio_op(uint16_t busid,uint16_t phyid,uint32_t reg,uint16_t val,uint8_t op)31*54fd6939SJiyong Park static int mdio_op(uint16_t busid, uint16_t phyid, uint32_t reg,
32*54fd6939SJiyong Park 	       uint16_t val, uint8_t op)
33*54fd6939SJiyong Park {
34*54fd6939SJiyong Park 	uint32_t param;
35*54fd6939SJiyong Park 	int ret;
36*54fd6939SJiyong Park 
37*54fd6939SJiyong Park 	mmio_write_32(CMIC_MIIM_CTRL, 0U);
38*54fd6939SJiyong Park 	ret = mdio_op_status(0U);
39*54fd6939SJiyong Park 	if (ret != 0) {
40*54fd6939SJiyong Park 		goto err;
41*54fd6939SJiyong Park 	}
42*54fd6939SJiyong Park 
43*54fd6939SJiyong Park 	param = 0U;
44*54fd6939SJiyong Park 	param |= 1U << MDIO_PARAM_INTERNAL_SEL;
45*54fd6939SJiyong Park 	param |= (busid & MDIO_PARAM_BUSID_MASK) << MDIO_PARAM_BUSID;
46*54fd6939SJiyong Park 	param |= (phyid & MDIO_PARAM_PHYID_MASK) << MDIO_PARAM_PHYID;
47*54fd6939SJiyong Park 	param |= (val & MDIO_PARAM_DATA_MASK) << MDIO_PARAM_DATA;
48*54fd6939SJiyong Park 
49*54fd6939SJiyong Park 	mmio_write_32(CMIC_MIIM_PARAM, param);
50*54fd6939SJiyong Park 
51*54fd6939SJiyong Park 	mmio_write_32(CMIC_MIIM_ADDRESS, reg);
52*54fd6939SJiyong Park 
53*54fd6939SJiyong Park 	mmio_write_32(CMIC_MIIM_CTRL, op);
54*54fd6939SJiyong Park 
55*54fd6939SJiyong Park 	ret = mdio_op_status(1U);
56*54fd6939SJiyong Park 	if (ret != 0) {
57*54fd6939SJiyong Park 		goto err;
58*54fd6939SJiyong Park 	}
59*54fd6939SJiyong Park 
60*54fd6939SJiyong Park 	if (op == MDIO_CTRL_READ_OP) {
61*54fd6939SJiyong Park 		ret = mmio_read_32(CMIC_MIIM_READ_DATA) & MDIO_READ_DATA_MASK;
62*54fd6939SJiyong Park 	}
63*54fd6939SJiyong Park err:
64*54fd6939SJiyong Park 	return ret;
65*54fd6939SJiyong Park }
66*54fd6939SJiyong Park 
mdio_write(uint16_t busid,uint16_t phyid,uint32_t reg,uint16_t val)67*54fd6939SJiyong Park int mdio_write(uint16_t busid, uint16_t phyid, uint32_t reg, uint16_t val)
68*54fd6939SJiyong Park {
69*54fd6939SJiyong Park 	int ret;
70*54fd6939SJiyong Park 
71*54fd6939SJiyong Park 	ret = mdio_op(busid, phyid, reg, val, MDIO_CTRL_WRITE_OP);
72*54fd6939SJiyong Park 	if (ret == -1) {
73*54fd6939SJiyong Park 		INFO("MDIO write fail\n");
74*54fd6939SJiyong Park 	}
75*54fd6939SJiyong Park 	return ret;
76*54fd6939SJiyong Park }
77*54fd6939SJiyong Park 
mdio_read(uint16_t busid,uint16_t phyid,uint32_t reg)78*54fd6939SJiyong Park int mdio_read(uint16_t busid, uint16_t phyid, uint32_t reg)
79*54fd6939SJiyong Park {
80*54fd6939SJiyong Park 	int ret;
81*54fd6939SJiyong Park 
82*54fd6939SJiyong Park 	ret = mdio_op(busid, phyid, reg, 0U, MDIO_CTRL_READ_OP);
83*54fd6939SJiyong Park 	if (ret == -1) {
84*54fd6939SJiyong Park 		INFO("MDIO read fail\n");
85*54fd6939SJiyong Park 	}
86*54fd6939SJiyong Park 	return ret;
87*54fd6939SJiyong Park }
88