xref: /aosp_15_r20/external/arm-trusted-firmware/drivers/nxp/console/console_pl011.c (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright 2021 NXP
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  *
6*54fd6939SJiyong Park  */
7*54fd6939SJiyong Park 
8*54fd6939SJiyong Park #include <assert.h>
9*54fd6939SJiyong Park 
10*54fd6939SJiyong Park #include <common/debug.h>
11*54fd6939SJiyong Park #include <dcfg.h>
12*54fd6939SJiyong Park #include <drivers/arm/pl011.h>
13*54fd6939SJiyong Park #include <drivers/console.h>
14*54fd6939SJiyong Park #include <lib/utils.h>
15*54fd6939SJiyong Park 
16*54fd6939SJiyong Park /*
17*54fd6939SJiyong Park  * Perform Arm specific early platform setup. At this moment we only initialize
18*54fd6939SJiyong Park  * the console and the memory layout.
19*54fd6939SJiyong Park  */
plat_console_init(uintptr_t nxp_console_addr,uint32_t uart_clk_div,uint32_t baud)20*54fd6939SJiyong Park void plat_console_init(uintptr_t nxp_console_addr, uint32_t uart_clk_div,
21*54fd6939SJiyong Park 			uint32_t baud)
22*54fd6939SJiyong Park {
23*54fd6939SJiyong Park 	struct sysinfo sys;
24*54fd6939SJiyong Park 	static console_t nxp_console;
25*54fd6939SJiyong Park 
26*54fd6939SJiyong Park 	zeromem(&sys, sizeof(sys));
27*54fd6939SJiyong Park 	if (get_clocks(&sys)) {
28*54fd6939SJiyong Park 		ERROR("System clocks are not set\n");
29*54fd6939SJiyong Park 		panic();
30*54fd6939SJiyong Park 	}
31*54fd6939SJiyong Park 
32*54fd6939SJiyong Park 	console_pl011_register(nxp_console_addr,
33*54fd6939SJiyong Park 			      (sys.freq_platform/uart_clk_div),
34*54fd6939SJiyong Park 			       baud, &nxp_console);
35*54fd6939SJiyong Park }
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