1*54fd6939SJiyong Park// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 2*54fd6939SJiyong Park/* 3*54fd6939SJiyong Park * Copyright (C) 2018-2021, STMicroelectronics - All Rights Reserved 4*54fd6939SJiyong Park */ 5*54fd6939SJiyong Park 6*54fd6939SJiyong Park&ddr { 7*54fd6939SJiyong Park st,mem-name = DDR_MEM_NAME; 8*54fd6939SJiyong Park st,mem-speed = <DDR_MEM_SPEED>; 9*54fd6939SJiyong Park st,mem-size = <DDR_MEM_SIZE>; 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park st,ctl-reg = < 12*54fd6939SJiyong Park DDR_MSTR 13*54fd6939SJiyong Park DDR_MRCTRL0 14*54fd6939SJiyong Park DDR_MRCTRL1 15*54fd6939SJiyong Park DDR_DERATEEN 16*54fd6939SJiyong Park DDR_DERATEINT 17*54fd6939SJiyong Park DDR_PWRCTL 18*54fd6939SJiyong Park DDR_PWRTMG 19*54fd6939SJiyong Park DDR_HWLPCTL 20*54fd6939SJiyong Park DDR_RFSHCTL0 21*54fd6939SJiyong Park DDR_RFSHCTL3 22*54fd6939SJiyong Park DDR_CRCPARCTL0 23*54fd6939SJiyong Park DDR_ZQCTL0 24*54fd6939SJiyong Park DDR_DFITMG0 25*54fd6939SJiyong Park DDR_DFITMG1 26*54fd6939SJiyong Park DDR_DFILPCFG0 27*54fd6939SJiyong Park DDR_DFIUPD0 28*54fd6939SJiyong Park DDR_DFIUPD1 29*54fd6939SJiyong Park DDR_DFIUPD2 30*54fd6939SJiyong Park DDR_DFIPHYMSTR 31*54fd6939SJiyong Park DDR_ODTMAP 32*54fd6939SJiyong Park DDR_DBG0 33*54fd6939SJiyong Park DDR_DBG1 34*54fd6939SJiyong Park DDR_DBGCMD 35*54fd6939SJiyong Park DDR_POISONCFG 36*54fd6939SJiyong Park DDR_PCCFG 37*54fd6939SJiyong Park >; 38*54fd6939SJiyong Park 39*54fd6939SJiyong Park st,ctl-timing = < 40*54fd6939SJiyong Park DDR_RFSHTMG 41*54fd6939SJiyong Park DDR_DRAMTMG0 42*54fd6939SJiyong Park DDR_DRAMTMG1 43*54fd6939SJiyong Park DDR_DRAMTMG2 44*54fd6939SJiyong Park DDR_DRAMTMG3 45*54fd6939SJiyong Park DDR_DRAMTMG4 46*54fd6939SJiyong Park DDR_DRAMTMG5 47*54fd6939SJiyong Park DDR_DRAMTMG6 48*54fd6939SJiyong Park DDR_DRAMTMG7 49*54fd6939SJiyong Park DDR_DRAMTMG8 50*54fd6939SJiyong Park DDR_DRAMTMG14 51*54fd6939SJiyong Park DDR_ODTCFG 52*54fd6939SJiyong Park >; 53*54fd6939SJiyong Park 54*54fd6939SJiyong Park st,ctl-map = < 55*54fd6939SJiyong Park DDR_ADDRMAP1 56*54fd6939SJiyong Park DDR_ADDRMAP2 57*54fd6939SJiyong Park DDR_ADDRMAP3 58*54fd6939SJiyong Park DDR_ADDRMAP4 59*54fd6939SJiyong Park DDR_ADDRMAP5 60*54fd6939SJiyong Park DDR_ADDRMAP6 61*54fd6939SJiyong Park DDR_ADDRMAP9 62*54fd6939SJiyong Park DDR_ADDRMAP10 63*54fd6939SJiyong Park DDR_ADDRMAP11 64*54fd6939SJiyong Park >; 65*54fd6939SJiyong Park 66*54fd6939SJiyong Park st,ctl-perf = < 67*54fd6939SJiyong Park DDR_SCHED 68*54fd6939SJiyong Park DDR_SCHED1 69*54fd6939SJiyong Park DDR_PERFHPR1 70*54fd6939SJiyong Park DDR_PERFLPR1 71*54fd6939SJiyong Park DDR_PERFWR1 72*54fd6939SJiyong Park DDR_PCFGR_0 73*54fd6939SJiyong Park DDR_PCFGW_0 74*54fd6939SJiyong Park DDR_PCFGQOS0_0 75*54fd6939SJiyong Park DDR_PCFGQOS1_0 76*54fd6939SJiyong Park DDR_PCFGWQOS0_0 77*54fd6939SJiyong Park DDR_PCFGWQOS1_0 78*54fd6939SJiyong Park DDR_PCFGR_1 79*54fd6939SJiyong Park DDR_PCFGW_1 80*54fd6939SJiyong Park DDR_PCFGQOS0_1 81*54fd6939SJiyong Park DDR_PCFGQOS1_1 82*54fd6939SJiyong Park DDR_PCFGWQOS0_1 83*54fd6939SJiyong Park DDR_PCFGWQOS1_1 84*54fd6939SJiyong Park >; 85*54fd6939SJiyong Park 86*54fd6939SJiyong Park st,phy-reg = < 87*54fd6939SJiyong Park DDR_PGCR 88*54fd6939SJiyong Park DDR_ACIOCR 89*54fd6939SJiyong Park DDR_DXCCR 90*54fd6939SJiyong Park DDR_DSGCR 91*54fd6939SJiyong Park DDR_DCR 92*54fd6939SJiyong Park DDR_ODTCR 93*54fd6939SJiyong Park DDR_ZQ0CR1 94*54fd6939SJiyong Park DDR_DX0GCR 95*54fd6939SJiyong Park DDR_DX1GCR 96*54fd6939SJiyong Park DDR_DX2GCR 97*54fd6939SJiyong Park DDR_DX3GCR 98*54fd6939SJiyong Park >; 99*54fd6939SJiyong Park 100*54fd6939SJiyong Park st,phy-timing = < 101*54fd6939SJiyong Park DDR_PTR0 102*54fd6939SJiyong Park DDR_PTR1 103*54fd6939SJiyong Park DDR_PTR2 104*54fd6939SJiyong Park DDR_DTPR0 105*54fd6939SJiyong Park DDR_DTPR1 106*54fd6939SJiyong Park DDR_DTPR2 107*54fd6939SJiyong Park DDR_MR0 108*54fd6939SJiyong Park DDR_MR1 109*54fd6939SJiyong Park DDR_MR2 110*54fd6939SJiyong Park DDR_MR3 111*54fd6939SJiyong Park >; 112*54fd6939SJiyong Park 113*54fd6939SJiyong Park st,phy-cal = < 114*54fd6939SJiyong Park DDR_DX0DLLCR 115*54fd6939SJiyong Park DDR_DX0DQTR 116*54fd6939SJiyong Park DDR_DX0DQSTR 117*54fd6939SJiyong Park DDR_DX1DLLCR 118*54fd6939SJiyong Park DDR_DX1DQTR 119*54fd6939SJiyong Park DDR_DX1DQSTR 120*54fd6939SJiyong Park DDR_DX2DLLCR 121*54fd6939SJiyong Park DDR_DX2DQTR 122*54fd6939SJiyong Park DDR_DX2DQSTR 123*54fd6939SJiyong Park DDR_DX3DLLCR 124*54fd6939SJiyong Park DDR_DX3DQTR 125*54fd6939SJiyong Park DDR_DX3DQSTR 126*54fd6939SJiyong Park >; 127*54fd6939SJiyong Park}; 128