1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #ifndef AXP_H 8*54fd6939SJiyong Park #define AXP_H 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park #include <stdint.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park #define AXP20X_MODE_REG 0x3e 13*54fd6939SJiyong Park #define AXP20X_MODE_I2C 0x00 14*54fd6939SJiyong Park #define AXP20X_MODE_RSB 0x7c 15*54fd6939SJiyong Park 16*54fd6939SJiyong Park #define NA 0xff 17*54fd6939SJiyong Park 18*54fd6939SJiyong Park enum { 19*54fd6939SJiyong Park AXP803_CHIP_ID = 0x41, 20*54fd6939SJiyong Park AXP805_CHIP_ID = 0x40, 21*54fd6939SJiyong Park }; 22*54fd6939SJiyong Park 23*54fd6939SJiyong Park struct axp_regulator { 24*54fd6939SJiyong Park const char *dt_name; 25*54fd6939SJiyong Park uint16_t min_volt; 26*54fd6939SJiyong Park uint16_t max_volt; 27*54fd6939SJiyong Park uint16_t step; 28*54fd6939SJiyong Park unsigned char split; 29*54fd6939SJiyong Park unsigned char volt_reg; 30*54fd6939SJiyong Park unsigned char switch_reg; 31*54fd6939SJiyong Park unsigned char switch_bit; 32*54fd6939SJiyong Park }; 33*54fd6939SJiyong Park 34*54fd6939SJiyong Park extern const uint8_t axp_chip_id; 35*54fd6939SJiyong Park extern const char *const axp_compatible; 36*54fd6939SJiyong Park extern const struct axp_regulator axp_regulators[]; 37*54fd6939SJiyong Park 38*54fd6939SJiyong Park /* 39*54fd6939SJiyong Park * Since the PMIC can be connected to multiple bus types, 40*54fd6939SJiyong Park * low-level read/write functions must be provided by the platform 41*54fd6939SJiyong Park */ 42*54fd6939SJiyong Park int axp_read(uint8_t reg); 43*54fd6939SJiyong Park int axp_write(uint8_t reg, uint8_t val); 44*54fd6939SJiyong Park int axp_clrsetbits(uint8_t reg, uint8_t clr_mask, uint8_t set_mask); 45*54fd6939SJiyong Park #define axp_clrbits(reg, clr_mask) axp_clrsetbits(reg, clr_mask, 0) 46*54fd6939SJiyong Park #define axp_setbits(reg, set_mask) axp_clrsetbits(reg, 0, set_mask) 47*54fd6939SJiyong Park 48*54fd6939SJiyong Park int axp_check_id(void); 49*54fd6939SJiyong Park void axp_power_off(void); 50*54fd6939SJiyong Park void axp_setup_regulators(const void *fdt); 51*54fd6939SJiyong Park 52*54fd6939SJiyong Park #endif /* AXP_H */ 53