1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #ifndef TZC_COMMON_H 8*54fd6939SJiyong Park #define TZC_COMMON_H 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park #include <lib/utils_def.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park /* 13*54fd6939SJiyong Park * Offset of core registers from the start of the base of configuration 14*54fd6939SJiyong Park * registers for each region. 15*54fd6939SJiyong Park */ 16*54fd6939SJiyong Park 17*54fd6939SJiyong Park /* ID Registers */ 18*54fd6939SJiyong Park #define PID0_OFF U(0xfe0) 19*54fd6939SJiyong Park #define PID1_OFF U(0xfe4) 20*54fd6939SJiyong Park #define PID2_OFF U(0xfe8) 21*54fd6939SJiyong Park #define PID3_OFF U(0xfec) 22*54fd6939SJiyong Park #define PID4_OFF U(0xfd0) 23*54fd6939SJiyong Park #define CID0_OFF U(0xff0) 24*54fd6939SJiyong Park #define CID1_OFF U(0xff4) 25*54fd6939SJiyong Park #define CID2_OFF U(0xff8) 26*54fd6939SJiyong Park #define CID3_OFF U(0xffc) 27*54fd6939SJiyong Park 28*54fd6939SJiyong Park /* 29*54fd6939SJiyong Park * What type of action is expected when an access violation occurs. 30*54fd6939SJiyong Park * The memory requested is returned as zero. But we can also raise an event to 31*54fd6939SJiyong Park * let the system know it happened. 32*54fd6939SJiyong Park * We can raise an interrupt(INT) and/or cause an exception(ERR). 33*54fd6939SJiyong Park * TZC_ACTION_NONE - No interrupt, no Exception 34*54fd6939SJiyong Park * TZC_ACTION_ERR - No interrupt, raise exception -> sync external 35*54fd6939SJiyong Park * data abort 36*54fd6939SJiyong Park * TZC_ACTION_INT - Raise interrupt, no exception 37*54fd6939SJiyong Park * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync 38*54fd6939SJiyong Park * external data abort 39*54fd6939SJiyong Park */ 40*54fd6939SJiyong Park #define TZC_ACTION_NONE U(0) 41*54fd6939SJiyong Park #define TZC_ACTION_ERR U(1) 42*54fd6939SJiyong Park #define TZC_ACTION_INT U(2) 43*54fd6939SJiyong Park #define TZC_ACTION_ERR_INT (TZC_ACTION_ERR | TZC_ACTION_INT) 44*54fd6939SJiyong Park 45*54fd6939SJiyong Park /* Bit positions of TZC_ACTION registers */ 46*54fd6939SJiyong Park #define TZC_ACTION_RV_SHIFT 0 47*54fd6939SJiyong Park #define TZC_ACTION_RV_MASK U(0x3) 48*54fd6939SJiyong Park #define TZC_ACTION_RV_LOWOK U(0x0) 49*54fd6939SJiyong Park #define TZC_ACTION_RV_LOWERR U(0x1) 50*54fd6939SJiyong Park #define TZC_ACTION_RV_HIGHOK U(0x2) 51*54fd6939SJiyong Park #define TZC_ACTION_RV_HIGHERR U(0x3) 52*54fd6939SJiyong Park 53*54fd6939SJiyong Park /* 54*54fd6939SJiyong Park * Controls secure access to a region. If not enabled secure access is not 55*54fd6939SJiyong Park * allowed to region. 56*54fd6939SJiyong Park */ 57*54fd6939SJiyong Park #define TZC_REGION_S_NONE U(0) 58*54fd6939SJiyong Park #define TZC_REGION_S_RD U(1) 59*54fd6939SJiyong Park #define TZC_REGION_S_WR U(2) 60*54fd6939SJiyong Park #define TZC_REGION_S_RDWR (TZC_REGION_S_RD | TZC_REGION_S_WR) 61*54fd6939SJiyong Park 62*54fd6939SJiyong Park #define TZC_REGION_ATTR_S_RD_SHIFT 30 63*54fd6939SJiyong Park #define TZC_REGION_ATTR_S_WR_SHIFT 31 64*54fd6939SJiyong Park #define TZC_REGION_ATTR_F_EN_SHIFT 0 65*54fd6939SJiyong Park #define TZC_REGION_ATTR_SEC_SHIFT 30 66*54fd6939SJiyong Park #define TZC_REGION_ATTR_S_RD_MASK U(0x1) 67*54fd6939SJiyong Park #define TZC_REGION_ATTR_S_WR_MASK U(0x1) 68*54fd6939SJiyong Park #define TZC_REGION_ATTR_SEC_MASK U(0x3) 69*54fd6939SJiyong Park 70*54fd6939SJiyong Park #define TZC_REGION_ACCESS_WR_EN_SHIFT 16 71*54fd6939SJiyong Park #define TZC_REGION_ACCESS_RD_EN_SHIFT 0 72*54fd6939SJiyong Park #define TZC_REGION_ACCESS_ID_MASK U(0xf) 73*54fd6939SJiyong Park 74*54fd6939SJiyong Park /* Macros for allowing Non-Secure access to a region based on NSAID */ 75*54fd6939SJiyong Park #define TZC_REGION_ACCESS_RD(nsaid) \ 76*54fd6939SJiyong Park ((U(1) << ((nsaid) & TZC_REGION_ACCESS_ID_MASK)) << \ 77*54fd6939SJiyong Park TZC_REGION_ACCESS_RD_EN_SHIFT) 78*54fd6939SJiyong Park #define TZC_REGION_ACCESS_WR(nsaid) \ 79*54fd6939SJiyong Park ((U(1) << ((nsaid) & TZC_REGION_ACCESS_ID_MASK)) << \ 80*54fd6939SJiyong Park TZC_REGION_ACCESS_WR_EN_SHIFT) 81*54fd6939SJiyong Park #define TZC_REGION_ACCESS_RDWR(nsaid) \ 82*54fd6939SJiyong Park (TZC_REGION_ACCESS_RD(nsaid) | \ 83*54fd6939SJiyong Park TZC_REGION_ACCESS_WR(nsaid)) 84*54fd6939SJiyong Park 85*54fd6939SJiyong Park /* Returns offset of registers to program for a given region no */ 86*54fd6939SJiyong Park #define TZC_REGION_OFFSET(region_size, region_no) \ 87*54fd6939SJiyong Park ((region_size) * (region_no)) 88*54fd6939SJiyong Park 89*54fd6939SJiyong Park #endif /* TZC_COMMON_H */ 90