xref: /aosp_15_r20/external/arm-trusted-firmware/include/drivers/nxp/csu/csu.h (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright 2021 NXP
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  *
6*54fd6939SJiyong Park  */
7*54fd6939SJiyong Park 
8*54fd6939SJiyong Park #ifndef CSU_H
9*54fd6939SJiyong Park #define CSU_H
10*54fd6939SJiyong Park 
11*54fd6939SJiyong Park #define CSU_SEC_ACCESS_REG_OFFSET	(0x0021CU)
12*54fd6939SJiyong Park 
13*54fd6939SJiyong Park /* Macros defining access permissions to configure
14*54fd6939SJiyong Park  * the regions controlled by Central Security Unit.
15*54fd6939SJiyong Park  */
16*54fd6939SJiyong Park enum csu_cslx_access {
17*54fd6939SJiyong Park 	CSU_NS_SUP_R = (0x8U),
18*54fd6939SJiyong Park 	CSU_NS_SUP_W = (0x80U),
19*54fd6939SJiyong Park 	CSU_NS_SUP_RW = (0x88U),
20*54fd6939SJiyong Park 	CSU_NS_USER_R = (0x4U),
21*54fd6939SJiyong Park 	CSU_NS_USER_W = (0x40U),
22*54fd6939SJiyong Park 	CSU_NS_USER_RW = (0x44U),
23*54fd6939SJiyong Park 	CSU_S_SUP_R = (0x2U),
24*54fd6939SJiyong Park 	CSU_S_SUP_W = (0x20U),
25*54fd6939SJiyong Park 	CSU_S_SUP_RW = (0x22U),
26*54fd6939SJiyong Park 	CSU_S_USER_R = (0x1U),
27*54fd6939SJiyong Park 	CSU_S_USER_W = (0x10U),
28*54fd6939SJiyong Park 	CSU_S_USER_RW = (0x11U),
29*54fd6939SJiyong Park 	CSU_ALL_RW = (0xffU),
30*54fd6939SJiyong Park };
31*54fd6939SJiyong Park 
32*54fd6939SJiyong Park struct csu_ns_dev_st {
33*54fd6939SJiyong Park 	uintptr_t ind;
34*54fd6939SJiyong Park 	uint32_t val;
35*54fd6939SJiyong Park };
36*54fd6939SJiyong Park 
37*54fd6939SJiyong Park void enable_layerscape_ns_access(struct csu_ns_dev_st *csu_ns_dev,
38*54fd6939SJiyong Park 				 uint32_t num, uintptr_t nxp_csu_addr);
39*54fd6939SJiyong Park 
40*54fd6939SJiyong Park #endif
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