xref: /aosp_15_r20/external/arm-trusted-firmware/include/drivers/nxp/i2c/i2c.h (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright 2016-2021 NXP
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  *
6*54fd6939SJiyong Park  */
7*54fd6939SJiyong Park 
8*54fd6939SJiyong Park 
9*54fd6939SJiyong Park #ifndef I2C_H
10*54fd6939SJiyong Park #define I2C_H
11*54fd6939SJiyong Park 
12*54fd6939SJiyong Park #include <lib/mmio.h>
13*54fd6939SJiyong Park 
14*54fd6939SJiyong Park #define I2C_TIMEOUT	1000	/* ms */
15*54fd6939SJiyong Park 
16*54fd6939SJiyong Park #define I2C_FD_CONSERV	0x7e
17*54fd6939SJiyong Park #define I2C_CR_DIS	(1 << 7)
18*54fd6939SJiyong Park #define I2C_CR_EN	(0 << 7)
19*54fd6939SJiyong Park #define I2C_CR_MA	(1 << 5)
20*54fd6939SJiyong Park #define I2C_CR_TX	(1 << 4)
21*54fd6939SJiyong Park #define I2C_CR_TX_NAK	(1 << 3)
22*54fd6939SJiyong Park #define I2C_CR_RSTA	(1 << 2)
23*54fd6939SJiyong Park #define I2C_SR_BB	(1 << 5)
24*54fd6939SJiyong Park #define I2C_SR_IDLE	(0 << 5)
25*54fd6939SJiyong Park #define I2C_SR_AL	(1 << 4)
26*54fd6939SJiyong Park #define I2C_SR_IF	(1 << 1)
27*54fd6939SJiyong Park #define I2C_SR_RX_NAK	(1 << 0)
28*54fd6939SJiyong Park #define I2C_SR_RST	(I2C_SR_AL | I2C_SR_IF)
29*54fd6939SJiyong Park 
30*54fd6939SJiyong Park #define I2C_GLITCH_EN	0x8
31*54fd6939SJiyong Park 
32*54fd6939SJiyong Park #define i2c_in(a)	mmio_read_8((uintptr_t)(a))
33*54fd6939SJiyong Park #define i2c_out(a, v)	mmio_write_8((uintptr_t)(a), (v))
34*54fd6939SJiyong Park 
35*54fd6939SJiyong Park struct ls_i2c {
36*54fd6939SJiyong Park 	unsigned char ad;	/* I2c Bus Address Register */
37*54fd6939SJiyong Park 	unsigned char fd;	/* I2c Bus Frequency Dividor Register */
38*54fd6939SJiyong Park 	unsigned char cr;	/* I2c Bus Control Register */
39*54fd6939SJiyong Park 	unsigned char sr;	/* I2c Bus Status Register */
40*54fd6939SJiyong Park 	unsigned char dr;	/* I2C Bus Data I/O Register */
41*54fd6939SJiyong Park 	unsigned char ic;	/* I2C Bus Interrupt Config Register */
42*54fd6939SJiyong Park 	unsigned char dbg;	/* I2C Bus Debug Register */
43*54fd6939SJiyong Park };
44*54fd6939SJiyong Park 
45*54fd6939SJiyong Park void i2c_init(uintptr_t nxp_i2c_addr);
46*54fd6939SJiyong Park int i2c_read(unsigned char chip, int addr, int alen,
47*54fd6939SJiyong Park 	     unsigned char *buf, int len);
48*54fd6939SJiyong Park int i2c_write(unsigned char chip, int addr, int alen,
49*54fd6939SJiyong Park 	      const unsigned char *buf, int len);
50*54fd6939SJiyong Park int i2c_probe_chip(unsigned char chip);
51*54fd6939SJiyong Park 
52*54fd6939SJiyong Park #endif /* I2C_H */
53