1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2015-2019, STMicroelectronics - All Rights Reserved 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #ifndef STM32_GPIO_H 8*54fd6939SJiyong Park #define STM32_GPIO_H 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park #include <lib/utils_def.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park #define GPIO_MODE_OFFSET U(0x00) 13*54fd6939SJiyong Park #define GPIO_TYPE_OFFSET U(0x04) 14*54fd6939SJiyong Park #define GPIO_SPEED_OFFSET U(0x08) 15*54fd6939SJiyong Park #define GPIO_PUPD_OFFSET U(0x0C) 16*54fd6939SJiyong Park #define GPIO_BSRR_OFFSET U(0x18) 17*54fd6939SJiyong Park #define GPIO_AFRL_OFFSET U(0x20) 18*54fd6939SJiyong Park #define GPIO_AFRH_OFFSET U(0x24) 19*54fd6939SJiyong Park #define GPIO_SECR_OFFSET U(0x30) 20*54fd6939SJiyong Park 21*54fd6939SJiyong Park #define GPIO_ALT_LOWER_LIMIT U(0x08) 22*54fd6939SJiyong Park 23*54fd6939SJiyong Park #define GPIO_PIN_(_x) U(_x) 24*54fd6939SJiyong Park #define GPIO_PIN_MAX GPIO_PIN_(15) 25*54fd6939SJiyong Park 26*54fd6939SJiyong Park #define GPIO_ALTERNATE_(_x) U(_x) 27*54fd6939SJiyong Park #define GPIO_ALTERNATE_MASK U(0x0F) 28*54fd6939SJiyong Park 29*54fd6939SJiyong Park #define GPIO_MODE_INPUT 0x00 30*54fd6939SJiyong Park #define GPIO_MODE_OUTPUT 0x01 31*54fd6939SJiyong Park #define GPIO_MODE_ALTERNATE 0x02 32*54fd6939SJiyong Park #define GPIO_MODE_ANALOG 0x03 33*54fd6939SJiyong Park #define GPIO_MODE_MASK U(0x03) 34*54fd6939SJiyong Park 35*54fd6939SJiyong Park #define GPIO_OPEN_DRAIN U(0x10) 36*54fd6939SJiyong Park 37*54fd6939SJiyong Park #define GPIO_SPEED_LOW 0x00 38*54fd6939SJiyong Park #define GPIO_SPEED_MEDIUM 0x01 39*54fd6939SJiyong Park #define GPIO_SPEED_HIGH 0x02 40*54fd6939SJiyong Park #define GPIO_SPEED_VERY_HIGH 0x03 41*54fd6939SJiyong Park #define GPIO_SPEED_MASK U(0x03) 42*54fd6939SJiyong Park 43*54fd6939SJiyong Park #define GPIO_NO_PULL 0x00 44*54fd6939SJiyong Park #define GPIO_PULL_UP 0x01 45*54fd6939SJiyong Park #define GPIO_PULL_DOWN 0x02 46*54fd6939SJiyong Park #define GPIO_PULL_MASK U(0x03) 47*54fd6939SJiyong Park 48*54fd6939SJiyong Park #ifndef __ASSEMBLER__ 49*54fd6939SJiyong Park #include <stdint.h> 50*54fd6939SJiyong Park 51*54fd6939SJiyong Park int dt_set_pinctrl_config(int node); 52*54fd6939SJiyong Park void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t speed, 53*54fd6939SJiyong Park uint32_t pull, uint32_t alternate, uint8_t status); 54*54fd6939SJiyong Park void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure); 55*54fd6939SJiyong Park #endif /*__ASSEMBLER__*/ 56*54fd6939SJiyong Park 57*54fd6939SJiyong Park #endif /* STM32_GPIO_H */ 58