1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park .globl rom_lib_init 8*54fd6939SJiyong Park .extern __DATA_RAM_START__, __DATA_ROM_START__, __DATA_RAM_END__ 9*54fd6939SJiyong Park .extern memset, memcpy 10*54fd6939SJiyong Park 11*54fd6939SJiyong Parkrom_lib_init: 12*54fd6939SJiyong Park cmp w0, #1 13*54fd6939SJiyong Park mov w0, #0 14*54fd6939SJiyong Park b.le 1f 15*54fd6939SJiyong Park ret 16*54fd6939SJiyong Park 17*54fd6939SJiyong Park1: stp x29, x30, [sp, #-16]! 18*54fd6939SJiyong Park adrp x0, __DATA_RAM_START__ 19*54fd6939SJiyong Park adrp x1, __DATA_ROM_START__ 20*54fd6939SJiyong Park add x1, x1, :lo12:__DATA_ROM_START__ 21*54fd6939SJiyong Park adrp x2, __DATA_RAM_END__ 22*54fd6939SJiyong Park add x2, x2, :lo12:__DATA_RAM_END__ 23*54fd6939SJiyong Park sub x2, x2, x0 24*54fd6939SJiyong Park bl memcpy 25*54fd6939SJiyong Park 26*54fd6939SJiyong Park adrp x0,__BSS_START__ 27*54fd6939SJiyong Park add x0, x0, :lo12:__BSS_START__ 28*54fd6939SJiyong Park mov x1, #0 29*54fd6939SJiyong Park adrp x2, __BSS_END__ 30*54fd6939SJiyong Park add x2, x2, :lo12:__BSS_END__ 31*54fd6939SJiyong Park sub x2, x2, x0 32*54fd6939SJiyong Park bl memset 33*54fd6939SJiyong Park ldp x29, x30, [sp], #16 34*54fd6939SJiyong Park 35*54fd6939SJiyong Park mov w0, #1 36*54fd6939SJiyong Park ret 37