1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <platform_def.h> 8*54fd6939SJiyong Park 9*54fd6939SJiyong Park #include <arch.h> 10*54fd6939SJiyong Park #include <drivers/arm/ccn.h> 11*54fd6939SJiyong Park #include <plat/arm/common/plat_arm.h> 12*54fd6939SJiyong Park 13*54fd6939SJiyong Park static const unsigned char master_to_rn_id_map[] = { 14*54fd6939SJiyong Park PLAT_ARM_CLUSTER_TO_CCN_ID_MAP 15*54fd6939SJiyong Park }; 16*54fd6939SJiyong Park 17*54fd6939SJiyong Park static const ccn_desc_t arm_ccn_desc = { 18*54fd6939SJiyong Park .periphbase = PLAT_ARM_CCN_BASE, 19*54fd6939SJiyong Park .num_masters = ARRAY_SIZE(master_to_rn_id_map), 20*54fd6939SJiyong Park .master_to_rn_id_map = master_to_rn_id_map 21*54fd6939SJiyong Park }; 22*54fd6939SJiyong Park 23*54fd6939SJiyong Park CASSERT(PLAT_ARM_CLUSTER_COUNT == ARRAY_SIZE(master_to_rn_id_map), 24*54fd6939SJiyong Park assert_invalid_cluster_count_for_ccn_variant); 25*54fd6939SJiyong Park 26*54fd6939SJiyong Park /****************************************************************************** 27*54fd6939SJiyong Park * The following functions are defined as weak to allow a platform to override 28*54fd6939SJiyong Park * the way ARM CCN driver is initialised and used. 29*54fd6939SJiyong Park *****************************************************************************/ 30*54fd6939SJiyong Park #pragma weak plat_arm_interconnect_init 31*54fd6939SJiyong Park #pragma weak plat_arm_interconnect_enter_coherency 32*54fd6939SJiyong Park #pragma weak plat_arm_interconnect_exit_coherency 33*54fd6939SJiyong Park 34*54fd6939SJiyong Park 35*54fd6939SJiyong Park /****************************************************************************** 36*54fd6939SJiyong Park * Helper function to initialize ARM CCN driver. 37*54fd6939SJiyong Park *****************************************************************************/ plat_arm_interconnect_init(void)38*54fd6939SJiyong Parkvoid __init plat_arm_interconnect_init(void) 39*54fd6939SJiyong Park { 40*54fd6939SJiyong Park ccn_init(&arm_ccn_desc); 41*54fd6939SJiyong Park } 42*54fd6939SJiyong Park 43*54fd6939SJiyong Park /****************************************************************************** 44*54fd6939SJiyong Park * Helper function to place current master into coherency 45*54fd6939SJiyong Park *****************************************************************************/ plat_arm_interconnect_enter_coherency(void)46*54fd6939SJiyong Parkvoid plat_arm_interconnect_enter_coherency(void) 47*54fd6939SJiyong Park { 48*54fd6939SJiyong Park ccn_enter_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 49*54fd6939SJiyong Park } 50*54fd6939SJiyong Park 51*54fd6939SJiyong Park /****************************************************************************** 52*54fd6939SJiyong Park * Helper function to remove current master from coherency 53*54fd6939SJiyong Park *****************************************************************************/ plat_arm_interconnect_exit_coherency(void)54*54fd6939SJiyong Parkvoid plat_arm_interconnect_exit_coherency(void) 55*54fd6939SJiyong Park { 56*54fd6939SJiyong Park ccn_exit_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 57*54fd6939SJiyong Park } 58