1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park *
4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park */
6*54fd6939SJiyong Park
7*54fd6939SJiyong Park #include <platform_def.h>
8*54fd6939SJiyong Park
9*54fd6939SJiyong Park #include <drivers/arm/gicv2.h>
10*54fd6939SJiyong Park #include <plat/arm/common/plat_arm.h>
11*54fd6939SJiyong Park #include <plat/common/platform.h>
12*54fd6939SJiyong Park
13*54fd6939SJiyong Park /******************************************************************************
14*54fd6939SJiyong Park * The following functions are defined as weak to allow a platform to override
15*54fd6939SJiyong Park * the way the GICv2 driver is initialised and used.
16*54fd6939SJiyong Park *****************************************************************************/
17*54fd6939SJiyong Park #pragma weak plat_arm_gic_driver_init
18*54fd6939SJiyong Park #pragma weak plat_arm_gic_init
19*54fd6939SJiyong Park #pragma weak plat_arm_gic_cpuif_enable
20*54fd6939SJiyong Park #pragma weak plat_arm_gic_cpuif_disable
21*54fd6939SJiyong Park #pragma weak plat_arm_gic_pcpu_init
22*54fd6939SJiyong Park
23*54fd6939SJiyong Park /******************************************************************************
24*54fd6939SJiyong Park * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
25*54fd6939SJiyong Park * interrupts.
26*54fd6939SJiyong Park *****************************************************************************/
27*54fd6939SJiyong Park static const interrupt_prop_t arm_interrupt_props[] = {
28*54fd6939SJiyong Park PLAT_ARM_G1S_IRQ_PROPS(GICV2_INTR_GROUP0),
29*54fd6939SJiyong Park PLAT_ARM_G0_IRQ_PROPS(GICV2_INTR_GROUP0)
30*54fd6939SJiyong Park };
31*54fd6939SJiyong Park
32*54fd6939SJiyong Park static unsigned int target_mask_array[PLATFORM_CORE_COUNT];
33*54fd6939SJiyong Park
34*54fd6939SJiyong Park static const gicv2_driver_data_t arm_gic_data = {
35*54fd6939SJiyong Park .gicd_base = PLAT_ARM_GICD_BASE,
36*54fd6939SJiyong Park .gicc_base = PLAT_ARM_GICC_BASE,
37*54fd6939SJiyong Park .interrupt_props = arm_interrupt_props,
38*54fd6939SJiyong Park .interrupt_props_num = ARRAY_SIZE(arm_interrupt_props),
39*54fd6939SJiyong Park .target_masks = target_mask_array,
40*54fd6939SJiyong Park .target_masks_num = ARRAY_SIZE(target_mask_array),
41*54fd6939SJiyong Park };
42*54fd6939SJiyong Park
43*54fd6939SJiyong Park /******************************************************************************
44*54fd6939SJiyong Park * ARM common helper to initialize the GICv2 only driver.
45*54fd6939SJiyong Park *****************************************************************************/
plat_arm_gic_driver_init(void)46*54fd6939SJiyong Park void plat_arm_gic_driver_init(void)
47*54fd6939SJiyong Park {
48*54fd6939SJiyong Park gicv2_driver_init(&arm_gic_data);
49*54fd6939SJiyong Park }
50*54fd6939SJiyong Park
plat_arm_gic_init(void)51*54fd6939SJiyong Park void plat_arm_gic_init(void)
52*54fd6939SJiyong Park {
53*54fd6939SJiyong Park gicv2_distif_init();
54*54fd6939SJiyong Park gicv2_pcpu_distif_init();
55*54fd6939SJiyong Park gicv2_set_pe_target_mask(plat_my_core_pos());
56*54fd6939SJiyong Park gicv2_cpuif_enable();
57*54fd6939SJiyong Park }
58*54fd6939SJiyong Park
59*54fd6939SJiyong Park /******************************************************************************
60*54fd6939SJiyong Park * ARM common helper to enable the GICv2 CPU interface
61*54fd6939SJiyong Park *****************************************************************************/
plat_arm_gic_cpuif_enable(void)62*54fd6939SJiyong Park void plat_arm_gic_cpuif_enable(void)
63*54fd6939SJiyong Park {
64*54fd6939SJiyong Park gicv2_cpuif_enable();
65*54fd6939SJiyong Park }
66*54fd6939SJiyong Park
67*54fd6939SJiyong Park /******************************************************************************
68*54fd6939SJiyong Park * ARM common helper to disable the GICv2 CPU interface
69*54fd6939SJiyong Park *****************************************************************************/
plat_arm_gic_cpuif_disable(void)70*54fd6939SJiyong Park void plat_arm_gic_cpuif_disable(void)
71*54fd6939SJiyong Park {
72*54fd6939SJiyong Park gicv2_cpuif_disable();
73*54fd6939SJiyong Park }
74*54fd6939SJiyong Park
75*54fd6939SJiyong Park /******************************************************************************
76*54fd6939SJiyong Park * ARM common helper to initialize the per cpu distributor interface in GICv2
77*54fd6939SJiyong Park *****************************************************************************/
plat_arm_gic_pcpu_init(void)78*54fd6939SJiyong Park void plat_arm_gic_pcpu_init(void)
79*54fd6939SJiyong Park {
80*54fd6939SJiyong Park gicv2_pcpu_distif_init();
81*54fd6939SJiyong Park gicv2_set_pe_target_mask(plat_my_core_pos());
82*54fd6939SJiyong Park }
83*54fd6939SJiyong Park
84*54fd6939SJiyong Park /******************************************************************************
85*54fd6939SJiyong Park * Stubs for Redistributor power management. Although GICv2 doesn't have
86*54fd6939SJiyong Park * Redistributor interface, these are provided for the sake of uniform GIC API
87*54fd6939SJiyong Park *****************************************************************************/
plat_arm_gic_redistif_on(void)88*54fd6939SJiyong Park void plat_arm_gic_redistif_on(void)
89*54fd6939SJiyong Park {
90*54fd6939SJiyong Park return;
91*54fd6939SJiyong Park }
92*54fd6939SJiyong Park
plat_arm_gic_redistif_off(void)93*54fd6939SJiyong Park void plat_arm_gic_redistif_off(void)
94*54fd6939SJiyong Park {
95*54fd6939SJiyong Park return;
96*54fd6939SJiyong Park }
97*54fd6939SJiyong Park
98*54fd6939SJiyong Park
99*54fd6939SJiyong Park /******************************************************************************
100*54fd6939SJiyong Park * ARM common helper to save & restore the GICv3 on resume from system suspend.
101*54fd6939SJiyong Park * The normal world currently takes care of saving and restoring the GICv2
102*54fd6939SJiyong Park * registers due to legacy reasons. Hence we just initialize the Distributor
103*54fd6939SJiyong Park * on resume from system suspend.
104*54fd6939SJiyong Park *****************************************************************************/
plat_arm_gic_save(void)105*54fd6939SJiyong Park void plat_arm_gic_save(void)
106*54fd6939SJiyong Park {
107*54fd6939SJiyong Park return;
108*54fd6939SJiyong Park }
109*54fd6939SJiyong Park
plat_arm_gic_resume(void)110*54fd6939SJiyong Park void plat_arm_gic_resume(void)
111*54fd6939SJiyong Park {
112*54fd6939SJiyong Park gicv2_distif_init();
113*54fd6939SJiyong Park gicv2_pcpu_distif_init();
114*54fd6939SJiyong Park }
115