xref: /aosp_15_r20/external/arm-trusted-firmware/plat/imx/imx8m/imx_aipstz.c (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  */
6*54fd6939SJiyong Park 
7*54fd6939SJiyong Park #include <lib/mmio.h>
8*54fd6939SJiyong Park 
9*54fd6939SJiyong Park #include <imx_aipstz.h>
10*54fd6939SJiyong Park 
imx_aipstz_init(const struct aipstz_cfg * aipstz_cfg)11*54fd6939SJiyong Park void imx_aipstz_init(const struct aipstz_cfg *aipstz_cfg)
12*54fd6939SJiyong Park {
13*54fd6939SJiyong Park 	const struct aipstz_cfg *aipstz = aipstz_cfg;
14*54fd6939SJiyong Park 
15*54fd6939SJiyong Park 	while (aipstz->base != 0U) {
16*54fd6939SJiyong Park 		mmio_write_32(aipstz->base + AIPSTZ_MPR0, aipstz->mpr0);
17*54fd6939SJiyong Park 		mmio_write_32(aipstz->base + AIPSTZ_MPR1, aipstz->mpr1);
18*54fd6939SJiyong Park 
19*54fd6939SJiyong Park 		for (int i = 0; i < AIPSTZ_OPACR_NUM; i++)
20*54fd6939SJiyong Park 			mmio_write_32(aipstz->base + OPACR_OFFSET(i), aipstz->opacr[i]);
21*54fd6939SJiyong Park 
22*54fd6939SJiyong Park 		aipstz++;
23*54fd6939SJiyong Park 	}
24*54fd6939SJiyong Park }
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