1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <arch_helpers.h> 8*54fd6939SJiyong Park #include <drivers/delay_timer.h> 9*54fd6939SJiyong Park #include <lib/mmio.h> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park #define TIMER_BASE_ADDR 0x02B00000 12*54fd6939SJiyong Park ls_get_timer(uint64_t start)13*54fd6939SJiyong Parkuint64_t ls_get_timer(uint64_t start) 14*54fd6939SJiyong Park { 15*54fd6939SJiyong Park return read_cntpct_el0() * 1000 / read_cntfrq_el0() - start; 16*54fd6939SJiyong Park } 17*54fd6939SJiyong Park ls_timeus_get_value(void)18*54fd6939SJiyong Parkstatic uint32_t ls_timeus_get_value(void) 19*54fd6939SJiyong Park { 20*54fd6939SJiyong Park /* 21*54fd6939SJiyong Park * Generic delay timer implementation expects the timer to be a down 22*54fd6939SJiyong Park * counter. We apply bitwise NOT operator to the tick values returned 23*54fd6939SJiyong Park * by read_cntpct_el0() to simulate the down counter. The value is 24*54fd6939SJiyong Park * clipped from 64 to 32 bits. 25*54fd6939SJiyong Park */ 26*54fd6939SJiyong Park return (uint32_t)(~read_cntpct_el0()); 27*54fd6939SJiyong Park } 28*54fd6939SJiyong Park 29*54fd6939SJiyong Park static const timer_ops_t ls_timer_ops = { 30*54fd6939SJiyong Park .get_timer_value = ls_timeus_get_value, 31*54fd6939SJiyong Park .clk_mult = 1, 32*54fd6939SJiyong Park .clk_div = 25, 33*54fd6939SJiyong Park }; 34*54fd6939SJiyong Park 35*54fd6939SJiyong Park 36*54fd6939SJiyong Park /* 37*54fd6939SJiyong Park * Initialise the nxp layerscape on-chip free rolling us counter as the delay 38*54fd6939SJiyong Park * timer. 39*54fd6939SJiyong Park */ ls_delay_timer_init(void)40*54fd6939SJiyong Parkvoid ls_delay_timer_init(void) 41*54fd6939SJiyong Park { 42*54fd6939SJiyong Park uintptr_t cntcr = TIMER_BASE_ADDR; 43*54fd6939SJiyong Park 44*54fd6939SJiyong Park mmio_write_32(cntcr, 0x1); 45*54fd6939SJiyong Park 46*54fd6939SJiyong Park timer_init(&ls_timer_ops); 47*54fd6939SJiyong Park } 48