1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <endian.h> 8*54fd6939SJiyong Park 9*54fd6939SJiyong Park #include <platform_def.h> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park #include <common/debug.h> 12*54fd6939SJiyong Park #include <lib/mmio.h> 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park #include "ns_access.h" 15*54fd6939SJiyong Park enable_devices_ns_access(struct csu_ns_dev * _ns_dev,uint32_t num)16*54fd6939SJiyong Parkstatic void enable_devices_ns_access(struct csu_ns_dev *_ns_dev, uint32_t num) 17*54fd6939SJiyong Park { 18*54fd6939SJiyong Park uint32_t *base = (uint32_t *)CONFIG_SYS_FSL_CSU_ADDR; 19*54fd6939SJiyong Park uint32_t *reg; 20*54fd6939SJiyong Park uint32_t val; 21*54fd6939SJiyong Park int i; 22*54fd6939SJiyong Park 23*54fd6939SJiyong Park for (i = 0; i < num; i++) { 24*54fd6939SJiyong Park reg = base + _ns_dev[i].ind / 2; 25*54fd6939SJiyong Park val = be32toh(mmio_read_32((uintptr_t)reg)); 26*54fd6939SJiyong Park if (_ns_dev[i].ind % 2 == 0) { 27*54fd6939SJiyong Park val &= 0x0000ffff; 28*54fd6939SJiyong Park val |= _ns_dev[i].val << 16; 29*54fd6939SJiyong Park } else { 30*54fd6939SJiyong Park val &= 0xffff0000; 31*54fd6939SJiyong Park val |= _ns_dev[i].val; 32*54fd6939SJiyong Park } 33*54fd6939SJiyong Park mmio_write_32((uintptr_t)reg, htobe32(val)); 34*54fd6939SJiyong Park } 35*54fd6939SJiyong Park } 36*54fd6939SJiyong Park enable_layerscape_ns_access(void)37*54fd6939SJiyong Parkvoid enable_layerscape_ns_access(void) 38*54fd6939SJiyong Park { 39*54fd6939SJiyong Park enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev)); 40*54fd6939SJiyong Park } 41