1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2019, Linaro Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <drivers/arm/gicv3.h> 8*54fd6939SJiyong Park #include <drivers/arm/gic_common.h> 9*54fd6939SJiyong Park #include <platform_def.h> 10*54fd6939SJiyong Park #include <plat/common/platform.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park static const interrupt_prop_t qemu_interrupt_props[] = { 13*54fd6939SJiyong Park PLATFORM_G1S_PROPS(INTR_GROUP1S), 14*54fd6939SJiyong Park PLATFORM_G0_PROPS(INTR_GROUP0) 15*54fd6939SJiyong Park }; 16*54fd6939SJiyong Park 17*54fd6939SJiyong Park static uintptr_t qemu_rdistif_base_addrs[PLATFORM_CORE_COUNT]; 18*54fd6939SJiyong Park qemu_mpidr_to_core_pos(unsigned long mpidr)19*54fd6939SJiyong Parkstatic unsigned int qemu_mpidr_to_core_pos(unsigned long mpidr) 20*54fd6939SJiyong Park { 21*54fd6939SJiyong Park return (unsigned int)plat_core_pos_by_mpidr(mpidr); 22*54fd6939SJiyong Park } 23*54fd6939SJiyong Park 24*54fd6939SJiyong Park static const gicv3_driver_data_t qemu_gicv3_driver_data = { 25*54fd6939SJiyong Park .gicd_base = GICD_BASE, 26*54fd6939SJiyong Park .gicr_base = GICR_BASE, 27*54fd6939SJiyong Park .interrupt_props = qemu_interrupt_props, 28*54fd6939SJiyong Park .interrupt_props_num = ARRAY_SIZE(qemu_interrupt_props), 29*54fd6939SJiyong Park .rdistif_num = PLATFORM_CORE_COUNT, 30*54fd6939SJiyong Park .rdistif_base_addrs = qemu_rdistif_base_addrs, 31*54fd6939SJiyong Park .mpidr_to_core_pos = qemu_mpidr_to_core_pos 32*54fd6939SJiyong Park }; 33*54fd6939SJiyong Park plat_qemu_gic_init(void)34*54fd6939SJiyong Parkvoid plat_qemu_gic_init(void) 35*54fd6939SJiyong Park { 36*54fd6939SJiyong Park gicv3_driver_init(&qemu_gicv3_driver_data); 37*54fd6939SJiyong Park gicv3_distif_init(); 38*54fd6939SJiyong Park gicv3_rdistif_init(plat_my_core_pos()); 39*54fd6939SJiyong Park gicv3_cpuif_enable(plat_my_core_pos()); 40*54fd6939SJiyong Park } 41*54fd6939SJiyong Park qemu_pwr_gic_on_finish(void)42*54fd6939SJiyong Parkvoid qemu_pwr_gic_on_finish(void) 43*54fd6939SJiyong Park { 44*54fd6939SJiyong Park gicv3_rdistif_init(plat_my_core_pos()); 45*54fd6939SJiyong Park gicv3_cpuif_enable(plat_my_core_pos()); 46*54fd6939SJiyong Park } 47*54fd6939SJiyong Park qemu_pwr_gic_off(void)48*54fd6939SJiyong Parkvoid qemu_pwr_gic_off(void) 49*54fd6939SJiyong Park { 50*54fd6939SJiyong Park gicv3_cpuif_disable(plat_my_core_pos()); 51*54fd6939SJiyong Park gicv3_rdistif_off(plat_my_core_pos()); 52*54fd6939SJiyong Park } 53