xref: /aosp_15_r20/external/capstone/arch/ARM/ARMInstPrinter.h (revision 9a0e4156d50a75a99ec4f1653a0e9602a5d45c18)
1*9a0e4156SSadaf Ebrahimi //===- ARMInstPrinter.h - Convert ARM MCInst to assembly syntax -*- C++ -*-===//
2*9a0e4156SSadaf Ebrahimi //
3*9a0e4156SSadaf Ebrahimi //                     The LLVM Compiler Infrastructure
4*9a0e4156SSadaf Ebrahimi //
5*9a0e4156SSadaf Ebrahimi // This file is distributed under the University of Illinois Open Source
6*9a0e4156SSadaf Ebrahimi // License. See LICENSE.TXT for details.
7*9a0e4156SSadaf Ebrahimi //
8*9a0e4156SSadaf Ebrahimi //===----------------------------------------------------------------------===//
9*9a0e4156SSadaf Ebrahimi //
10*9a0e4156SSadaf Ebrahimi // This class prints an ARM MCInst to a .s file.
11*9a0e4156SSadaf Ebrahimi //
12*9a0e4156SSadaf Ebrahimi //===----------------------------------------------------------------------===//
13*9a0e4156SSadaf Ebrahimi 
14*9a0e4156SSadaf Ebrahimi /* Capstone Disassembly Engine */
15*9a0e4156SSadaf Ebrahimi /* By Nguyen Anh Quynh <[email protected]>, 2013-2015 */
16*9a0e4156SSadaf Ebrahimi 
17*9a0e4156SSadaf Ebrahimi #ifndef CS_ARMINSTPRINTER_H
18*9a0e4156SSadaf Ebrahimi #define CS_ARMINSTPRINTER_H
19*9a0e4156SSadaf Ebrahimi 
20*9a0e4156SSadaf Ebrahimi #include "../../MCInst.h"
21*9a0e4156SSadaf Ebrahimi #include "../../MCRegisterInfo.h"
22*9a0e4156SSadaf Ebrahimi #include "../../SStream.h"
23*9a0e4156SSadaf Ebrahimi 
24*9a0e4156SSadaf Ebrahimi void ARM_printInst(MCInst *MI, SStream *O, void *Info);
25*9a0e4156SSadaf Ebrahimi void ARM_post_printer(csh handle, cs_insn *pub_insn, char *mnem, MCInst *mci);
26*9a0e4156SSadaf Ebrahimi 
27*9a0e4156SSadaf Ebrahimi // setup handle->get_regname
28*9a0e4156SSadaf Ebrahimi void ARM_getRegName(cs_struct *handle, int value);
29*9a0e4156SSadaf Ebrahimi 
30*9a0e4156SSadaf Ebrahimi // specify vector data type for vector instructions
31*9a0e4156SSadaf Ebrahimi void ARM_addVectorDataType(MCInst *MI, arm_vectordata_type vd);
32*9a0e4156SSadaf Ebrahimi 
33*9a0e4156SSadaf Ebrahimi void ARM_addVectorDataSize(MCInst *MI, int size);
34*9a0e4156SSadaf Ebrahimi 
35*9a0e4156SSadaf Ebrahimi void ARM_addReg(MCInst *MI, int reg);
36*9a0e4156SSadaf Ebrahimi 
37*9a0e4156SSadaf Ebrahimi // load usermode registers (LDM, STM)
38*9a0e4156SSadaf Ebrahimi void ARM_addUserMode(MCInst *MI);
39*9a0e4156SSadaf Ebrahimi 
40*9a0e4156SSadaf Ebrahimi // sysreg for MRS/MSR
41*9a0e4156SSadaf Ebrahimi void ARM_addSysReg(MCInst *MI, arm_sysreg reg);
42*9a0e4156SSadaf Ebrahimi 
43*9a0e4156SSadaf Ebrahimi #endif
44