1*67e74705SXin Li // REQUIRES: arm-registered-target
2*67e74705SXin Li // RUN: %clang_cc1 -triple armv7-apple-darwin9 -emit-llvm -w -o - %s | FileCheck %s
3*67e74705SXin Li
4*67e74705SXin Li typedef long long int64_t;
5*67e74705SXin Li typedef unsigned int uint32_t;
6*67e74705SXin Li
foo(int64_t v,volatile int64_t * p)7*67e74705SXin Li int64_t foo(int64_t v, volatile int64_t *p)
8*67e74705SXin Li {
9*67e74705SXin Li register uint32_t rl asm("r1");
10*67e74705SXin Li register uint32_t rh asm("r2");
11*67e74705SXin Li
12*67e74705SXin Li int64_t r;
13*67e74705SXin Li uint32_t t;
14*67e74705SXin Li
15*67e74705SXin Li __asm__ __volatile__( \
16*67e74705SXin Li "ldrexd%[_rl], %[_rh], [%[_p]]" \
17*67e74705SXin Li : [_rl] "=&r" (rl), [_rh] "=&r" (rh) \
18*67e74705SXin Li : [_p] "p" (p) : "memory");
19*67e74705SXin Li
20*67e74705SXin Li // CHECK: call { i32, i32 } asm sideeffect "ldrexd$0, $1, [$2]", "=&{r1},=&{r2},r,~{memory}"(i64*
21*67e74705SXin Li
22*67e74705SXin Li return r;
23*67e74705SXin Li }
24*67e74705SXin Li
25*67e74705SXin Li // Make sure we translate register names properly.
bar(void)26*67e74705SXin Li void bar (void) {
27*67e74705SXin Li register unsigned int rn asm("r14");
28*67e74705SXin Li register unsigned int d asm("r2");
29*67e74705SXin Li
30*67e74705SXin Li // CHECK: call i32 asm sideeffect "sub $1, $1, #32", "={r2},{lr}"
31*67e74705SXin Li asm volatile ("sub %1, %1, #32" : "=r"(d) : "r"(rn));
32*67e74705SXin Li }
33