1*67e74705SXin Li // RUN: %clang_cc1 %s -emit-llvm -o - -triple=i686-apple-darwin9 | FileCheck %s
2*67e74705SXin Li
atomic(void)3*67e74705SXin Li int atomic(void) {
4*67e74705SXin Li // non-sensical test for sync functions
5*67e74705SXin Li int old;
6*67e74705SXin Li int val = 1;
7*67e74705SXin Li char valc = 1;
8*67e74705SXin Li _Bool valb = 0;
9*67e74705SXin Li unsigned int uval = 1;
10*67e74705SXin Li int cmp = 0;
11*67e74705SXin Li int* ptrval;
12*67e74705SXin Li
13*67e74705SXin Li old = __sync_fetch_and_add(&val, 1);
14*67e74705SXin Li // CHECK: atomicrmw add i32* %val, i32 1 seq_cst
15*67e74705SXin Li
16*67e74705SXin Li old = __sync_fetch_and_sub(&valc, 2);
17*67e74705SXin Li // CHECK: atomicrmw sub i8* %valc, i8 2 seq_cst
18*67e74705SXin Li
19*67e74705SXin Li old = __sync_fetch_and_min(&val, 3);
20*67e74705SXin Li // CHECK: atomicrmw min i32* %val, i32 3 seq_cst
21*67e74705SXin Li
22*67e74705SXin Li old = __sync_fetch_and_max(&val, 4);
23*67e74705SXin Li // CHECK: atomicrmw max i32* %val, i32 4 seq_cst
24*67e74705SXin Li
25*67e74705SXin Li old = __sync_fetch_and_umin(&uval, 5u);
26*67e74705SXin Li // CHECK: atomicrmw umin i32* %uval, i32 5 seq_cst
27*67e74705SXin Li
28*67e74705SXin Li old = __sync_fetch_and_umax(&uval, 6u);
29*67e74705SXin Li // CHECK: atomicrmw umax i32* %uval, i32 6 seq_cst
30*67e74705SXin Li
31*67e74705SXin Li old = __sync_lock_test_and_set(&val, 7);
32*67e74705SXin Li // CHECK: atomicrmw xchg i32* %val, i32 7 seq_cst
33*67e74705SXin Li
34*67e74705SXin Li old = __sync_swap(&val, 8);
35*67e74705SXin Li // CHECK: atomicrmw xchg i32* %val, i32 8 seq_cst
36*67e74705SXin Li
37*67e74705SXin Li old = __sync_val_compare_and_swap(&val, 4, 1976);
38*67e74705SXin Li // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* %val, i32 4, i32 1976 seq_cst
39*67e74705SXin Li // CHECK: extractvalue { i32, i1 } [[PAIR]], 0
40*67e74705SXin Li
41*67e74705SXin Li old = __sync_bool_compare_and_swap(&val, 4, 1976);
42*67e74705SXin Li // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* %val, i32 4, i32 1976 seq_cst
43*67e74705SXin Li // CHECK: extractvalue { i32, i1 } [[PAIR]], 1
44*67e74705SXin Li
45*67e74705SXin Li old = __sync_fetch_and_and(&val, 0x9);
46*67e74705SXin Li // CHECK: atomicrmw and i32* %val, i32 9 seq_cst
47*67e74705SXin Li
48*67e74705SXin Li old = __sync_fetch_and_or(&val, 0xa);
49*67e74705SXin Li // CHECK: atomicrmw or i32* %val, i32 10 seq_cst
50*67e74705SXin Li
51*67e74705SXin Li old = __sync_fetch_and_xor(&val, 0xb);
52*67e74705SXin Li // CHECK: atomicrmw xor i32* %val, i32 11 seq_cst
53*67e74705SXin Li
54*67e74705SXin Li old = __sync_fetch_and_nand(&val, 0xc);
55*67e74705SXin Li // CHECK: atomicrmw nand i32* %val, i32 12 seq_cst
56*67e74705SXin Li
57*67e74705SXin Li old = __sync_add_and_fetch(&val, 1);
58*67e74705SXin Li // CHECK: atomicrmw add i32* %val, i32 1 seq_cst
59*67e74705SXin Li
60*67e74705SXin Li old = __sync_sub_and_fetch(&val, 2);
61*67e74705SXin Li // CHECK: atomicrmw sub i32* %val, i32 2 seq_cst
62*67e74705SXin Li
63*67e74705SXin Li old = __sync_and_and_fetch(&valc, 3);
64*67e74705SXin Li // CHECK: atomicrmw and i8* %valc, i8 3 seq_cst
65*67e74705SXin Li
66*67e74705SXin Li old = __sync_or_and_fetch(&valc, 4);
67*67e74705SXin Li // CHECK: atomicrmw or i8* %valc, i8 4 seq_cst
68*67e74705SXin Li
69*67e74705SXin Li old = __sync_xor_and_fetch(&valc, 5);
70*67e74705SXin Li // CHECK: atomicrmw xor i8* %valc, i8 5 seq_cst
71*67e74705SXin Li
72*67e74705SXin Li old = __sync_nand_and_fetch(&valc, 6);
73*67e74705SXin Li // CHECK: atomicrmw nand i8* %valc, i8 6 seq_cst
74*67e74705SXin Li
75*67e74705SXin Li __sync_val_compare_and_swap((void **)0, (void *)0, (void *)0);
76*67e74705SXin Li // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* null, i32 0, i32 0 seq_cst
77*67e74705SXin Li // CHECK: extractvalue { i32, i1 } [[PAIR]], 0
78*67e74705SXin Li
79*67e74705SXin Li if ( __sync_val_compare_and_swap(&valb, 0, 1)) {
80*67e74705SXin Li // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i8* %valb, i8 0, i8 1 seq_cst
81*67e74705SXin Li // CHECK: [[VAL:%[a-z0-9_.]+]] = extractvalue { i8, i1 } [[PAIR]], 0
82*67e74705SXin Li // CHECK: trunc i8 [[VAL]] to i1
83*67e74705SXin Li old = 42;
84*67e74705SXin Li }
85*67e74705SXin Li
86*67e74705SXin Li __sync_bool_compare_and_swap((void **)0, (void *)0, (void *)0);
87*67e74705SXin Li // CHECK: cmpxchg i32* null, i32 0, i32 0 seq_cst
88*67e74705SXin Li
89*67e74705SXin Li __sync_lock_release(&val);
90*67e74705SXin Li // CHECK: store atomic i32 0, {{.*}} release, align 4
91*67e74705SXin Li
92*67e74705SXin Li __sync_lock_release(&ptrval);
93*67e74705SXin Li // CHECK: store atomic i32 0, {{.*}} release, align 4
94*67e74705SXin Li
95*67e74705SXin Li __sync_synchronize ();
96*67e74705SXin Li // CHECK: fence seq_cst
97*67e74705SXin Li
98*67e74705SXin Li return old;
99*67e74705SXin Li }
100*67e74705SXin Li
101*67e74705SXin Li // CHECK: @release_return
release_return(int * lock)102*67e74705SXin Li void release_return(int *lock) {
103*67e74705SXin Li // Ensure this is actually returning void all the way through.
104*67e74705SXin Li return __sync_lock_release(lock);
105*67e74705SXin Li // CHECK: store atomic {{.*}} release, align 4
106*67e74705SXin Li }
107*67e74705SXin Li
108*67e74705SXin Li
109*67e74705SXin Li // rdar://8461279 - Atomics with address spaces.
110*67e74705SXin Li // CHECK: @addrspace
addrspace(int * P)111*67e74705SXin Li void addrspace(int __attribute__((address_space(256))) * P) {
112*67e74705SXin Li __sync_bool_compare_and_swap(P, 0, 1);
113*67e74705SXin Li // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst
114*67e74705SXin Li
115*67e74705SXin Li __sync_val_compare_and_swap(P, 0, 1);
116*67e74705SXin Li // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst
117*67e74705SXin Li
118*67e74705SXin Li __sync_xor_and_fetch(P, 123);
119*67e74705SXin Li // CHECK: atomicrmw xor i32 addrspace(256)*{{.*}}, i32 123 seq_cst
120*67e74705SXin Li }
121