1*67e74705SXin Li // RUN: %clang_cc1 -triple arm64-unknown-linux -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
2*67e74705SXin Li
f0(void * a,void * b)3*67e74705SXin Li void f0(void *a, void *b) {
4*67e74705SXin Li __clear_cache(a,b);
5*67e74705SXin Li // CHECK: call {{.*}} @__clear_cache
6*67e74705SXin Li }
7*67e74705SXin Li
tp(void)8*67e74705SXin Li void *tp (void) {
9*67e74705SXin Li return __builtin_thread_pointer ();
10*67e74705SXin Li // CHECK: call {{.*}} @llvm.thread.pointer()
11*67e74705SXin Li }
12*67e74705SXin Li
13*67e74705SXin Li // CHECK: call {{.*}} @llvm.aarch64.rbit.i32(i32 %a)
rbit(unsigned a)14*67e74705SXin Li unsigned rbit(unsigned a) {
15*67e74705SXin Li return __builtin_arm_rbit(a);
16*67e74705SXin Li }
17*67e74705SXin Li
18*67e74705SXin Li // CHECK: call {{.*}} @llvm.aarch64.rbit.i64(i64 %a)
rbit64(unsigned long long a)19*67e74705SXin Li unsigned long long rbit64(unsigned long long a) {
20*67e74705SXin Li return __builtin_arm_rbit64(a);
21*67e74705SXin Li }
22*67e74705SXin Li
hints()23*67e74705SXin Li void hints() {
24*67e74705SXin Li __builtin_arm_nop(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 0)
25*67e74705SXin Li __builtin_arm_yield(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 1)
26*67e74705SXin Li __builtin_arm_wfe(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 2)
27*67e74705SXin Li __builtin_arm_wfi(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 3)
28*67e74705SXin Li __builtin_arm_sev(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 4)
29*67e74705SXin Li __builtin_arm_sevl(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 5)
30*67e74705SXin Li }
31*67e74705SXin Li
barriers()32*67e74705SXin Li void barriers() {
33*67e74705SXin Li __builtin_arm_dmb(1); //CHECK: call {{.*}} @llvm.aarch64.dmb(i32 1)
34*67e74705SXin Li __builtin_arm_dsb(2); //CHECK: call {{.*}} @llvm.aarch64.dsb(i32 2)
35*67e74705SXin Li __builtin_arm_isb(3); //CHECK: call {{.*}} @llvm.aarch64.isb(i32 3)
36*67e74705SXin Li }
37*67e74705SXin Li
prefetch()38*67e74705SXin Li void prefetch() {
39*67e74705SXin Li __builtin_arm_prefetch(0, 1, 2, 0, 1); // pstl3keep
40*67e74705SXin Li // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 1, i32 1, i32 1)
41*67e74705SXin Li
42*67e74705SXin Li __builtin_arm_prefetch(0, 0, 0, 1, 1); // pldl1keep
43*67e74705SXin Li // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1)
44*67e74705SXin Li
45*67e74705SXin Li __builtin_arm_prefetch(0, 0, 0, 1, 1); // pldl1strm
46*67e74705SXin Li // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1)
47*67e74705SXin Li
48*67e74705SXin Li __builtin_arm_prefetch(0, 0, 0, 0, 0); // plil1keep
49*67e74705SXin Li // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
50*67e74705SXin Li }
51*67e74705SXin Li
rsr()52*67e74705SXin Li unsigned rsr() {
53*67e74705SXin Li // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
54*67e74705SXin Li // CHECK-NEXT: trunc i64 [[V0]] to i32
55*67e74705SXin Li return __builtin_arm_rsr("1:2:3:4:5");
56*67e74705SXin Li }
57*67e74705SXin Li
rsr64()58*67e74705SXin Li unsigned long rsr64() {
59*67e74705SXin Li // CHECK: call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
60*67e74705SXin Li return __builtin_arm_rsr64("1:2:3:4:5");
61*67e74705SXin Li }
62*67e74705SXin Li
rsrp()63*67e74705SXin Li void *rsrp() {
64*67e74705SXin Li // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
65*67e74705SXin Li // CHECK-NEXT: inttoptr i64 [[V0]] to i8*
66*67e74705SXin Li return __builtin_arm_rsrp("1:2:3:4:5");
67*67e74705SXin Li }
68*67e74705SXin Li
wsr(unsigned v)69*67e74705SXin Li void wsr(unsigned v) {
70*67e74705SXin Li // CHECK: [[V0:[%A-Za-z0-9.]+]] = zext i32 %v to i64
71*67e74705SXin Li // CHECK-NEXT: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 [[V0]])
72*67e74705SXin Li __builtin_arm_wsr("1:2:3:4:5", v);
73*67e74705SXin Li }
74*67e74705SXin Li
wsr64(unsigned long v)75*67e74705SXin Li void wsr64(unsigned long v) {
76*67e74705SXin Li // CHECK: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 %v)
77*67e74705SXin Li __builtin_arm_wsr64("1:2:3:4:5", v);
78*67e74705SXin Li }
79*67e74705SXin Li
wsrp(void * v)80*67e74705SXin Li void wsrp(void *v) {
81*67e74705SXin Li // CHECK: [[V0:[%A-Za-z0-9.]+]] = ptrtoint i8* %v to i64
82*67e74705SXin Li // CHECK-NEXT: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 [[V0]])
83*67e74705SXin Li __builtin_arm_wsrp("1:2:3:4:5", v);
84*67e74705SXin Li }
85*67e74705SXin Li
86*67e74705SXin Li // CHECK: ![[M0]] = !{!"1:2:3:4:5"}
87