1*67e74705SXin Li // REQUIRES: arm-registered-target
2*67e74705SXin Li // RUN: %clang_cc1 -triple armv7a-linux-gnueabi \
3*67e74705SXin Li // RUN: -target-cpu cortex-a8 \
4*67e74705SXin Li // RUN: -emit-llvm -o - %s | FileCheck %s
5*67e74705SXin Li #include <arm_neon.h>
main()6*67e74705SXin Li int main(){
7*67e74705SXin Li int32_t v0[3];
8*67e74705SXin Li int32x2x3_t v1;
9*67e74705SXin Li int32_t v2[4];
10*67e74705SXin Li int32x2x4_t v3;
11*67e74705SXin Li int64x1x3_t v4;
12*67e74705SXin Li int64x1x4_t v5;
13*67e74705SXin Li int64_t v6[3];
14*67e74705SXin Li int64_t v7[4];
15*67e74705SXin Li
16*67e74705SXin Li v1 = vld3_dup_s32(v0);
17*67e74705SXin Li // CHECK: [[T168:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld3lane.v2i32.p0i8(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
18*67e74705SXin Li // CHECK-NEXT: [[T169:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T168]], 0
19*67e74705SXin Li // CHECK-NEXT: [[T170:%.*]] = shufflevector <2 x i32> [[T169]], <2 x i32> [[T169]], <2 x i32> zeroinitializer
20*67e74705SXin Li // CHECK-NEXT: [[T171:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T168]], <2 x i32> [[T170]], 0
21*67e74705SXin Li // CHECK-NEXT: [[T172:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T171]], 1
22*67e74705SXin Li // CHECK-NEXT: [[T173:%.*]] = shufflevector <2 x i32> [[T172]], <2 x i32> [[T172]], <2 x i32> zeroinitializer
23*67e74705SXin Li // CHECK-NEXT: [[T174:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T171]], <2 x i32> [[T173]], 1
24*67e74705SXin Li // CHECK-NEXT: [[T175:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T174]], 2
25*67e74705SXin Li // CHECK-NEXT: [[T176:%.*]] = shufflevector <2 x i32> [[T175]], <2 x i32> [[T175]], <2 x i32> zeroinitializer
26*67e74705SXin Li // CHECK-NEXT: [[T177:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T174]], <2 x i32> [[T176]], 2
27*67e74705SXin Li
28*67e74705SXin Li v3 = vld4_dup_s32(v2);
29*67e74705SXin Li // CHECK: [[T178:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld4lane.v2i32.p0i8(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
30*67e74705SXin Li // CHECK-NEXT: [[T179:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T178]], 0
31*67e74705SXin Li // CHECK-NEXT: [[T180:%.*]] = shufflevector <2 x i32> [[T179]], <2 x i32> [[T179]], <2 x i32> zeroinitializer
32*67e74705SXin Li // CHECK-NEXT: [[T181:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T178]], <2 x i32> [[T180]], 0
33*67e74705SXin Li // CHECK-NEXT: [[T182:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T181]], 1
34*67e74705SXin Li // CHECK-NEXT: [[T183:%.*]] = shufflevector <2 x i32> [[T182]], <2 x i32> [[T182]], <2 x i32> zeroinitializer
35*67e74705SXin Li // CHECK-NEXT: [[T184:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T181]], <2 x i32> [[T183]], 1
36*67e74705SXin Li // CHECK-NEXT: [[T185:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T184]], 2
37*67e74705SXin Li // CHECK-NEXT: [[T186:%.*]] = shufflevector <2 x i32> [[T185]], <2 x i32> [[T185]], <2 x i32> zeroinitializer
38*67e74705SXin Li // CHECK-NEXT: [[T187:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T184]], <2 x i32> [[T186]], 2
39*67e74705SXin Li // CHECK-NEXT: [[T188:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T187]], 3
40*67e74705SXin Li // CHECK-NEXT: [[T189:%.*]] = shufflevector <2 x i32> [[T188]], <2 x i32> [[T188]], <2 x i32> zeroinitializer
41*67e74705SXin Li // CHECK-NEXT: [[T190:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T187]], <2 x i32> [[T189]], 3
42*67e74705SXin Li
43*67e74705SXin Li v4 = vld3_dup_s64(v6);
44*67e74705SXin Li // CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld3.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
45*67e74705SXin Li
46*67e74705SXin Li v5 = vld4_dup_s64(v7);
47*67e74705SXin Li // CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld4.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
48*67e74705SXin Li
49*67e74705SXin Li return 0;
50*67e74705SXin Li }
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