1*67e74705SXin Li; Simple bit of IR to mimic CUDA's libdevice. We want to be 2*67e74705SXin Li; able to link with it and we need to make sure all __nvvm_reflect 3*67e74705SXin Li; calls are eliminated by the time PTX has been produced. 4*67e74705SXin Li 5*67e74705SXin Litarget triple = "nvptx-unknown-cuda" 6*67e74705SXin Li 7*67e74705SXin Lideclare i32 @__nvvm_reflect(i8*) 8*67e74705SXin Li 9*67e74705SXin Li@"$str" = private addrspace(1) constant [8 x i8] c"USE_MUL\00" 10*67e74705SXin Li 11*67e74705SXin Lidefine void @unused_subfunc(float %a) { 12*67e74705SXin Li ret void 13*67e74705SXin Li} 14*67e74705SXin Li 15*67e74705SXin Lidefine void @used_subfunc(float %a) { 16*67e74705SXin Li ret void 17*67e74705SXin Li} 18*67e74705SXin Li 19*67e74705SXin Lidefine float @_Z17device_mul_or_addff(float %a, float %b) { 20*67e74705SXin Li %reflect = call i32 @__nvvm_reflect(i8* addrspacecast (i8 addrspace(1)* getelementptr inbounds ([8 x i8], [8 x i8] addrspace(1)* @"$str", i32 0, i32 0) to i8*)) 21*67e74705SXin Li %cmp = icmp ne i32 %reflect, 0 22*67e74705SXin Li br i1 %cmp, label %use_mul, label %use_add 23*67e74705SXin Li 24*67e74705SXin Liuse_mul: 25*67e74705SXin Li %ret1 = fmul float %a, %b 26*67e74705SXin Li br label %exit 27*67e74705SXin Li 28*67e74705SXin Liuse_add: 29*67e74705SXin Li %ret2 = fadd float %a, %b 30*67e74705SXin Li br label %exit 31*67e74705SXin Li 32*67e74705SXin Liexit: 33*67e74705SXin Li %ret = phi float [%ret1, %use_mul], [%ret2, %use_add] 34*67e74705SXin Li 35*67e74705SXin Li call void @used_subfunc(float %ret) 36*67e74705SXin Li 37*67e74705SXin Li ret float %ret 38*67e74705SXin Li} 39