1*67e74705SXin Li#!/usr/bin/env python 2*67e74705SXin Li 3*67e74705SXin Liimport sys, fileinput 4*67e74705SXin Li 5*67e74705SXin Lierr=0 6*67e74705SXin Li 7*67e74705SXin Li# Giant associative set of builtin->intrinsic mappings where clang doesn't 8*67e74705SXin Li# implement the builtin since the vector operation works by default. 9*67e74705SXin Li 10*67e74705SXin Lirepl_map = { 11*67e74705SXin Li'__builtin_ia32_addps': '_mm_add_ps', 12*67e74705SXin Li'__builtin_ia32_addsd': '_mm_add_sd', 13*67e74705SXin Li'__builtin_ia32_addpd': '_mm_add_pd', 14*67e74705SXin Li'__builtin_ia32_addss': '_mm_add_ss', 15*67e74705SXin Li'__builtin_ia32_paddb128': '_mm_add_epi8', 16*67e74705SXin Li'__builtin_ia32_paddw128': '_mm_add_epi16', 17*67e74705SXin Li'__builtin_ia32_paddd128': '_mm_add_epi32', 18*67e74705SXin Li'__builtin_ia32_paddq128': '_mm_add_epi64', 19*67e74705SXin Li'__builtin_ia32_subps': '_mm_sub_ps', 20*67e74705SXin Li'__builtin_ia32_subsd': '_mm_sub_sd', 21*67e74705SXin Li'__builtin_ia32_subpd': '_mm_sub_pd', 22*67e74705SXin Li'__builtin_ia32_subss': '_mm_sub_ss', 23*67e74705SXin Li'__builtin_ia32_psubb128': '_mm_sub_epi8', 24*67e74705SXin Li'__builtin_ia32_psubw128': '_mm_sub_epi16', 25*67e74705SXin Li'__builtin_ia32_psubd128': '_mm_sub_epi32', 26*67e74705SXin Li'__builtin_ia32_psubq128': '_mm_sub_epi64', 27*67e74705SXin Li'__builtin_ia32_mulsd': '_mm_mul_sd', 28*67e74705SXin Li'__builtin_ia32_mulpd': '_mm_mul_pd', 29*67e74705SXin Li'__builtin_ia32_mulps': '_mm_mul_ps', 30*67e74705SXin Li'__builtin_ia32_mulss': '_mm_mul_ss', 31*67e74705SXin Li'__builtin_ia32_pmullw128': '_mm_mullo_epi16', 32*67e74705SXin Li'__builtin_ia32_divsd': '_mm_div_sd', 33*67e74705SXin Li'__builtin_ia32_divpd': '_mm_div_pd', 34*67e74705SXin Li'__builtin_ia32_divps': '_mm_div_ps', 35*67e74705SXin Li'__builtin_ia32_subss': '_mm_div_ss', 36*67e74705SXin Li'__builtin_ia32_andpd': '_mm_and_pd', 37*67e74705SXin Li'__builtin_ia32_andps': '_mm_and_ps', 38*67e74705SXin Li'__builtin_ia32_pand128': '_mm_and_si128', 39*67e74705SXin Li'__builtin_ia32_andnpd': '_mm_andnot_pd', 40*67e74705SXin Li'__builtin_ia32_andnps': '_mm_andnot_ps', 41*67e74705SXin Li'__builtin_ia32_pandn128': '_mm_andnot_si128', 42*67e74705SXin Li'__builtin_ia32_orpd': '_mm_or_pd', 43*67e74705SXin Li'__builtin_ia32_orps': '_mm_or_ps', 44*67e74705SXin Li'__builtin_ia32_por128': '_mm_or_si128', 45*67e74705SXin Li'__builtin_ia32_xorpd': '_mm_xor_pd', 46*67e74705SXin Li'__builtin_ia32_xorps': '_mm_xor_ps', 47*67e74705SXin Li'__builtin_ia32_pxor128': '_mm_xor_si128', 48*67e74705SXin Li'__builtin_ia32_cvtps2dq': '_mm_cvtps_epi32', 49*67e74705SXin Li'__builtin_ia32_cvtsd2ss': '_mm_cvtsd_ss', 50*67e74705SXin Li'__builtin_ia32_cvtsi2sd': '_mm_cvtsi32_sd', 51*67e74705SXin Li'__builtin_ia32_cvtss2sd': '_mm_cvtss_sd', 52*67e74705SXin Li'__builtin_ia32_cvttsd2si': '_mm_cvttsd_si32', 53*67e74705SXin Li'__builtin_ia32_vec_ext_v2df': '_mm_cvtsd_f64', 54*67e74705SXin Li'__builtin_ia32_loadhpd': '_mm_loadh_pd', 55*67e74705SXin Li'__builtin_ia32_loadlpd': '_mm_loadl_pd', 56*67e74705SXin Li'__builtin_ia32_loadlv4si': '_mm_loadl_epi64', 57*67e74705SXin Li'__builtin_ia32_cmpeqps': '_mm_cmpeq_ps', 58*67e74705SXin Li'__builtin_ia32_cmpltps': '_mm_cmplt_ps', 59*67e74705SXin Li'__builtin_ia32_cmpleps': '_mm_cmple_ps', 60*67e74705SXin Li'__builtin_ia32_cmpgtps': '_mm_cmpgt_ps', 61*67e74705SXin Li'__builtin_ia32_cmpgeps': '_mm_cmpge_ps', 62*67e74705SXin Li'__builtin_ia32_cmpunordps': '_mm_cmpunord_ps', 63*67e74705SXin Li'__builtin_ia32_cmpneqps': '_mm_cmpneq_ps', 64*67e74705SXin Li'__builtin_ia32_cmpnltps': '_mm_cmpnlt_ps', 65*67e74705SXin Li'__builtin_ia32_cmpnleps': '_mm_cmpnle_ps', 66*67e74705SXin Li'__builtin_ia32_cmpngtps': '_mm_cmpngt_ps', 67*67e74705SXin Li'__builtin_ia32_cmpordps': '_mm_cmpord_ps', 68*67e74705SXin Li'__builtin_ia32_cmpeqss': '_mm_cmpeq_ss', 69*67e74705SXin Li'__builtin_ia32_cmpltss': '_mm_cmplt_ss', 70*67e74705SXin Li'__builtin_ia32_cmpless': '_mm_cmple_ss', 71*67e74705SXin Li'__builtin_ia32_cmpunordss': '_mm_cmpunord_ss', 72*67e74705SXin Li'__builtin_ia32_cmpneqss': '_mm_cmpneq_ss', 73*67e74705SXin Li'__builtin_ia32_cmpnltss': '_mm_cmpnlt_ss', 74*67e74705SXin Li'__builtin_ia32_cmpnless': '_mm_cmpnle_ss', 75*67e74705SXin Li'__builtin_ia32_cmpngtss': '_mm_cmpngt_ss', 76*67e74705SXin Li'__builtin_ia32_cmpngess': '_mm_cmpnge_ss', 77*67e74705SXin Li'__builtin_ia32_cmpordss': '_mm_cmpord_ss', 78*67e74705SXin Li'__builtin_ia32_movss': '_mm_move_ss', 79*67e74705SXin Li'__builtin_ia32_movsd': '_mm_move_sd', 80*67e74705SXin Li'__builtin_ia32_movhlps': '_mm_movehl_ps', 81*67e74705SXin Li'__builtin_ia32_movlhps': '_mm_movelh_ps', 82*67e74705SXin Li'__builtin_ia32_movqv4si': '_mm_move_epi64', 83*67e74705SXin Li'__builtin_ia32_unpckhps': '_mm_unpackhi_ps', 84*67e74705SXin Li'__builtin_ia32_unpckhpd': '_mm_unpackhi_pd', 85*67e74705SXin Li'__builtin_ia32_punpckhbw128': '_mm_unpackhi_epi8', 86*67e74705SXin Li'__builtin_ia32_punpckhwd128': '_mm_unpackhi_epi16', 87*67e74705SXin Li'__builtin_ia32_punpckhdq128': '_mm_unpackhi_epi32', 88*67e74705SXin Li'__builtin_ia32_punpckhqdq128': '_mm_unpackhi_epi64', 89*67e74705SXin Li'__builtin_ia32_unpcklps': '_mm_unpacklo_ps', 90*67e74705SXin Li'__builtin_ia32_unpcklpd': '_mm_unpacklo_pd', 91*67e74705SXin Li'__builtin_ia32_punpcklbw128': '_mm_unpacklo_epi8', 92*67e74705SXin Li'__builtin_ia32_punpcklwd128': '_mm_unpacklo_epi16', 93*67e74705SXin Li'__builtin_ia32_punpckldq128': '_mm_unpacklo_epi32', 94*67e74705SXin Li'__builtin_ia32_punpcklqdq128': '_mm_unpacklo_epi64', 95*67e74705SXin Li'__builtin_ia32_cmpeqpd': '_mm_cmpeq_pd', 96*67e74705SXin Li'__builtin_ia32_cmpltpd': '_mm_cmplt_pd', 97*67e74705SXin Li'__builtin_ia32_cmplepd': '_mm_cmple_pd', 98*67e74705SXin Li'__builtin_ia32_cmpgtpd': '_mm_cmpgt_pd', 99*67e74705SXin Li'__builtin_ia32_cmpgepd': '_mm_cmpge_pd', 100*67e74705SXin Li'__builtin_ia32_cmpunordpd': '_mm_cmpunord_pd', 101*67e74705SXin Li'__builtin_ia32_cmpneqpd': '_mm_cmpneq_pd', 102*67e74705SXin Li'__builtin_ia32_cmpnltpd': '_mm_cmpnlt_pd', 103*67e74705SXin Li'__builtin_ia32_cmpnlepd': '_mm_cmpnle_pd', 104*67e74705SXin Li'__builtin_ia32_cmpngtpd': '_mm_cmpngt_pd', 105*67e74705SXin Li'__builtin_ia32_cmpngepd': '_mm_cmpnge_pd', 106*67e74705SXin Li'__builtin_ia32_cmpordpd': '_mm_cmpord_pd', 107*67e74705SXin Li'__builtin_ia32_cmpeqsd': '_mm_cmpeq_sd', 108*67e74705SXin Li'__builtin_ia32_cmpltsd': '_mm_cmplt_sd', 109*67e74705SXin Li'__builtin_ia32_cmplesd': '_mm_cmple_sd', 110*67e74705SXin Li'__builtin_ia32_cmpunordsd': '_mm_cmpunord_sd', 111*67e74705SXin Li'__builtin_ia32_cmpneqsd': '_mm_cmpneq_sd', 112*67e74705SXin Li'__builtin_ia32_cmpnltsd': '_mm_cmpnlt_sd', 113*67e74705SXin Li'__builtin_ia32_cmpnlesd': '_mm_cmpnle_sd', 114*67e74705SXin Li'__builtin_ia32_cmpordsd': '_mm_cmpord_sd', 115*67e74705SXin Li'__builtin_ia32_cvtsi642ss': '_mm_cvtsi64_ss', 116*67e74705SXin Li'__builtin_ia32_cvttss2si64': '_mm_cvtss_si64', 117*67e74705SXin Li'__builtin_ia32_shufps': '_mm_shuffle_ps', 118*67e74705SXin Li'__builtin_ia32_shufpd': '_mm_shuffle_pd', 119*67e74705SXin Li'__builtin_ia32_pshufhw': '_mm_shufflehi_epi16', 120*67e74705SXin Li'__builtin_ia32_pshuflw': '_mm_shufflelo_epi16', 121*67e74705SXin Li'__builtin_ia32_pshufd': '_mm_shuffle_epi32', 122*67e74705SXin Li'__builtin_ia32_movshdup': '_mm_movehdup_ps', 123*67e74705SXin Li'__builtin_ia32_movsldup': '_mm_moveldup_ps', 124*67e74705SXin Li'__builtin_ia32_maxps': '_mm_max_ps', 125*67e74705SXin Li'__builtin_ia32_pslldi128': '_mm_slli_epi32', 126*67e74705SXin Li'__builtin_ia32_vec_set_v16qi': '_mm_insert_epi8', 127*67e74705SXin Li'__builtin_ia32_vec_set_v8hi': '_mm_insert_epi16', 128*67e74705SXin Li'__builtin_ia32_vec_set_v4si': '_mm_insert_epi32', 129*67e74705SXin Li'__builtin_ia32_vec_set_v2di': '_mm_insert_epi64', 130*67e74705SXin Li'__builtin_ia32_vec_set_v4hi': '_mm_insert_pi16', 131*67e74705SXin Li'__builtin_ia32_vec_ext_v16qi': '_mm_extract_epi8', 132*67e74705SXin Li'__builtin_ia32_vec_ext_v8hi': '_mm_extract_epi16', 133*67e74705SXin Li'__builtin_ia32_vec_ext_v4si': '_mm_extract_epi32', 134*67e74705SXin Li'__builtin_ia32_vec_ext_v2di': '_mm_extract_epi64', 135*67e74705SXin Li'__builtin_ia32_vec_ext_v4hi': '_mm_extract_pi16', 136*67e74705SXin Li'__builtin_ia32_vec_ext_v4sf': '_mm_extract_ps' 137*67e74705SXin Li} 138*67e74705SXin Li 139*67e74705SXin Li# Special unhandled cases: 140*67e74705SXin Li# __builtin_ia32_vec_ext_*(__P, idx) -> _mm_store_sd/_mm_storeh_pd 141*67e74705SXin Li# depending on index. No abstract insert/extract for these oddly. 142*67e74705SXin Liunhandled = [ 143*67e74705SXin Li'__builtin_ia32_vec_ext_v2df', 144*67e74705SXin Li'__builtin_ia32_vec_ext_v2si', 145*67e74705SXin Li] 146*67e74705SXin Li 147*67e74705SXin Lidef report_repl(builtin, repl): 148*67e74705SXin Li sys.stderr.write("%s:%d: x86 builtin %s used, replaced with %s\n" % (fileinput.filename(), fileinput.filelineno(), builtin, repl)) 149*67e74705SXin Li 150*67e74705SXin Lidef report_cant(builtin): 151*67e74705SXin Li sys.stderr.write("%s:%d: x86 builtin %s used, too many replacements\n" % (fileinput.filename(), fileinput.filelineno(), builtin)) 152*67e74705SXin Li 153*67e74705SXin Lifor line in fileinput.input(inplace=1): 154*67e74705SXin Li for builtin, repl in repl_map.iteritems(): 155*67e74705SXin Li if builtin in line: 156*67e74705SXin Li line = line.replace(builtin, repl) 157*67e74705SXin Li report_repl(builtin, repl) 158*67e74705SXin Li for unh in unhandled: 159*67e74705SXin Li if unh in line: 160*67e74705SXin Li report_cant(unh) 161*67e74705SXin Li sys.stdout.write(line) 162*67e74705SXin Li 163*67e74705SXin Lisys.exit(err) 164