xref: /aosp_15_r20/external/cpu_features/src/impl_aarch64_windows.c (revision eca53ba6d2e951e174b64682eaf56a36b8204c89)
1*eca53ba6SRoland Levillain // Copyright 2023 Google LLC
2*eca53ba6SRoland Levillain //
3*eca53ba6SRoland Levillain // Licensed under the Apache License, Version 2.0 (the "License");
4*eca53ba6SRoland Levillain // you may not use this file except in compliance with the License.
5*eca53ba6SRoland Levillain // You may obtain a copy of the License at
6*eca53ba6SRoland Levillain //
7*eca53ba6SRoland Levillain //    http://www.apache.org/licenses/LICENSE-2.0
8*eca53ba6SRoland Levillain //
9*eca53ba6SRoland Levillain // Unless required by applicable law or agreed to in writing, software
10*eca53ba6SRoland Levillain // distributed under the License is distributed on an "AS IS" BASIS,
11*eca53ba6SRoland Levillain // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12*eca53ba6SRoland Levillain // See the License for the specific language governing permissions and
13*eca53ba6SRoland Levillain // limitations under the License.
14*eca53ba6SRoland Levillain 
15*eca53ba6SRoland Levillain #include "cpu_features_macros.h"
16*eca53ba6SRoland Levillain 
17*eca53ba6SRoland Levillain #ifdef CPU_FEATURES_ARCH_AARCH64
18*eca53ba6SRoland Levillain #ifdef CPU_FEATURES_OS_WINDOWS
19*eca53ba6SRoland Levillain 
20*eca53ba6SRoland Levillain #include "cpuinfo_aarch64.h"
21*eca53ba6SRoland Levillain 
22*eca53ba6SRoland Levillain ////////////////////////////////////////////////////////////////////////////////
23*eca53ba6SRoland Levillain // Definitions for introspection.
24*eca53ba6SRoland Levillain ////////////////////////////////////////////////////////////////////////////////
25*eca53ba6SRoland Levillain #define INTROSPECTION_TABLE                  \
26*eca53ba6SRoland Levillain   LINE(AARCH64_FP, fp, , , )                 \
27*eca53ba6SRoland Levillain   LINE(AARCH64_ASIMD, asimd, , , )           \
28*eca53ba6SRoland Levillain   LINE(AARCH64_EVTSTRM, evtstrm, , , )       \
29*eca53ba6SRoland Levillain   LINE(AARCH64_AES, aes, , , )               \
30*eca53ba6SRoland Levillain   LINE(AARCH64_PMULL, pmull, , , )           \
31*eca53ba6SRoland Levillain   LINE(AARCH64_SHA1, sha1, , , )             \
32*eca53ba6SRoland Levillain   LINE(AARCH64_SHA2, sha2, , , )             \
33*eca53ba6SRoland Levillain   LINE(AARCH64_CRC32, crc32, , , )           \
34*eca53ba6SRoland Levillain   LINE(AARCH64_ATOMICS, atomics, , , )       \
35*eca53ba6SRoland Levillain   LINE(AARCH64_FPHP, fphp, , , )             \
36*eca53ba6SRoland Levillain   LINE(AARCH64_ASIMDHP, asimdhp, , , )       \
37*eca53ba6SRoland Levillain   LINE(AARCH64_CPUID, cpuid, , , )           \
38*eca53ba6SRoland Levillain   LINE(AARCH64_ASIMDRDM, asimdrdm, , , )     \
39*eca53ba6SRoland Levillain   LINE(AARCH64_JSCVT, jscvt, , , )           \
40*eca53ba6SRoland Levillain   LINE(AARCH64_FCMA, fcma, , , )             \
41*eca53ba6SRoland Levillain   LINE(AARCH64_LRCPC, lrcpc, , , )           \
42*eca53ba6SRoland Levillain   LINE(AARCH64_DCPOP, dcpop, , , )           \
43*eca53ba6SRoland Levillain   LINE(AARCH64_SHA3, sha3, , , )             \
44*eca53ba6SRoland Levillain   LINE(AARCH64_SM3, sm3, , , )               \
45*eca53ba6SRoland Levillain   LINE(AARCH64_SM4, sm4, , , )               \
46*eca53ba6SRoland Levillain   LINE(AARCH64_ASIMDDP, asimddp, , , )       \
47*eca53ba6SRoland Levillain   LINE(AARCH64_SHA512, sha512, , , )         \
48*eca53ba6SRoland Levillain   LINE(AARCH64_SVE, sve, , , )               \
49*eca53ba6SRoland Levillain   LINE(AARCH64_ASIMDFHM, asimdfhm, , , )     \
50*eca53ba6SRoland Levillain   LINE(AARCH64_DIT, dit, , , )               \
51*eca53ba6SRoland Levillain   LINE(AARCH64_USCAT, uscat, , , )           \
52*eca53ba6SRoland Levillain   LINE(AARCH64_ILRCPC, ilrcpc, , , )         \
53*eca53ba6SRoland Levillain   LINE(AARCH64_FLAGM, flagm, , , )           \
54*eca53ba6SRoland Levillain   LINE(AARCH64_SSBS, ssbs, , , )             \
55*eca53ba6SRoland Levillain   LINE(AARCH64_SB, sb, , , )                 \
56*eca53ba6SRoland Levillain   LINE(AARCH64_PACA, paca, , , )             \
57*eca53ba6SRoland Levillain   LINE(AARCH64_PACG, pacg, , , )             \
58*eca53ba6SRoland Levillain   LINE(AARCH64_DCPODP, dcpodp, , , )         \
59*eca53ba6SRoland Levillain   LINE(AARCH64_SVE2, sve2, , , )             \
60*eca53ba6SRoland Levillain   LINE(AARCH64_SVEAES, sveaes, , , )         \
61*eca53ba6SRoland Levillain   LINE(AARCH64_SVEPMULL, svepmull, , , )     \
62*eca53ba6SRoland Levillain   LINE(AARCH64_SVEBITPERM, svebitperm, , , ) \
63*eca53ba6SRoland Levillain   LINE(AARCH64_SVESHA3, svesha3, , , )       \
64*eca53ba6SRoland Levillain   LINE(AARCH64_SVESM4, svesm4, , , )         \
65*eca53ba6SRoland Levillain   LINE(AARCH64_FLAGM2, flagm2, , , )         \
66*eca53ba6SRoland Levillain   LINE(AARCH64_FRINT, frint, , , )           \
67*eca53ba6SRoland Levillain   LINE(AARCH64_SVEI8MM, svei8mm, , , )       \
68*eca53ba6SRoland Levillain   LINE(AARCH64_SVEF32MM, svef32mm, , , )     \
69*eca53ba6SRoland Levillain   LINE(AARCH64_SVEF64MM, svef64mm, , , )     \
70*eca53ba6SRoland Levillain   LINE(AARCH64_SVEBF16, svebf16, , , )       \
71*eca53ba6SRoland Levillain   LINE(AARCH64_I8MM, i8mm, , , )             \
72*eca53ba6SRoland Levillain   LINE(AARCH64_BF16, bf16, , , )             \
73*eca53ba6SRoland Levillain   LINE(AARCH64_DGH, dgh, , , )               \
74*eca53ba6SRoland Levillain   LINE(AARCH64_RNG, rng, , , )               \
75*eca53ba6SRoland Levillain   LINE(AARCH64_BTI, bti, , , )               \
76*eca53ba6SRoland Levillain   LINE(AARCH64_MTE, mte, , , )               \
77*eca53ba6SRoland Levillain   LINE(AARCH64_ECV, ecv, , , )               \
78*eca53ba6SRoland Levillain   LINE(AARCH64_AFP, afp, , , )               \
79*eca53ba6SRoland Levillain   LINE(AARCH64_RPRES, rpres, , , )
80*eca53ba6SRoland Levillain #define INTROSPECTION_PREFIX Aarch64
81*eca53ba6SRoland Levillain #define INTROSPECTION_ENUM_PREFIX AARCH64
82*eca53ba6SRoland Levillain #include "define_introspection.inl"
83*eca53ba6SRoland Levillain 
84*eca53ba6SRoland Levillain ////////////////////////////////////////////////////////////////////////////////
85*eca53ba6SRoland Levillain // Implementation.
86*eca53ba6SRoland Levillain ////////////////////////////////////////////////////////////////////////////////
87*eca53ba6SRoland Levillain 
88*eca53ba6SRoland Levillain #include <stdbool.h>
89*eca53ba6SRoland Levillain 
90*eca53ba6SRoland Levillain #include "internal/windows_utils.h"
91*eca53ba6SRoland Levillain 
92*eca53ba6SRoland Levillain #ifdef CPU_FEATURES_MOCK_CPUID_AARCH64
93*eca53ba6SRoland Levillain extern bool GetWindowsIsProcessorFeaturePresent(DWORD);
94*eca53ba6SRoland Levillain extern WORD GetWindowsNativeSystemInfoProcessorRevision();
95*eca53ba6SRoland Levillain #else  // CPU_FEATURES_MOCK_CPUID_AARCH64
GetWindowsIsProcessorFeaturePresent(DWORD dwProcessorFeature)96*eca53ba6SRoland Levillain static bool GetWindowsIsProcessorFeaturePresent(DWORD dwProcessorFeature) {
97*eca53ba6SRoland Levillain   return IsProcessorFeaturePresent(dwProcessorFeature);
98*eca53ba6SRoland Levillain }
99*eca53ba6SRoland Levillain 
GetWindowsNativeSystemInfoProcessorRevision()100*eca53ba6SRoland Levillain static WORD GetWindowsNativeSystemInfoProcessorRevision() {
101*eca53ba6SRoland Levillain   SYSTEM_INFO system_info;
102*eca53ba6SRoland Levillain   GetNativeSystemInfo(&system_info);
103*eca53ba6SRoland Levillain   return system_info.wProcessorRevision;
104*eca53ba6SRoland Levillain }
105*eca53ba6SRoland Levillain #endif
106*eca53ba6SRoland Levillain 
107*eca53ba6SRoland Levillain static const Aarch64Info kEmptyAarch64Info;
108*eca53ba6SRoland Levillain 
GetAarch64Info(void)109*eca53ba6SRoland Levillain Aarch64Info GetAarch64Info(void) {
110*eca53ba6SRoland Levillain   Aarch64Info info = kEmptyAarch64Info;
111*eca53ba6SRoland Levillain   info.revision = GetWindowsNativeSystemInfoProcessorRevision();
112*eca53ba6SRoland Levillain   info.features.fp =
113*eca53ba6SRoland Levillain       GetWindowsIsProcessorFeaturePresent(PF_ARM_VFP_32_REGISTERS_AVAILABLE);
114*eca53ba6SRoland Levillain   info.features.asimd =
115*eca53ba6SRoland Levillain       GetWindowsIsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE);
116*eca53ba6SRoland Levillain   info.features.crc32 = GetWindowsIsProcessorFeaturePresent(
117*eca53ba6SRoland Levillain       PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE);
118*eca53ba6SRoland Levillain   info.features.asimddp =
119*eca53ba6SRoland Levillain       GetWindowsIsProcessorFeaturePresent(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE);
120*eca53ba6SRoland Levillain   info.features.jscvt = GetWindowsIsProcessorFeaturePresent(
121*eca53ba6SRoland Levillain       PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE);
122*eca53ba6SRoland Levillain   info.features.lrcpc = GetWindowsIsProcessorFeaturePresent(
123*eca53ba6SRoland Levillain       PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE);
124*eca53ba6SRoland Levillain   info.features.atomics = GetWindowsIsProcessorFeaturePresent(
125*eca53ba6SRoland Levillain       PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE);
126*eca53ba6SRoland Levillain 
127*eca53ba6SRoland Levillain 
128*eca53ba6SRoland Levillain   bool is_crypto_available = GetWindowsIsProcessorFeaturePresent(
129*eca53ba6SRoland Levillain       PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE);
130*eca53ba6SRoland Levillain   info.features.aes = is_crypto_available;
131*eca53ba6SRoland Levillain   info.features.sha1 = is_crypto_available;
132*eca53ba6SRoland Levillain   info.features.sha2 = is_crypto_available;
133*eca53ba6SRoland Levillain   info.features.pmull = is_crypto_available;
134*eca53ba6SRoland Levillain   return info;
135*eca53ba6SRoland Levillain }
136*eca53ba6SRoland Levillain 
137*eca53ba6SRoland Levillain #endif  // CPU_FEATURES_OS_WINDOWS
138*eca53ba6SRoland Levillain #endif  // CPU_FEATURES_ARCH_AARCH64
139