xref: /aosp_15_r20/external/cpuinfo/test/mock/scaleway.h (revision 2b54f0db79fd8303838913b20ff3780cddaa909f)
1*2b54f0dbSXin Li struct cpuinfo_mock_file filesystem[] = {
2*2b54f0dbSXin Li 	{
3*2b54f0dbSXin Li 		.path = "/proc/cpuinfo",
4*2b54f0dbSXin Li 		.size = 1140,
5*2b54f0dbSXin Li 		.content =
6*2b54f0dbSXin Li 			"processor\t: 0\n"
7*2b54f0dbSXin Li 			"BogoMIPS\t: 200.00\n"
8*2b54f0dbSXin Li 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
9*2b54f0dbSXin Li 			"CPU implementer\t: 0x43\n"
10*2b54f0dbSXin Li 			"CPU architecture: 8\n"
11*2b54f0dbSXin Li 			"CPU variant\t: 0x1\n"
12*2b54f0dbSXin Li 			"CPU part\t: 0x0a1\n"
13*2b54f0dbSXin Li 			"CPU revision\t: 1\n"
14*2b54f0dbSXin Li 			"\n"
15*2b54f0dbSXin Li 			"processor\t: 1\n"
16*2b54f0dbSXin Li 			"BogoMIPS\t: 200.00\n"
17*2b54f0dbSXin Li 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
18*2b54f0dbSXin Li 			"CPU implementer\t: 0x43\n"
19*2b54f0dbSXin Li 			"CPU architecture: 8\n"
20*2b54f0dbSXin Li 			"CPU variant\t: 0x1\n"
21*2b54f0dbSXin Li 			"CPU part\t: 0x0a1\n"
22*2b54f0dbSXin Li 			"CPU revision\t: 1\n"
23*2b54f0dbSXin Li 			"\n"
24*2b54f0dbSXin Li 			"processor\t: 2\n"
25*2b54f0dbSXin Li 			"BogoMIPS\t: 200.00\n"
26*2b54f0dbSXin Li 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
27*2b54f0dbSXin Li 			"CPU implementer\t: 0x43\n"
28*2b54f0dbSXin Li 			"CPU architecture: 8\n"
29*2b54f0dbSXin Li 			"CPU variant\t: 0x1\n"
30*2b54f0dbSXin Li 			"CPU part\t: 0x0a1\n"
31*2b54f0dbSXin Li 			"CPU revision\t: 1\n"
32*2b54f0dbSXin Li 			"\n"
33*2b54f0dbSXin Li 			"processor\t: 3\n"
34*2b54f0dbSXin Li 			"BogoMIPS\t: 200.00\n"
35*2b54f0dbSXin Li 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
36*2b54f0dbSXin Li 			"CPU implementer\t: 0x43\n"
37*2b54f0dbSXin Li 			"CPU architecture: 8\n"
38*2b54f0dbSXin Li 			"CPU variant\t: 0x1\n"
39*2b54f0dbSXin Li 			"CPU part\t: 0x0a1\n"
40*2b54f0dbSXin Li 			"CPU revision\t: 1\n"
41*2b54f0dbSXin Li 			"\n"
42*2b54f0dbSXin Li 			"processor\t: 4\n"
43*2b54f0dbSXin Li 			"BogoMIPS\t: 200.00\n"
44*2b54f0dbSXin Li 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
45*2b54f0dbSXin Li 			"CPU implementer\t: 0x43\n"
46*2b54f0dbSXin Li 			"CPU architecture: 8\n"
47*2b54f0dbSXin Li 			"CPU variant\t: 0x1\n"
48*2b54f0dbSXin Li 			"CPU part\t: 0x0a1\n"
49*2b54f0dbSXin Li 			"CPU revision\t: 1\n"
50*2b54f0dbSXin Li 			"\n"
51*2b54f0dbSXin Li 			"processor\t: 5\n"
52*2b54f0dbSXin Li 			"BogoMIPS\t: 200.00\n"
53*2b54f0dbSXin Li 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
54*2b54f0dbSXin Li 			"CPU implementer\t: 0x43\n"
55*2b54f0dbSXin Li 			"CPU architecture: 8\n"
56*2b54f0dbSXin Li 			"CPU variant\t: 0x1\n"
57*2b54f0dbSXin Li 			"CPU part\t: 0x0a1\n"
58*2b54f0dbSXin Li 			"CPU revision\t: 1\n"
59*2b54f0dbSXin Li 			"\n",
60*2b54f0dbSXin Li 	},
61*2b54f0dbSXin Li 	{
62*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/kernel_max",
63*2b54f0dbSXin Li 		.size = 4,
64*2b54f0dbSXin Li 		.content = "127\n",
65*2b54f0dbSXin Li 	},
66*2b54f0dbSXin Li 	{
67*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/possible",
68*2b54f0dbSXin Li 		.size = 4,
69*2b54f0dbSXin Li 		.content = "0-5\n",
70*2b54f0dbSXin Li 	},
71*2b54f0dbSXin Li 	{
72*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/present",
73*2b54f0dbSXin Li 		.size = 4,
74*2b54f0dbSXin Li 		.content = "0-5\n",
75*2b54f0dbSXin Li 	},
76*2b54f0dbSXin Li 	{
77*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu0/topology/physical_package_id",
78*2b54f0dbSXin Li 		.size = 2,
79*2b54f0dbSXin Li 		.content = "0\n",
80*2b54f0dbSXin Li 	},
81*2b54f0dbSXin Li 	{
82*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu0/topology/core_siblings_list",
83*2b54f0dbSXin Li 		.size = 4,
84*2b54f0dbSXin Li 		.content = "0-5\n",
85*2b54f0dbSXin Li 	},
86*2b54f0dbSXin Li 	{
87*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu0/topology/core_id",
88*2b54f0dbSXin Li 		.size = 2,
89*2b54f0dbSXin Li 		.content = "0\n",
90*2b54f0dbSXin Li 	},
91*2b54f0dbSXin Li 	{
92*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu0/topology/thread_siblings_list",
93*2b54f0dbSXin Li 		.size = 2,
94*2b54f0dbSXin Li 		.content = "0\n",
95*2b54f0dbSXin Li 	},
96*2b54f0dbSXin Li 	{
97*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu1/topology/physical_package_id",
98*2b54f0dbSXin Li 		.size = 2,
99*2b54f0dbSXin Li 		.content = "0\n",
100*2b54f0dbSXin Li 	},
101*2b54f0dbSXin Li 	{
102*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu1/topology/core_siblings_list",
103*2b54f0dbSXin Li 		.size = 4,
104*2b54f0dbSXin Li 		.content = "0-5\n",
105*2b54f0dbSXin Li 	},
106*2b54f0dbSXin Li 	{
107*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu1/topology/core_id",
108*2b54f0dbSXin Li 		.size = 2,
109*2b54f0dbSXin Li 		.content = "1\n",
110*2b54f0dbSXin Li 	},
111*2b54f0dbSXin Li 	{
112*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu1/topology/thread_siblings_list",
113*2b54f0dbSXin Li 		.size = 2,
114*2b54f0dbSXin Li 		.content = "1\n",
115*2b54f0dbSXin Li 	},
116*2b54f0dbSXin Li 	{
117*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu2/topology/physical_package_id",
118*2b54f0dbSXin Li 		.size = 2,
119*2b54f0dbSXin Li 		.content = "0\n",
120*2b54f0dbSXin Li 	},
121*2b54f0dbSXin Li 	{
122*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu2/topology/core_siblings_list",
123*2b54f0dbSXin Li 		.size = 4,
124*2b54f0dbSXin Li 		.content = "0-5\n",
125*2b54f0dbSXin Li 	},
126*2b54f0dbSXin Li 	{
127*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu2/topology/core_id",
128*2b54f0dbSXin Li 		.size = 2,
129*2b54f0dbSXin Li 		.content = "2\n",
130*2b54f0dbSXin Li 	},
131*2b54f0dbSXin Li 	{
132*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu2/topology/thread_siblings_list",
133*2b54f0dbSXin Li 		.size = 2,
134*2b54f0dbSXin Li 		.content = "2\n",
135*2b54f0dbSXin Li 	},
136*2b54f0dbSXin Li 	{
137*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu3/topology/physical_package_id",
138*2b54f0dbSXin Li 		.size = 2,
139*2b54f0dbSXin Li 		.content = "0\n",
140*2b54f0dbSXin Li 	},
141*2b54f0dbSXin Li 	{
142*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu3/topology/core_siblings_list",
143*2b54f0dbSXin Li 		.size = 4,
144*2b54f0dbSXin Li 		.content = "0-5\n",
145*2b54f0dbSXin Li 	},
146*2b54f0dbSXin Li 	{
147*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu3/topology/core_id",
148*2b54f0dbSXin Li 		.size = 2,
149*2b54f0dbSXin Li 		.content = "3\n",
150*2b54f0dbSXin Li 	},
151*2b54f0dbSXin Li 	{
152*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu3/topology/thread_siblings_list",
153*2b54f0dbSXin Li 		.size = 2,
154*2b54f0dbSXin Li 		.content = "3\n",
155*2b54f0dbSXin Li 	},
156*2b54f0dbSXin Li 	{
157*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu4/topology/physical_package_id",
158*2b54f0dbSXin Li 		.size = 2,
159*2b54f0dbSXin Li 		.content = "0\n",
160*2b54f0dbSXin Li 	},
161*2b54f0dbSXin Li 	{
162*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu4/topology/core_siblings_list",
163*2b54f0dbSXin Li 		.size = 4,
164*2b54f0dbSXin Li 		.content = "0-5\n",
165*2b54f0dbSXin Li 	},
166*2b54f0dbSXin Li 	{
167*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu4/topology/core_id",
168*2b54f0dbSXin Li 		.size = 2,
169*2b54f0dbSXin Li 		.content = "4\n",
170*2b54f0dbSXin Li 	},
171*2b54f0dbSXin Li 	{
172*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu4/topology/thread_siblings_list",
173*2b54f0dbSXin Li 		.size = 2,
174*2b54f0dbSXin Li 		.content = "4\n",
175*2b54f0dbSXin Li 	},
176*2b54f0dbSXin Li 	{
177*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu5/topology/physical_package_id",
178*2b54f0dbSXin Li 		.size = 2,
179*2b54f0dbSXin Li 		.content = "0\n",
180*2b54f0dbSXin Li 	},
181*2b54f0dbSXin Li 	{
182*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu5/topology/core_siblings_list",
183*2b54f0dbSXin Li 		.size = 4,
184*2b54f0dbSXin Li 		.content = "0-5\n",
185*2b54f0dbSXin Li 	},
186*2b54f0dbSXin Li 	{
187*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu5/topology/core_id",
188*2b54f0dbSXin Li 		.size = 2,
189*2b54f0dbSXin Li 		.content = "5\n",
190*2b54f0dbSXin Li 	},
191*2b54f0dbSXin Li 	{
192*2b54f0dbSXin Li 		.path = "/sys/devices/system/cpu/cpu5/topology/thread_siblings_list",
193*2b54f0dbSXin Li 		.size = 2,
194*2b54f0dbSXin Li 		.content = "5\n",
195*2b54f0dbSXin Li 	},
196*2b54f0dbSXin Li 	{ NULL },
197*2b54f0dbSXin Li };
198