1*1b481fc3SMaciej Żenczykowski /****************************************************************************
2*1b481fc3SMaciej Żenczykowski * Support for the Altera Triple Speed Ethernet 10/100/1000 Controller
3*1b481fc3SMaciej Żenczykowski *
4*1b481fc3SMaciej Żenczykowski * Copyright (C) 2014 Altera Corporation
5*1b481fc3SMaciej Żenczykowski *
6*1b481fc3SMaciej Żenczykowski * Author: Vince Bridgers <[email protected]>
7*1b481fc3SMaciej Żenczykowski *
8*1b481fc3SMaciej Żenczykowski * This program is free software; you can redistribute it and/or modify it
9*1b481fc3SMaciej Żenczykowski * under the terms of the GNU General Public License version 2 as published
10*1b481fc3SMaciej Żenczykowski * by the Free Software Foundation, incorporated herein by reference.
11*1b481fc3SMaciej Żenczykowski */
12*1b481fc3SMaciej Żenczykowski
13*1b481fc3SMaciej Żenczykowski #include <stdio.h>
14*1b481fc3SMaciej Żenczykowski #include <string.h>
15*1b481fc3SMaciej Żenczykowski #include "internal.h"
16*1b481fc3SMaciej Żenczykowski
17*1b481fc3SMaciej Żenczykowski #define ALTERA_VERSION_MASK 0xffff
18*1b481fc3SMaciej Żenczykowski #define ALTERA_ETHTOOL_V1 1
19*1b481fc3SMaciej Żenczykowski
20*1b481fc3SMaciej Żenczykowski int
bitset(u32 val,int bit)21*1b481fc3SMaciej Żenczykowski bitset(u32 val, int bit)
22*1b481fc3SMaciej Żenczykowski {
23*1b481fc3SMaciej Żenczykowski if (val & (1 << bit))
24*1b481fc3SMaciej Żenczykowski return 1;
25*1b481fc3SMaciej Żenczykowski return 0;
26*1b481fc3SMaciej Żenczykowski }
27*1b481fc3SMaciej Żenczykowski
altera_tse_dump_regs(struct ethtool_drvinfo * info __maybe_unused,struct ethtool_regs * regs)28*1b481fc3SMaciej Żenczykowski int altera_tse_dump_regs(struct ethtool_drvinfo *info __maybe_unused,
29*1b481fc3SMaciej Żenczykowski struct ethtool_regs *regs)
30*1b481fc3SMaciej Żenczykowski {
31*1b481fc3SMaciej Żenczykowski int i;
32*1b481fc3SMaciej Żenczykowski u32 *tsereg = (unsigned int *)regs->data;
33*1b481fc3SMaciej Żenczykowski u32 version = regs->version;
34*1b481fc3SMaciej Żenczykowski
35*1b481fc3SMaciej Żenczykowski if ((version & ALTERA_VERSION_MASK) > ALTERA_ETHTOOL_V1)
36*1b481fc3SMaciej Żenczykowski return -1;
37*1b481fc3SMaciej Żenczykowski
38*1b481fc3SMaciej Żenczykowski /*
39*1b481fc3SMaciej Żenczykowski * Version 1: Initial TSE driver release. No feature information
40*1b481fc3SMaciej Żenczykowski * available, 32-bits of version is equal to 1.
41*1b481fc3SMaciej Żenczykowski *
42*1b481fc3SMaciej Żenczykowski * Version 2: Lower 16-bits of version is 2, upper 16 bits are:
43*1b481fc3SMaciej Żenczykowski * Bit 16 - SGMDA or MSGDMA Registers
44*1b481fc3SMaciej Żenczykowski * Bit 17 - PCS Present
45*1b481fc3SMaciej Żenczykowski * Bit 18 - Supplementary MAC Address Filter Registers Present
46*1b481fc3SMaciej Żenczykowski * Bit 19 - Multicast Hash Filter Present
47*1b481fc3SMaciej Żenczykowski * Bit 20 - IEEE 1588 Feature Present
48*1b481fc3SMaciej Żenczykowski */
49*1b481fc3SMaciej Żenczykowski fprintf(stdout, "Altera TSE 10/100/1000 Registers, Version %d\n",
50*1b481fc3SMaciej Żenczykowski version);
51*1b481fc3SMaciej Żenczykowski fprintf(stdout, "---------------------------------------------\n");
52*1b481fc3SMaciej Żenczykowski fprintf(stdout, "Revision 0x%08X\n", tsereg[0]);
53*1b481fc3SMaciej Żenczykowski fprintf(stdout, " Core Version %d.%d\n",
54*1b481fc3SMaciej Żenczykowski (tsereg[0] & 0xffff) >> 8,
55*1b481fc3SMaciej Żenczykowski tsereg[0] & 0xff);
56*1b481fc3SMaciej Żenczykowski fprintf(stdout, " CustVersion 0x%08X\n", tsereg[0] >> 16);
57*1b481fc3SMaciej Żenczykowski fprintf(stdout, "Scratch 0x%08X\n", tsereg[1]);
58*1b481fc3SMaciej Żenczykowski fprintf(stdout, "Command/Config 0x%08X\n", tsereg[2]);
59*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (0)TX_EN %d\n", bitset(tsereg[2], 0));
60*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (1)RX_EN %d\n", bitset(tsereg[2], 1));
61*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (2)XON_GEN %d\n", bitset(tsereg[2], 2));
62*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (3)ETH_SPEED %d\n", bitset(tsereg[2], 3));
63*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (4)PROMIS_EN %d\n", bitset(tsereg[2], 4));
64*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (5)PAD_EN %d\n", bitset(tsereg[2], 5));
65*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (6)CRC_FWD %d\n", bitset(tsereg[2], 6));
66*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (7)PAUSE_FWD %d\n", bitset(tsereg[2], 7));
67*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (8)PAUSE_IGN %d\n", bitset(tsereg[2], 8));
68*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (9)TXADDR_INS %d\n", bitset(tsereg[2], 9));
69*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (10)HD_EN %d\n", bitset(tsereg[2], 10));
70*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (11)EXCESS_COL %d\n", bitset(tsereg[2], 11));
71*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (12)LATE_COL %d\n", bitset(tsereg[2], 12));
72*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (13)SW_RESET %d\n", bitset(tsereg[2], 13));
73*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (14)MHASH_SEL %d\n", bitset(tsereg[2], 14));
74*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (15)LOOP_EN %d\n", bitset(tsereg[2], 15));
75*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (16-18)TX_ADDR_SEL %d\n",
76*1b481fc3SMaciej Żenczykowski (tsereg[2] & 0x30000) >> 16);
77*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (19)MAGIC_EN %d\n", bitset(tsereg[2], 19));
78*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (20)SLEEP %d\n", bitset(tsereg[2], 20));
79*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (21)WAKEUP %d\n", bitset(tsereg[2], 21));
80*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (22)XOFF_GEN %d\n", bitset(tsereg[2], 22));
81*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (23)CTRL_FRAME_EN %d\n", bitset(tsereg[2], 23));
82*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (24)NO_LEN_CHECK %d\n", bitset(tsereg[2], 24));
83*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (25)ENA_10 %d\n", bitset(tsereg[2], 25));
84*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (26)RX_ERR_DISC %d\n", bitset(tsereg[2], 26));
85*1b481fc3SMaciej Żenczykowski fprintf(stdout, " (31)CTRL_RESET %d\n", bitset(tsereg[2], 31));
86*1b481fc3SMaciej Żenczykowski fprintf(stdout, "mac_0 0x%08X\n", tsereg[3]);
87*1b481fc3SMaciej Żenczykowski fprintf(stdout, "mac_1 0x%08X\n", tsereg[4]);
88*1b481fc3SMaciej Żenczykowski fprintf(stdout, "frm_length 0x%08X\n", tsereg[5]);
89*1b481fc3SMaciej Żenczykowski fprintf(stdout, "pause_quant 0x%08X\n", tsereg[6]);
90*1b481fc3SMaciej Żenczykowski fprintf(stdout, "rx_section_empty 0x%08X\n", tsereg[7]);
91*1b481fc3SMaciej Żenczykowski fprintf(stdout, "rx_section_full 0x%08X\n", tsereg[8]);
92*1b481fc3SMaciej Żenczykowski fprintf(stdout, "tx_section_empty 0x%08X\n", tsereg[9]);
93*1b481fc3SMaciej Żenczykowski fprintf(stdout, "tx_section_full 0x%08X\n", tsereg[0xa]);
94*1b481fc3SMaciej Żenczykowski fprintf(stdout, "rx_almost_empty 0x%08X\n", tsereg[0xb]);
95*1b481fc3SMaciej Żenczykowski fprintf(stdout, "rx_almost_full 0x%08X\n", tsereg[0xc]);
96*1b481fc3SMaciej Żenczykowski fprintf(stdout, "tx_almost_empty 0x%08X\n", tsereg[0xd]);
97*1b481fc3SMaciej Żenczykowski fprintf(stdout, "tx_almost_full 0x%08X\n", tsereg[0xe]);
98*1b481fc3SMaciej Żenczykowski fprintf(stdout, "mdio_addr0 0x%08X\n", tsereg[0xf]);
99*1b481fc3SMaciej Żenczykowski fprintf(stdout, "mdio_addr1 0x%08X\n", tsereg[0x10]);
100*1b481fc3SMaciej Żenczykowski fprintf(stdout, "holdoff_quant 0x%08X\n", tsereg[0x11]);
101*1b481fc3SMaciej Żenczykowski
102*1b481fc3SMaciej Żenczykowski fprintf(stdout, "tx_ipg_length 0x%08X\n", tsereg[0x17]);
103*1b481fc3SMaciej Żenczykowski fprintf(stdout, "Transmit Command 0x%08X\n", tsereg[0x3a]);
104*1b481fc3SMaciej Żenczykowski fprintf(stdout, "Receive Command 0x%08X\n", tsereg[0x3b]);
105*1b481fc3SMaciej Żenczykowski
106*1b481fc3SMaciej Żenczykowski for (i = 0; i < 64; i++)
107*1b481fc3SMaciej Żenczykowski fprintf(stdout, "Multicast Hash[%02d] 0x%08X\n",
108*1b481fc3SMaciej Żenczykowski i,
109*1b481fc3SMaciej Żenczykowski tsereg[0x40 + i]);
110*1b481fc3SMaciej Żenczykowski return 0;
111*1b481fc3SMaciej Żenczykowski }
112*1b481fc3SMaciej Żenczykowski
113