1*c83a76b0SSuyog Pawar /****************************************************************************** 2*c83a76b0SSuyog Pawar * 3*c83a76b0SSuyog Pawar * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore 4*c83a76b0SSuyog Pawar * 5*c83a76b0SSuyog Pawar * Licensed under the Apache License, Version 2.0 (the "License"); 6*c83a76b0SSuyog Pawar * you may not use this file except in compliance with the License. 7*c83a76b0SSuyog Pawar * You may obtain a copy of the License at: 8*c83a76b0SSuyog Pawar * 9*c83a76b0SSuyog Pawar * http://www.apache.org/licenses/LICENSE-2.0 10*c83a76b0SSuyog Pawar * 11*c83a76b0SSuyog Pawar * Unless required by applicable law or agreed to in writing, software 12*c83a76b0SSuyog Pawar * distributed under the License is distributed on an "AS IS" BASIS, 13*c83a76b0SSuyog Pawar * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14*c83a76b0SSuyog Pawar * See the License for the specific language governing permissions and 15*c83a76b0SSuyog Pawar * limitations under the License. 16*c83a76b0SSuyog Pawar * 17*c83a76b0SSuyog Pawar ******************************************************************************/ 18*c83a76b0SSuyog Pawar /** 19*c83a76b0SSuyog Pawar ******************************************************************************* 20*c83a76b0SSuyog Pawar * @file 21*c83a76b0SSuyog Pawar * ihevcd_defs.h 22*c83a76b0SSuyog Pawar * 23*c83a76b0SSuyog Pawar * @brief 24*c83a76b0SSuyog Pawar * Definitions used in the decoder 25*c83a76b0SSuyog Pawar * 26*c83a76b0SSuyog Pawar * @author 27*c83a76b0SSuyog Pawar * Harish 28*c83a76b0SSuyog Pawar * 29*c83a76b0SSuyog Pawar * @par List of Functions: 30*c83a76b0SSuyog Pawar * 31*c83a76b0SSuyog Pawar * @remarks 32*c83a76b0SSuyog Pawar * None 33*c83a76b0SSuyog Pawar * 34*c83a76b0SSuyog Pawar ******************************************************************************* 35*c83a76b0SSuyog Pawar */ 36*c83a76b0SSuyog Pawar 37*c83a76b0SSuyog Pawar #ifndef _IHEVCD_DEFS_H_ 38*c83a76b0SSuyog Pawar #define _IHEVCD_DEFS_H_ 39*c83a76b0SSuyog Pawar 40*c83a76b0SSuyog Pawar 41*c83a76b0SSuyog Pawar /*****************************************************************************/ 42*c83a76b0SSuyog Pawar /* Width and height restrictions */ 43*c83a76b0SSuyog Pawar /*****************************************************************************/ 44*c83a76b0SSuyog Pawar /** 45*c83a76b0SSuyog Pawar * Minimum width supported by codec 46*c83a76b0SSuyog Pawar */ 47*c83a76b0SSuyog Pawar #define MIN_WD 64 48*c83a76b0SSuyog Pawar 49*c83a76b0SSuyog Pawar /** 50*c83a76b0SSuyog Pawar * Maximum width supported by codec 51*c83a76b0SSuyog Pawar */ 52*c83a76b0SSuyog Pawar 53*c83a76b0SSuyog Pawar #define MAX_WD 8448 54*c83a76b0SSuyog Pawar 55*c83a76b0SSuyog Pawar /** 56*c83a76b0SSuyog Pawar * Minimum height supported by codec 57*c83a76b0SSuyog Pawar */ 58*c83a76b0SSuyog Pawar #define MIN_HT 64 59*c83a76b0SSuyog Pawar 60*c83a76b0SSuyog Pawar /** 61*c83a76b0SSuyog Pawar * Maximum height supported by codec 62*c83a76b0SSuyog Pawar */ 63*c83a76b0SSuyog Pawar 64*c83a76b0SSuyog Pawar #define MAX_HT 4320 65*c83a76b0SSuyog Pawar 66*c83a76b0SSuyog Pawar /*****************************************************************************/ 67*c83a76b0SSuyog Pawar /* Padding sizes */ 68*c83a76b0SSuyog Pawar /*****************************************************************************/ 69*c83a76b0SSuyog Pawar /** 70*c83a76b0SSuyog Pawar * Padding used for top of the frame 71*c83a76b0SSuyog Pawar */ 72*c83a76b0SSuyog Pawar #define PAD_TOP 80 73*c83a76b0SSuyog Pawar 74*c83a76b0SSuyog Pawar /** 75*c83a76b0SSuyog Pawar * Padding used for bottom of the frame 76*c83a76b0SSuyog Pawar */ 77*c83a76b0SSuyog Pawar #define PAD_BOT 80 78*c83a76b0SSuyog Pawar 79*c83a76b0SSuyog Pawar /** 80*c83a76b0SSuyog Pawar * Padding used at left of the frame 81*c83a76b0SSuyog Pawar */ 82*c83a76b0SSuyog Pawar #define PAD_LEFT 80 83*c83a76b0SSuyog Pawar 84*c83a76b0SSuyog Pawar /** 85*c83a76b0SSuyog Pawar * Padding used at right of the frame 86*c83a76b0SSuyog Pawar */ 87*c83a76b0SSuyog Pawar #define PAD_RIGHT 80 88*c83a76b0SSuyog Pawar /** 89*c83a76b0SSuyog Pawar * Padding for width 90*c83a76b0SSuyog Pawar */ 91*c83a76b0SSuyog Pawar #define PAD_WD (PAD_LEFT + PAD_RIGHT) 92*c83a76b0SSuyog Pawar /** 93*c83a76b0SSuyog Pawar * Padding for height 94*c83a76b0SSuyog Pawar */ 95*c83a76b0SSuyog Pawar #define PAD_HT (PAD_TOP + PAD_BOT) 96*c83a76b0SSuyog Pawar 97*c83a76b0SSuyog Pawar /*****************************************************************************/ 98*c83a76b0SSuyog Pawar /* Number of frame restrictions */ 99*c83a76b0SSuyog Pawar /*****************************************************************************/ 100*c83a76b0SSuyog Pawar /** 101*c83a76b0SSuyog Pawar * Maximum number of reference buffers in DPB manager 102*c83a76b0SSuyog Pawar */ 103*c83a76b0SSuyog Pawar #define MAX_REF_CNT 32 104*c83a76b0SSuyog Pawar 105*c83a76b0SSuyog Pawar /** 106*c83a76b0SSuyog Pawar * Maximum number of CU info buffers 107*c83a76b0SSuyog Pawar */ 108*c83a76b0SSuyog Pawar #define MAX_CU_INFO_BUF_CNT MAX_REF_CNT 109*c83a76b0SSuyog Pawar 110*c83a76b0SSuyog Pawar /*****************************************************************************/ 111*c83a76b0SSuyog Pawar /* Num cores releated defs */ 112*c83a76b0SSuyog Pawar /*****************************************************************************/ 113*c83a76b0SSuyog Pawar /** 114*c83a76b0SSuyog Pawar * Maximum number of cores 115*c83a76b0SSuyog Pawar */ 116*c83a76b0SSuyog Pawar #define MAX_NUM_CORES 8 117*c83a76b0SSuyog Pawar 118*c83a76b0SSuyog Pawar /** 119*c83a76b0SSuyog Pawar * Maximum number of threads for pixel processing 120*c83a76b0SSuyog Pawar */ 121*c83a76b0SSuyog Pawar #define MAX_PROCESS_THREADS MAX_NUM_CORES 122*c83a76b0SSuyog Pawar 123*c83a76b0SSuyog Pawar /** If num_cores is greater than MV_PRED_NUM_CORES_THRESHOLD, then mv pred and 124*c83a76b0SSuyog Pawar boundary strength computation is done in process side instead of parse side. 125*c83a76b0SSuyog Pawar This ensures thread that does parsing does minimal work */ 126*c83a76b0SSuyog Pawar #define MV_PRED_NUM_CORES_THRESHOLD 2 127*c83a76b0SSuyog Pawar 128*c83a76b0SSuyog Pawar /*****************************************************************************/ 129*c83a76b0SSuyog Pawar /* Profile and level restrictions */ 130*c83a76b0SSuyog Pawar /*****************************************************************************/ 131*c83a76b0SSuyog Pawar /** 132*c83a76b0SSuyog Pawar * Max level supported by the codec 133*c83a76b0SSuyog Pawar */ 134*c83a76b0SSuyog Pawar #define MAX_LEVEL IHEVC_LEVEL_62 135*c83a76b0SSuyog Pawar /** 136*c83a76b0SSuyog Pawar * Min level supported by the codec 137*c83a76b0SSuyog Pawar */ 138*c83a76b0SSuyog Pawar 139*c83a76b0SSuyog Pawar #define MIN_LEVEL IHEVC_LEVEL_10 140*c83a76b0SSuyog Pawar 141*c83a76b0SSuyog Pawar 142*c83a76b0SSuyog Pawar /** 143*c83a76b0SSuyog Pawar * Maximum number of slice headers that are held in memory simultaneously 144*c83a76b0SSuyog Pawar * For single core implementation only 1 slice header is enough. 145*c83a76b0SSuyog Pawar * But for multi-core parsing thread needs to ensure that slice headers are 146*c83a76b0SSuyog Pawar * stored till the last CB in a slice is decoded. 147*c83a76b0SSuyog Pawar * Parsing thread has to wait till last CB of a slice is consumed before reusing 148*c83a76b0SSuyog Pawar * overwriting the slice header 149*c83a76b0SSuyog Pawar * MAX_SLICE_HDR_CNT is assumed to be a power of 2 150*c83a76b0SSuyog Pawar */ 151*c83a76b0SSuyog Pawar 152*c83a76b0SSuyog Pawar #define LOG2_MAX_SLICE_HDR_CNT 8 153*c83a76b0SSuyog Pawar #define MAX_SLICE_HDR_CNT (1 << LOG2_MAX_SLICE_HDR_CNT) 154*c83a76b0SSuyog Pawar 155*c83a76b0SSuyog Pawar /* Number of NOP instructions to wait before yielding in process thread */ 156*c83a76b0SSuyog Pawar #define PROC_NOP_CNT (8 * 128) 157*c83a76b0SSuyog Pawar 158*c83a76b0SSuyog Pawar 159*c83a76b0SSuyog Pawar /** Max QP delta that can be signalled */ 160*c83a76b0SSuyog Pawar #define TU_MAX_QP_DELTA_ABS 5 161*c83a76b0SSuyog Pawar 162*c83a76b0SSuyog Pawar /** Max QP delta context increment that can be used for CABAC context */ 163*c83a76b0SSuyog Pawar #define CTXT_MAX_QP_DELTA_ABS 1 164*c83a76b0SSuyog Pawar 165*c83a76b0SSuyog Pawar /* 166*c83a76b0SSuyog Pawar * Flag whether to perform ilf at frame level or CTB level 167*c83a76b0SSuyog Pawar */ 168*c83a76b0SSuyog Pawar #define FRAME_ILF_PAD 0 169*c83a76b0SSuyog Pawar 170*c83a76b0SSuyog Pawar #define MAX_NUM_CTBS_IN_FRAME (MAX_WD * MAX_HT / MIN_CTB_SIZE / MIN_CTB_SIZE) 171*c83a76b0SSuyog Pawar 172*c83a76b0SSuyog Pawar /* Maximum slice segments allowed per frame in Level 6.2 */ 173*c83a76b0SSuyog Pawar #define MAX_SLICE_SEGMENTS_IN_FRAME 600 174*c83a76b0SSuyog Pawar 175*c83a76b0SSuyog Pawar /** 176*c83a76b0SSuyog Pawar * Buffer allocated for ps_tu is re-used after RESET_TU_BUF_NCTB 177*c83a76b0SSuyog Pawar * Set this to MAX_NUM_CTBS_IN_FRAME to disabke reuse 178*c83a76b0SSuyog Pawar */ 179*c83a76b0SSuyog Pawar #define RESET_TU_BUF_NCTB MAX_NUM_CTBS_IN_FRAME 180*c83a76b0SSuyog Pawar /** 181*c83a76b0SSuyog Pawar * Flag whether to shift the CTB for SAO 182*c83a76b0SSuyog Pawar */ 183*c83a76b0SSuyog Pawar #define SAO_PROCESS_SHIFT_CTB 1 184*c83a76b0SSuyog Pawar 185*c83a76b0SSuyog Pawar /** 186*c83a76b0SSuyog Pawar * Minimum bistream buffer size 187*c83a76b0SSuyog Pawar */ 188*c83a76b0SSuyog Pawar #define MIN_BITSBUF_SIZE (1024 * 1024) 189*c83a76b0SSuyog Pawar /** 190*c83a76b0SSuyog Pawar ***************************************************************************** 191*c83a76b0SSuyog Pawar * Macro to compute total size required to hold on set of scaling matrices 192*c83a76b0SSuyog Pawar ***************************************************************************** 193*c83a76b0SSuyog Pawar */ 194*c83a76b0SSuyog Pawar #define SCALING_MAT_SIZE(m_scaling_mat_size) \ 195*c83a76b0SSuyog Pawar { \ 196*c83a76b0SSuyog Pawar m_scaling_mat_size = 6 * TRANS_SIZE_4 * TRANS_SIZE_4; \ 197*c83a76b0SSuyog Pawar m_scaling_mat_size += 6 * TRANS_SIZE_8 * TRANS_SIZE_8; \ 198*c83a76b0SSuyog Pawar m_scaling_mat_size += 6 * TRANS_SIZE_16 * TRANS_SIZE_16; \ 199*c83a76b0SSuyog Pawar m_scaling_mat_size += 2 * TRANS_SIZE_32 * TRANS_SIZE_32; \ 200*c83a76b0SSuyog Pawar } 201*c83a76b0SSuyog Pawar 202*c83a76b0SSuyog Pawar /** 203*c83a76b0SSuyog Pawar *************************************************************************** 204*c83a76b0SSuyog Pawar * Enum to hold various mem records being request 205*c83a76b0SSuyog Pawar **************************************************************************** 206*c83a76b0SSuyog Pawar */ 207*c83a76b0SSuyog Pawar enum 208*c83a76b0SSuyog Pawar { 209*c83a76b0SSuyog Pawar /** 210*c83a76b0SSuyog Pawar * Codec Object at API level 211*c83a76b0SSuyog Pawar */ 212*c83a76b0SSuyog Pawar MEM_REC_IV_OBJ, 213*c83a76b0SSuyog Pawar 214*c83a76b0SSuyog Pawar /** 215*c83a76b0SSuyog Pawar * Codec context 216*c83a76b0SSuyog Pawar */ 217*c83a76b0SSuyog Pawar MEM_REC_CODEC, 218*c83a76b0SSuyog Pawar 219*c83a76b0SSuyog Pawar /** 220*c83a76b0SSuyog Pawar * Bitstream buffer which holds emulation prevention removed bytes 221*c83a76b0SSuyog Pawar */ 222*c83a76b0SSuyog Pawar MEM_REC_BITSBUF, 223*c83a76b0SSuyog Pawar 224*c83a76b0SSuyog Pawar /** 225*c83a76b0SSuyog Pawar * Buffer to hold TU structures and coeff data 226*c83a76b0SSuyog Pawar */ 227*c83a76b0SSuyog Pawar MEM_REC_TU_DATA, 228*c83a76b0SSuyog Pawar 229*c83a76b0SSuyog Pawar /** 230*c83a76b0SSuyog Pawar * Motion vector bank 231*c83a76b0SSuyog Pawar */ 232*c83a76b0SSuyog Pawar MEM_REC_MVBANK, 233*c83a76b0SSuyog Pawar 234*c83a76b0SSuyog Pawar /** 235*c83a76b0SSuyog Pawar * Holds mem records passed to the codec. 236*c83a76b0SSuyog Pawar */ 237*c83a76b0SSuyog Pawar MEM_REC_BACKUP, 238*c83a76b0SSuyog Pawar 239*c83a76b0SSuyog Pawar /** 240*c83a76b0SSuyog Pawar * Holds VPS 241*c83a76b0SSuyog Pawar */ 242*c83a76b0SSuyog Pawar MEM_REC_VPS, 243*c83a76b0SSuyog Pawar 244*c83a76b0SSuyog Pawar /** 245*c83a76b0SSuyog Pawar * Holds SPS 246*c83a76b0SSuyog Pawar */ 247*c83a76b0SSuyog Pawar MEM_REC_SPS, 248*c83a76b0SSuyog Pawar 249*c83a76b0SSuyog Pawar /** 250*c83a76b0SSuyog Pawar * Holds PPS 251*c83a76b0SSuyog Pawar */ 252*c83a76b0SSuyog Pawar MEM_REC_PPS, 253*c83a76b0SSuyog Pawar 254*c83a76b0SSuyog Pawar /** 255*c83a76b0SSuyog Pawar * Holds Slice Headers 256*c83a76b0SSuyog Pawar */ 257*c83a76b0SSuyog Pawar MEM_REC_SLICE_HDR, 258*c83a76b0SSuyog Pawar 259*c83a76b0SSuyog Pawar /** 260*c83a76b0SSuyog Pawar * Holds tile information such as start position, widths and heights 261*c83a76b0SSuyog Pawar */ 262*c83a76b0SSuyog Pawar MEM_REC_TILE, 263*c83a76b0SSuyog Pawar 264*c83a76b0SSuyog Pawar /** 265*c83a76b0SSuyog Pawar * Holds entry point offsets for tiles and entropy sync points 266*c83a76b0SSuyog Pawar */ 267*c83a76b0SSuyog Pawar MEM_REC_ENTRY_OFST, 268*c83a76b0SSuyog Pawar 269*c83a76b0SSuyog Pawar /** 270*c83a76b0SSuyog Pawar * Holds scaling matrices 271*c83a76b0SSuyog Pawar */ 272*c83a76b0SSuyog Pawar MEM_REC_SCALING_MAT, 273*c83a76b0SSuyog Pawar 274*c83a76b0SSuyog Pawar /** 275*c83a76b0SSuyog Pawar * Holds one row skip_flag at 8x8 level used during parsing 276*c83a76b0SSuyog Pawar */ 277*c83a76b0SSuyog Pawar MEM_REC_PARSE_SKIP_FLAG, 278*c83a76b0SSuyog Pawar 279*c83a76b0SSuyog Pawar /** 280*c83a76b0SSuyog Pawar * Holds one row ctb_tree_depth at 8x8 level used during parsing 281*c83a76b0SSuyog Pawar */ 282*c83a76b0SSuyog Pawar MEM_REC_PARSE_CT_DEPTH, 283*c83a76b0SSuyog Pawar 284*c83a76b0SSuyog Pawar /** 285*c83a76b0SSuyog Pawar * Holds one row luma intra pred mode at 8x8 level used during parsing 286*c83a76b0SSuyog Pawar */ 287*c83a76b0SSuyog Pawar MEM_REC_PARSE_INTRA_PRED_MODE, 288*c83a76b0SSuyog Pawar 289*c83a76b0SSuyog Pawar /** 290*c83a76b0SSuyog Pawar * Holds intra flag at 8x8 level for entire frame 291*c83a76b0SSuyog Pawar * This is kept at frame level so that processing thread also can use this 292*c83a76b0SSuyog Pawar * data during intra prediction and compute BS 293*c83a76b0SSuyog Pawar */ 294*c83a76b0SSuyog Pawar MEM_REC_INTRA_FLAG, 295*c83a76b0SSuyog Pawar 296*c83a76b0SSuyog Pawar /** 297*c83a76b0SSuyog Pawar * Holds transquant bypass flag at 8x8 level for entire frame 298*c83a76b0SSuyog Pawar * This is kept at frame level so that processing thread also can use this 299*c83a76b0SSuyog Pawar */ 300*c83a76b0SSuyog Pawar MEM_REC_TRANSQUANT_BYPASS_FLAG, 301*c83a76b0SSuyog Pawar 302*c83a76b0SSuyog Pawar /** 303*c83a76b0SSuyog Pawar * Holds thread handles 304*c83a76b0SSuyog Pawar */ 305*c83a76b0SSuyog Pawar MEM_REC_THREAD_HANDLE, 306*c83a76b0SSuyog Pawar 307*c83a76b0SSuyog Pawar /** 308*c83a76b0SSuyog Pawar * Holds memory for Process JOB Queue 309*c83a76b0SSuyog Pawar */ 310*c83a76b0SSuyog Pawar MEM_REC_PROC_JOBQ, 311*c83a76b0SSuyog Pawar 312*c83a76b0SSuyog Pawar /** 313*c83a76b0SSuyog Pawar * Contains status map indicating parse status per CTB basis 314*c83a76b0SSuyog Pawar */ 315*c83a76b0SSuyog Pawar MEM_REC_PARSE_MAP, 316*c83a76b0SSuyog Pawar 317*c83a76b0SSuyog Pawar /** 318*c83a76b0SSuyog Pawar * Contains status map indicating processing status per CTB basis 319*c83a76b0SSuyog Pawar */ 320*c83a76b0SSuyog Pawar MEM_REC_PROC_MAP, 321*c83a76b0SSuyog Pawar 322*c83a76b0SSuyog Pawar /** 323*c83a76b0SSuyog Pawar * Holds display buffer manager context 324*c83a76b0SSuyog Pawar */ 325*c83a76b0SSuyog Pawar MEM_REC_DISP_MGR, 326*c83a76b0SSuyog Pawar 327*c83a76b0SSuyog Pawar /** 328*c83a76b0SSuyog Pawar * Holds dpb manager context 329*c83a76b0SSuyog Pawar */ 330*c83a76b0SSuyog Pawar MEM_REC_DPB_MGR, 331*c83a76b0SSuyog Pawar 332*c83a76b0SSuyog Pawar /** 333*c83a76b0SSuyog Pawar * Holds top and left neighbors' pu_idx array w.r.t picture level pu array 334*c83a76b0SSuyog Pawar */ 335*c83a76b0SSuyog Pawar MEM_REC_PIC_PU_IDX_NEIGHBOR, 336*c83a76b0SSuyog Pawar 337*c83a76b0SSuyog Pawar /** 338*c83a76b0SSuyog Pawar * Holds intermediate buffers needed during processing stage 339*c83a76b0SSuyog Pawar * Memory for process contexts is allocated in this memtab 340*c83a76b0SSuyog Pawar */ 341*c83a76b0SSuyog Pawar MEM_REC_PROC_SCRATCH, 342*c83a76b0SSuyog Pawar 343*c83a76b0SSuyog Pawar /** 344*c83a76b0SSuyog Pawar * Holds intermediate buffers needed during SAO processing 345*c83a76b0SSuyog Pawar */ 346*c83a76b0SSuyog Pawar MEM_REC_SAO_SCRATCH, 347*c83a76b0SSuyog Pawar 348*c83a76b0SSuyog Pawar /** 349*c83a76b0SSuyog Pawar * Holds buffers for vert_bs, horz_bs and QP (all frame level) 350*c83a76b0SSuyog Pawar */ 351*c83a76b0SSuyog Pawar MEM_REC_BS_QP, 352*c83a76b0SSuyog Pawar 353*c83a76b0SSuyog Pawar /** 354*c83a76b0SSuyog Pawar * Contains slice map indicatating the slice index for each CTB 355*c83a76b0SSuyog Pawar */ 356*c83a76b0SSuyog Pawar MEM_REC_TILE_IDX, 357*c83a76b0SSuyog Pawar 358*c83a76b0SSuyog Pawar /** 359*c83a76b0SSuyog Pawar * Holds buffers for array of SAO structures 360*c83a76b0SSuyog Pawar */ 361*c83a76b0SSuyog Pawar MEM_REC_SAO, 362*c83a76b0SSuyog Pawar 363*c83a76b0SSuyog Pawar /** 364*c83a76b0SSuyog Pawar * Holds picture buffer manager context and array of pic_buf_ts 365*c83a76b0SSuyog Pawar * Also holds reference picture buffers in non-shared mode 366*c83a76b0SSuyog Pawar */ 367*c83a76b0SSuyog Pawar MEM_REC_REF_PIC, 368*c83a76b0SSuyog Pawar 369*c83a76b0SSuyog Pawar 370*c83a76b0SSuyog Pawar 371*c83a76b0SSuyog Pawar /** 372*c83a76b0SSuyog Pawar * Place holder to compute number of memory records. 373*c83a76b0SSuyog Pawar */ 374*c83a76b0SSuyog Pawar MEM_REC_CNT 375*c83a76b0SSuyog Pawar /* Do not add anything below */ 376*c83a76b0SSuyog Pawar }; 377*c83a76b0SSuyog Pawar 378*c83a76b0SSuyog Pawar 379*c83a76b0SSuyog Pawar 380*c83a76b0SSuyog Pawar #define DISABLE_DEBLOCK_INTERVAL 8 381*c83a76b0SSuyog Pawar #define DISABLE_SAO_INTERVAL 8 382*c83a76b0SSuyog Pawar 383*c83a76b0SSuyog Pawar /** 384*c83a76b0SSuyog Pawar **************************************************************************** 385*c83a76b0SSuyog Pawar * Disable deblock levels 386*c83a76b0SSuyog Pawar * Level 0 enables deblocking completely and level 4 disables completely 387*c83a76b0SSuyog Pawar * Other levels are intermediate values to control deblocking level 388*c83a76b0SSuyog Pawar **************************************************************************** 389*c83a76b0SSuyog Pawar */ 390*c83a76b0SSuyog Pawar enum 391*c83a76b0SSuyog Pawar { 392*c83a76b0SSuyog Pawar /** 393*c83a76b0SSuyog Pawar * Enable deblocking completely 394*c83a76b0SSuyog Pawar */ 395*c83a76b0SSuyog Pawar DISABLE_DEBLK_LEVEL_0, 396*c83a76b0SSuyog Pawar /** 397*c83a76b0SSuyog Pawar * Disable only within CTB edges - Not supported currently 398*c83a76b0SSuyog Pawar */ 399*c83a76b0SSuyog Pawar DISABLE_DEBLK_LEVEL_1, 400*c83a76b0SSuyog Pawar 401*c83a76b0SSuyog Pawar /** 402*c83a76b0SSuyog Pawar * Enable deblocking once in DEBLOCK_INTERVAL number of pictures 403*c83a76b0SSuyog Pawar * and for I slices 404*c83a76b0SSuyog Pawar */ 405*c83a76b0SSuyog Pawar DISABLE_DEBLK_LEVEL_2, 406*c83a76b0SSuyog Pawar 407*c83a76b0SSuyog Pawar /** 408*c83a76b0SSuyog Pawar * Enable deblocking only for I slices 409*c83a76b0SSuyog Pawar */ 410*c83a76b0SSuyog Pawar DISABLE_DEBLK_LEVEL_3, 411*c83a76b0SSuyog Pawar 412*c83a76b0SSuyog Pawar /** 413*c83a76b0SSuyog Pawar * Disable deblocking completely 414*c83a76b0SSuyog Pawar */ 415*c83a76b0SSuyog Pawar DISABLE_DEBLK_LEVEL_4 416*c83a76b0SSuyog Pawar }; 417*c83a76b0SSuyog Pawar 418*c83a76b0SSuyog Pawar enum 419*c83a76b0SSuyog Pawar { 420*c83a76b0SSuyog Pawar /** 421*c83a76b0SSuyog Pawar * Enable deblocking completely 422*c83a76b0SSuyog Pawar */ 423*c83a76b0SSuyog Pawar DISABLE_SAO_LEVEL_0, 424*c83a76b0SSuyog Pawar /** 425*c83a76b0SSuyog Pawar * Disable only within CTB edges - Not supported currently 426*c83a76b0SSuyog Pawar */ 427*c83a76b0SSuyog Pawar DISABLE_SAO_LEVEL_1, 428*c83a76b0SSuyog Pawar 429*c83a76b0SSuyog Pawar /** 430*c83a76b0SSuyog Pawar * Enable deblocking once in DEBLOCK_INTERVAL number of pictures 431*c83a76b0SSuyog Pawar * and for I slices 432*c83a76b0SSuyog Pawar */ 433*c83a76b0SSuyog Pawar DISABLE_SAO_LEVEL_2, 434*c83a76b0SSuyog Pawar 435*c83a76b0SSuyog Pawar /** 436*c83a76b0SSuyog Pawar * Enable deblocking only for I slices 437*c83a76b0SSuyog Pawar */ 438*c83a76b0SSuyog Pawar DISABLE_SAO_LEVEL_3, 439*c83a76b0SSuyog Pawar 440*c83a76b0SSuyog Pawar /** 441*c83a76b0SSuyog Pawar * Disable deblocking completely 442*c83a76b0SSuyog Pawar */ 443*c83a76b0SSuyog Pawar DISABLE_SAO_LEVEL_4 444*c83a76b0SSuyog Pawar }; 445*c83a76b0SSuyog Pawar 446*c83a76b0SSuyog Pawar /** 447*c83a76b0SSuyog Pawar **************************************************************************** 448*c83a76b0SSuyog Pawar * Number of buffers for I/O based on format 449*c83a76b0SSuyog Pawar **************************************************************************** 450*c83a76b0SSuyog Pawar */ 451*c83a76b0SSuyog Pawar #define MIN_IN_BUFS 1 452*c83a76b0SSuyog Pawar #define MIN_OUT_BUFS_420 3 453*c83a76b0SSuyog Pawar #define MIN_OUT_BUFS_422ILE 1 454*c83a76b0SSuyog Pawar #define MIN_OUT_BUFS_RGB565 1 455*c83a76b0SSuyog Pawar #define MIN_OUT_BUFS_RGBA8888 1 456*c83a76b0SSuyog Pawar #define MIN_OUT_BUFS_420SP 2 457*c83a76b0SSuyog Pawar 458*c83a76b0SSuyog Pawar /** 459*c83a76b0SSuyog Pawar **************************************************************************** 460*c83a76b0SSuyog Pawar * Definitions related to MV pred mv merge 461*c83a76b0SSuyog Pawar **************************************************************************** 462*c83a76b0SSuyog Pawar */ 463*c83a76b0SSuyog Pawar #define MAX_NUM_MERGE_CAND 5 464*c83a76b0SSuyog Pawar 465*c83a76b0SSuyog Pawar #define MAX_NUM_MV_NBR 5 466*c83a76b0SSuyog Pawar 467*c83a76b0SSuyog Pawar #define MAX_MVP_LIST_CAND 2 468*c83a76b0SSuyog Pawar #define MAX_MVP_LIST_CAND_MEM (MAX_MVP_LIST_CAND + 1) 469*c83a76b0SSuyog Pawar 470*c83a76b0SSuyog Pawar 471*c83a76b0SSuyog Pawar 472*c83a76b0SSuyog Pawar #endif /*_IHEVCD_DEFS_H_*/ 473