xref: /aosp_15_r20/external/libhevc/encoder/hme_interface.h (revision c83a76b084498d55f252f48b2e3786804cdf24b7)
1*c83a76b0SSuyog Pawar /******************************************************************************
2*c83a76b0SSuyog Pawar  *
3*c83a76b0SSuyog Pawar  * Copyright (C) 2018 The Android Open Source Project
4*c83a76b0SSuyog Pawar  *
5*c83a76b0SSuyog Pawar  * Licensed under the Apache License, Version 2.0 (the "License");
6*c83a76b0SSuyog Pawar  * you may not use this file except in compliance with the License.
7*c83a76b0SSuyog Pawar  * You may obtain a copy of the License at:
8*c83a76b0SSuyog Pawar  *
9*c83a76b0SSuyog Pawar  * http://www.apache.org/licenses/LICENSE-2.0
10*c83a76b0SSuyog Pawar  *
11*c83a76b0SSuyog Pawar  * Unless required by applicable law or agreed to in writing, software
12*c83a76b0SSuyog Pawar  * distributed under the License is distributed on an "AS IS" BASIS,
13*c83a76b0SSuyog Pawar  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14*c83a76b0SSuyog Pawar  * See the License for the specific language governing permissions and
15*c83a76b0SSuyog Pawar  * limitations under the License.
16*c83a76b0SSuyog Pawar  *
17*c83a76b0SSuyog Pawar  *****************************************************************************
18*c83a76b0SSuyog Pawar  * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19*c83a76b0SSuyog Pawar */
20*c83a76b0SSuyog Pawar /*!
21*c83a76b0SSuyog Pawar ******************************************************************************
22*c83a76b0SSuyog Pawar * \file hme_interface.h
23*c83a76b0SSuyog Pawar *
24*c83a76b0SSuyog Pawar * \brief
25*c83a76b0SSuyog Pawar *    Interfaces exported by ME to the world outside of ME
26*c83a76b0SSuyog Pawar *
27*c83a76b0SSuyog Pawar * \date
28*c83a76b0SSuyog Pawar *    18/09/2012
29*c83a76b0SSuyog Pawar *
30*c83a76b0SSuyog Pawar * \author
31*c83a76b0SSuyog Pawar *    Ittiam
32*c83a76b0SSuyog Pawar *
33*c83a76b0SSuyog Pawar ******************************************************************************
34*c83a76b0SSuyog Pawar */
35*c83a76b0SSuyog Pawar 
36*c83a76b0SSuyog Pawar #ifndef _HME_INTERFACE_H_
37*c83a76b0SSuyog Pawar #define _HME_INTERFACE_H_
38*c83a76b0SSuyog Pawar 
39*c83a76b0SSuyog Pawar /*****************************************************************************/
40*c83a76b0SSuyog Pawar /* Constant Macros                                                           */
41*c83a76b0SSuyog Pawar /*****************************************************************************/
42*c83a76b0SSuyog Pawar 
43*c83a76b0SSuyog Pawar /**
44*c83a76b0SSuyog Pawar ******************************************************************************
45*c83a76b0SSuyog Pawar  *  @brief      Maximum number of layers allowed
46*c83a76b0SSuyog Pawar ******************************************************************************
47*c83a76b0SSuyog Pawar  */
48*c83a76b0SSuyog Pawar #define MAX_NUM_LAYERS 4
49*c83a76b0SSuyog Pawar 
50*c83a76b0SSuyog Pawar /**
51*c83a76b0SSuyog Pawar ******************************************************************************
52*c83a76b0SSuyog Pawar  *  @brief      layer max dimensions
53*c83a76b0SSuyog Pawar ******************************************************************************
54*c83a76b0SSuyog Pawar  */
55*c83a76b0SSuyog Pawar #define HME_MAX_WIDTH 1920
56*c83a76b0SSuyog Pawar #define HME_MAX_HEIGHT 1088
57*c83a76b0SSuyog Pawar 
58*c83a76b0SSuyog Pawar /**
59*c83a76b0SSuyog Pawar ******************************************************************************
60*c83a76b0SSuyog Pawar  *  @brief      layer min dimensions
61*c83a76b0SSuyog Pawar ******************************************************************************
62*c83a76b0SSuyog Pawar  */
63*c83a76b0SSuyog Pawar #define MIN_WD_COARSE 16
64*c83a76b0SSuyog Pawar #define MIN_HT_COARSE 16
65*c83a76b0SSuyog Pawar 
66*c83a76b0SSuyog Pawar /**
67*c83a76b0SSuyog Pawar ******************************************************************************
68*c83a76b0SSuyog Pawar  *  @brief     HME COARSE LAYER STEP SIZE
69*c83a76b0SSuyog Pawar ******************************************************************************
70*c83a76b0SSuyog Pawar  */
71*c83a76b0SSuyog Pawar 
72*c83a76b0SSuyog Pawar #define HME_COARSE_STEP_SIZE_HIGH_SPEED 4
73*c83a76b0SSuyog Pawar #define HME_COARSE_STEP_SIZE_HIGH_QUALITY 2
74*c83a76b0SSuyog Pawar 
75*c83a76b0SSuyog Pawar /**
76*c83a76b0SSuyog Pawar ******************************************************************************
77*c83a76b0SSuyog Pawar  *  @brief      Memtabs required by layer ctxt: each layer ctxt requires 1
78*c83a76b0SSuyog Pawar  *               memtab for itslf, 1 for mv bank, 1 for ref idx bank, one
79*c83a76b0SSuyog Pawar  *               for input bufffer and 1 for storing segmentation info in
80*c83a76b0SSuyog Pawar  *               worst case
81*c83a76b0SSuyog Pawar ******************************************************************************
82*c83a76b0SSuyog Pawar  */
83*c83a76b0SSuyog Pawar #define HME_MEMTABS_COARSE_LAYER_CTXT (5 * (MAX_NUM_LAYERS - 1) * (MAX_NUM_REF + 1))
84*c83a76b0SSuyog Pawar 
85*c83a76b0SSuyog Pawar /**
86*c83a76b0SSuyog Pawar ******************************************************************************
87*c83a76b0SSuyog Pawar  *  @brief      Total number of memtabs reuqired by HME. Atleast 22 memtabs
88*c83a76b0SSuyog Pawar  *              for different search results structure, 2*MAX_NUM_REF memtabs
89*c83a76b0SSuyog Pawar  *              for search nodes maintaining coarse layer results in prev
90*c83a76b0SSuyog Pawar  *              row, and for histograms. Memtabs reqd for layer,me ctxt
91*c83a76b0SSuyog Pawar  *              ctb node mgr and buf mgr plus some 8 for safety
92*c83a76b0SSuyog Pawar  *              if multi threaded then some memtabs will be more
93*c83a76b0SSuyog Pawar ******************************************************************************
94*c83a76b0SSuyog Pawar  */
95*c83a76b0SSuyog Pawar #define HME_COARSE_TOT_MEMTABS                                                                     \
96*c83a76b0SSuyog Pawar     (22 + HME_MEMTABS_COARSE_LAYER_CTXT + (3 * MAX_NUM_REF) + 8 * MAX_NUM_FRM_PROC_THRDS_PRE_ENC + \
97*c83a76b0SSuyog Pawar      1)
98*c83a76b0SSuyog Pawar 
99*c83a76b0SSuyog Pawar /**
100*c83a76b0SSuyog Pawar ******************************************************************************
101*c83a76b0SSuyog Pawar  *  @brief      Memtabs required by layer ctxt (enc): each layer ctxt requires 1
102*c83a76b0SSuyog Pawar  *               memtab for itslf, 1 for mv bank, 1 for ref idx bank, one
103*c83a76b0SSuyog Pawar  *               for input bufffer and 1 for storing segmentation info in
104*c83a76b0SSuyog Pawar  *               worst case
105*c83a76b0SSuyog Pawar ******************************************************************************
106*c83a76b0SSuyog Pawar  */
107*c83a76b0SSuyog Pawar #define MIN_HME_MEMTABS_ENC_LAYER_CTXT (5 * 1 * (MAX_NUM_REF + 1))
108*c83a76b0SSuyog Pawar 
109*c83a76b0SSuyog Pawar #define MAX_HME_MEMTABS_ENC_LAYER_CTXT (5 * 1 * (MAX_NUM_REF + 1 + MAX_NUM_ME_PARALLEL))
110*c83a76b0SSuyog Pawar 
111*c83a76b0SSuyog Pawar /**
112*c83a76b0SSuyog Pawar ******************************************************************************
113*c83a76b0SSuyog Pawar  *  @brief      Total number of memtabs reuqired by HME. Atleast 22 memtabs
114*c83a76b0SSuyog Pawar  *              for different search results structure, 2*MAX_NUM_REF memtabs
115*c83a76b0SSuyog Pawar  *              for search nodes maintaining coarse layer results in prev
116*c83a76b0SSuyog Pawar  *              row, and for histograms. Memtabs reqd for layer,me ctxt
117*c83a76b0SSuyog Pawar  *              ctb node mgr and buf mgr plus some 8 for safety
118*c83a76b0SSuyog Pawar  *              if multi threaded then some memtabs will be more
119*c83a76b0SSuyog Pawar ******************************************************************************
120*c83a76b0SSuyog Pawar  */
121*c83a76b0SSuyog Pawar 
122*c83a76b0SSuyog Pawar #define MIN_HME_ENC_TOT_MEMTABS                                                                    \
123*c83a76b0SSuyog Pawar     (22 + MIN_HME_MEMTABS_ENC_LAYER_CTXT + (3 * MAX_NUM_REF) + 28 * MAX_NUM_FRM_PROC_THRDS_ENC +   \
124*c83a76b0SSuyog Pawar      2 /* Clustering */ + 1 /*traqo*/ + 1 /* ME Optimised Function List */)
125*c83a76b0SSuyog Pawar 
126*c83a76b0SSuyog Pawar #define MAX_HME_ENC_TOT_MEMTABS                                                                    \
127*c83a76b0SSuyog Pawar     ((22 * MAX_NUM_ME_PARALLEL) + MAX_HME_MEMTABS_ENC_LAYER_CTXT +                                 \
128*c83a76b0SSuyog Pawar      (3 * MAX_NUM_REF * MAX_NUM_ME_PARALLEL) +                                                     \
129*c83a76b0SSuyog Pawar      28 * MAX_NUM_FRM_PROC_THRDS_ENC * MAX_NUM_ME_PARALLEL + 2 /* Clustering */ + 1 /*traqo*/ +    \
130*c83a76b0SSuyog Pawar      1 /* ME Optimised Function List */)
131*c83a76b0SSuyog Pawar 
132*c83a76b0SSuyog Pawar /*****************************************************************************/
133*c83a76b0SSuyog Pawar /* Enumerations                                                              */
134*c83a76b0SSuyog Pawar /*****************************************************************************/
135*c83a76b0SSuyog Pawar /**
136*c83a76b0SSuyog Pawar ******************************************************************************
137*c83a76b0SSuyog Pawar  *  @enum     HME_MEM_ATTRS_T
138*c83a76b0SSuyog Pawar  *  @brief      Contains type of memory: scratch, scratch ovly, persistent
139*c83a76b0SSuyog Pawar ******************************************************************************
140*c83a76b0SSuyog Pawar  */
141*c83a76b0SSuyog Pawar typedef enum
142*c83a76b0SSuyog Pawar {
143*c83a76b0SSuyog Pawar     HME_SCRATCH_MEM,
144*c83a76b0SSuyog Pawar     HME_SCRATCH_OVLY_MEM,
145*c83a76b0SSuyog Pawar     HME_PERSISTENT_MEM
146*c83a76b0SSuyog Pawar } HME_MEM_ATTRS_T;
147*c83a76b0SSuyog Pawar 
148*c83a76b0SSuyog Pawar /**
149*c83a76b0SSuyog Pawar ******************************************************************************
150*c83a76b0SSuyog Pawar  *  @enum     ME_QUALITY_PRESETS_T
151*c83a76b0SSuyog Pawar  *  @brief    Describes the source for values in me_quality_params_t struct
152*c83a76b0SSuyog Pawar ******************************************************************************
153*c83a76b0SSuyog Pawar  */
154*c83a76b0SSuyog Pawar typedef enum
155*c83a76b0SSuyog Pawar {
156*c83a76b0SSuyog Pawar     ME_PRISTINE_QUALITY = 0,
157*c83a76b0SSuyog Pawar     ME_HIGH_QUALITY = 2,
158*c83a76b0SSuyog Pawar     ME_MEDIUM_SPEED,
159*c83a76b0SSuyog Pawar     ME_HIGH_SPEED,
160*c83a76b0SSuyog Pawar     ME_XTREME_SPEED,
161*c83a76b0SSuyog Pawar     ME_XTREME_SPEED_25
162*c83a76b0SSuyog Pawar } ME_QUALITY_PRESETS_T;
163*c83a76b0SSuyog Pawar 
164*c83a76b0SSuyog Pawar /*****************************************************************************/
165*c83a76b0SSuyog Pawar /* Structures                                                                */
166*c83a76b0SSuyog Pawar /*****************************************************************************/
167*c83a76b0SSuyog Pawar 
168*c83a76b0SSuyog Pawar /**
169*c83a76b0SSuyog Pawar ******************************************************************************
170*c83a76b0SSuyog Pawar  *  @struct     hme_ref_buf_info_t
171*c83a76b0SSuyog Pawar  *  @brief      Contains all required information of a ref picture
172*c83a76b0SSuyog Pawar  *              Valid for a given layer.
173*c83a76b0SSuyog Pawar ******************************************************************************
174*c83a76b0SSuyog Pawar  */
175*c83a76b0SSuyog Pawar typedef struct
176*c83a76b0SSuyog Pawar {
177*c83a76b0SSuyog Pawar     /** Amt of padding in X direction both sides. */
178*c83a76b0SSuyog Pawar     U08 u1_pad_x;
179*c83a76b0SSuyog Pawar 
180*c83a76b0SSuyog Pawar     /** Amt of padding in Y direction both sides */
181*c83a76b0SSuyog Pawar     U08 u1_pad_y;
182*c83a76b0SSuyog Pawar 
183*c83a76b0SSuyog Pawar     /** Recon stride, in pixels */
184*c83a76b0SSuyog Pawar     S32 luma_stride;
185*c83a76b0SSuyog Pawar 
186*c83a76b0SSuyog Pawar     /** Offset w.r.t. actual start of the buffer */
187*c83a76b0SSuyog Pawar     S32 luma_offset;
188*c83a76b0SSuyog Pawar 
189*c83a76b0SSuyog Pawar     /** Src ptrs of the reference pictures*/
190*c83a76b0SSuyog Pawar     U08 *pu1_ref_src;
191*c83a76b0SSuyog Pawar 
192*c83a76b0SSuyog Pawar     /** Reference ptrs for fpel plane, needed for this layer closed loop ME */
193*c83a76b0SSuyog Pawar     U08 *pu1_rec_fxfy;
194*c83a76b0SSuyog Pawar 
195*c83a76b0SSuyog Pawar     /** Reference ptrs for hxfy plane (x = k+0.5, y = m) */
196*c83a76b0SSuyog Pawar     U08 *pu1_rec_hxfy;
197*c83a76b0SSuyog Pawar 
198*c83a76b0SSuyog Pawar     /** Reference ptrs for fxhy plane (x = k, y = m + 0.5 */
199*c83a76b0SSuyog Pawar     U08 *pu1_rec_fxhy;
200*c83a76b0SSuyog Pawar 
201*c83a76b0SSuyog Pawar     /** Reference ptrs for hxhy plane (x = k + 0.5, y = m + 0.5 */
202*c83a76b0SSuyog Pawar     U08 *pu1_rec_hxhy;
203*c83a76b0SSuyog Pawar 
204*c83a76b0SSuyog Pawar     /** Reference ptr for u plane */
205*c83a76b0SSuyog Pawar     U08 *pu1_rec_u;
206*c83a76b0SSuyog Pawar 
207*c83a76b0SSuyog Pawar     /** Reference ptr for v plane */
208*c83a76b0SSuyog Pawar     U08 *pu1_rec_v;
209*c83a76b0SSuyog Pawar 
210*c83a76b0SSuyog Pawar     /** chroma plane stride in pixels */
211*c83a76b0SSuyog Pawar     S32 chroma_stride;
212*c83a76b0SSuyog Pawar 
213*c83a76b0SSuyog Pawar     S32 chroma_offset;
214*c83a76b0SSuyog Pawar 
215*c83a76b0SSuyog Pawar     /** Pointer to dependency manager of recon buffer */
216*c83a76b0SSuyog Pawar     void *pv_dep_mngr;
217*c83a76b0SSuyog Pawar 
218*c83a76b0SSuyog Pawar } hme_ref_buf_info_t;
219*c83a76b0SSuyog Pawar 
220*c83a76b0SSuyog Pawar /**
221*c83a76b0SSuyog Pawar ******************************************************************************
222*c83a76b0SSuyog Pawar  *  @struct     interp_prms_t
223*c83a76b0SSuyog Pawar  *  @brief      All parameters for the interpolation function
224*c83a76b0SSuyog Pawar ******************************************************************************
225*c83a76b0SSuyog Pawar  */
226*c83a76b0SSuyog Pawar typedef struct
227*c83a76b0SSuyog Pawar {
228*c83a76b0SSuyog Pawar     /** Array of ptr of 4 planes in order fxfy, hxfy, fxhy, hxhy */
229*c83a76b0SSuyog Pawar     U08 **ppu1_ref;
230*c83a76b0SSuyog Pawar 
231*c83a76b0SSuyog Pawar     /**
232*c83a76b0SSuyog Pawar      *  Array of pointers for ping-pong buffers, used to store interp out
233*c83a76b0SSuyog Pawar      *  Output during a call goes to any one of these buffers
234*c83a76b0SSuyog Pawar      */
235*c83a76b0SSuyog Pawar     U08 *apu1_interp_out[5];
236*c83a76b0SSuyog Pawar 
237*c83a76b0SSuyog Pawar     /**
238*c83a76b0SSuyog Pawar      *  Working memory to store 16 bit intermediate output. This has to be
239*c83a76b0SSuyog Pawar      *  of size i4_blk_wd * (i4_blk_ht + 7) * 2
240*c83a76b0SSuyog Pawar      */
241*c83a76b0SSuyog Pawar     U08 *pu1_wkg_mem;
242*c83a76b0SSuyog Pawar 
243*c83a76b0SSuyog Pawar     /** Stride of all 4 planes of ref buffers */
244*c83a76b0SSuyog Pawar     S32 i4_ref_stride;
245*c83a76b0SSuyog Pawar 
246*c83a76b0SSuyog Pawar     /** Width of interpolated output blk desired */
247*c83a76b0SSuyog Pawar     S32 i4_blk_wd;
248*c83a76b0SSuyog Pawar 
249*c83a76b0SSuyog Pawar     /** Ht of interpolated output blk desired */
250*c83a76b0SSuyog Pawar     S32 i4_blk_ht;
251*c83a76b0SSuyog Pawar 
252*c83a76b0SSuyog Pawar     /**
253*c83a76b0SSuyog Pawar      *  Stride of interpolated output bufers,
254*c83a76b0SSuyog Pawar      *  applicable for both ping and pong
255*c83a76b0SSuyog Pawar      */
256*c83a76b0SSuyog Pawar     S32 i4_out_stride;
257*c83a76b0SSuyog Pawar 
258*c83a76b0SSuyog Pawar     /** Final output pointer, which may be one of ping-pong or hpel planes */
259*c83a76b0SSuyog Pawar     U08 *pu1_final_out;
260*c83a76b0SSuyog Pawar 
261*c83a76b0SSuyog Pawar     /** STride of the output bfufer */
262*c83a76b0SSuyog Pawar     S32 i4_final_out_stride;
263*c83a76b0SSuyog Pawar 
264*c83a76b0SSuyog Pawar } interp_prms_t;
265*c83a76b0SSuyog Pawar 
266*c83a76b0SSuyog Pawar /*****************************************************************************/
267*c83a76b0SSuyog Pawar /* Typedefs                                                                  */
268*c83a76b0SSuyog Pawar /*****************************************************************************/
269*c83a76b0SSuyog Pawar typedef void (*PF_EXT_UPDATE_FXN_T)(void *, void *, S32, S32);
270*c83a76b0SSuyog Pawar 
271*c83a76b0SSuyog Pawar //typedef void (*PF_GET_INTRA_CU_AND_COST)(void *, S32, S32, S32 *, S32*, double *, S32);
272*c83a76b0SSuyog Pawar 
273*c83a76b0SSuyog Pawar typedef void (*PF_INTERP_FXN_T)(interp_prms_t *ps_prms, S32 i4_mv_x, S32 i4_mv_y, S32 interp_buf_id);
274*c83a76b0SSuyog Pawar 
275*c83a76b0SSuyog Pawar typedef void (*PF_SCALE_FXN_T)(
276*c83a76b0SSuyog Pawar     U08 *pu1_src, S32 src_stride, U08 *pu1_dst, S32 dst_stride, S32 wd, S32 ht, U08 *pu1_wkg_mem);
277*c83a76b0SSuyog Pawar 
278*c83a76b0SSuyog Pawar /**
279*c83a76b0SSuyog Pawar ******************************************************************************
280*c83a76b0SSuyog Pawar  *  @struct     hme_ref_desc_t
281*c83a76b0SSuyog Pawar  *  @brief      Contains all reqd information for ref pics across all layers
282*c83a76b0SSuyog Pawar  *              but for a given POC/ref id
283*c83a76b0SSuyog Pawar ******************************************************************************
284*c83a76b0SSuyog Pawar  */
285*c83a76b0SSuyog Pawar typedef struct
286*c83a76b0SSuyog Pawar {
287*c83a76b0SSuyog Pawar     /**
288*c83a76b0SSuyog Pawar      *  Reference id in LC list. This is a unified list containing both fwd
289*c83a76b0SSuyog Pawar      *  and backward direction references. Having a unified list just does
290*c83a76b0SSuyog Pawar      *  a unique mapping of frames to ref id and eases out addressing in the
291*c83a76b0SSuyog Pawar      *  ME search.
292*c83a76b0SSuyog Pawar      */
293*c83a76b0SSuyog Pawar     S08 i1_ref_id_lc;
294*c83a76b0SSuyog Pawar 
295*c83a76b0SSuyog Pawar     /**
296*c83a76b0SSuyog Pawar      *  Reference id in L0 list. Priority is given to temporally fwd dirn
297*c83a76b0SSuyog Pawar      *  unless of a scene change like case
298*c83a76b0SSuyog Pawar      */
299*c83a76b0SSuyog Pawar     S08 i1_ref_id_l0;
300*c83a76b0SSuyog Pawar 
301*c83a76b0SSuyog Pawar     /**
302*c83a76b0SSuyog Pawar      *  Reference id in L1 list. Priority to backward dirn unless scene change
303*c83a76b0SSuyog Pawar      *  like case
304*c83a76b0SSuyog Pawar     */
305*c83a76b0SSuyog Pawar     S08 i1_ref_id_l1;
306*c83a76b0SSuyog Pawar 
307*c83a76b0SSuyog Pawar     /** Whether this ref is temporally forward w.r.t. current pic */
308*c83a76b0SSuyog Pawar     U08 u1_is_fwd;
309*c83a76b0SSuyog Pawar 
310*c83a76b0SSuyog Pawar     /** POC of this ref pic. */
311*c83a76b0SSuyog Pawar     S32 i4_poc;
312*c83a76b0SSuyog Pawar 
313*c83a76b0SSuyog Pawar     /** display_num of this ref pic. */
314*c83a76b0SSuyog Pawar     S32 i4_display_num;
315*c83a76b0SSuyog Pawar     /**
316*c83a76b0SSuyog Pawar      *  Lambda to be used for S + lambda*bits style cost computations when
317*c83a76b0SSuyog Pawar      *  using this ref pic. This is a function of ref dist and hence diff
318*c83a76b0SSuyog Pawar      *  ref has diff lambda
319*c83a76b0SSuyog Pawar      */
320*c83a76b0SSuyog Pawar     S32 lambda;
321*c83a76b0SSuyog Pawar 
322*c83a76b0SSuyog Pawar     /** Ref buffer info for all layers */
323*c83a76b0SSuyog Pawar     hme_ref_buf_info_t as_ref_info[MAX_NUM_LAYERS];
324*c83a76b0SSuyog Pawar 
325*c83a76b0SSuyog Pawar     /** Weights and offset of reference picture
326*c83a76b0SSuyog Pawar      * used for weighted pred analysis
327*c83a76b0SSuyog Pawar      */
328*c83a76b0SSuyog Pawar     S16 i2_weight;
329*c83a76b0SSuyog Pawar 
330*c83a76b0SSuyog Pawar     S16 i2_offset;
331*c83a76b0SSuyog Pawar 
332*c83a76b0SSuyog Pawar     /*
333*c83a76b0SSuyog Pawar     * IDR GOP number
334*c83a76b0SSuyog Pawar     */
335*c83a76b0SSuyog Pawar 
336*c83a76b0SSuyog Pawar     WORD32 i4_GOP_num;
337*c83a76b0SSuyog Pawar 
338*c83a76b0SSuyog Pawar } hme_ref_desc_t;
339*c83a76b0SSuyog Pawar 
340*c83a76b0SSuyog Pawar /**
341*c83a76b0SSuyog Pawar ******************************************************************************
342*c83a76b0SSuyog Pawar  *  @struct     hme_ref_map_t
343*c83a76b0SSuyog Pawar  *  @brief      Complete ref information across all layers and POCs
344*c83a76b0SSuyog Pawar  *              Information valid for a given inp frame with a given POC.
345*c83a76b0SSuyog Pawar ******************************************************************************
346*c83a76b0SSuyog Pawar  */
347*c83a76b0SSuyog Pawar typedef struct
348*c83a76b0SSuyog Pawar {
349*c83a76b0SSuyog Pawar     /** Number of active ref picturs in LC list */
350*c83a76b0SSuyog Pawar     S32 i4_num_ref;
351*c83a76b0SSuyog Pawar 
352*c83a76b0SSuyog Pawar     /** Recon Pic buffer pointers for L0 list */
353*c83a76b0SSuyog Pawar     recon_pic_buf_t **pps_rec_list_l0;
354*c83a76b0SSuyog Pawar 
355*c83a76b0SSuyog Pawar     /** Recon Pic buffer pointers for L0 list */
356*c83a76b0SSuyog Pawar     recon_pic_buf_t **pps_rec_list_l1;
357*c83a76b0SSuyog Pawar 
358*c83a76b0SSuyog Pawar     /** Reference descriptors for all ref pics */
359*c83a76b0SSuyog Pawar     hme_ref_desc_t as_ref_desc[MAX_NUM_REF];
360*c83a76b0SSuyog Pawar 
361*c83a76b0SSuyog Pawar } hme_ref_map_t;
362*c83a76b0SSuyog Pawar 
363*c83a76b0SSuyog Pawar /**
364*c83a76b0SSuyog Pawar  ******************************************************************************
365*c83a76b0SSuyog Pawar  *  @struct me_coding_params_t
366*c83a76b0SSuyog Pawar  *  @param e_me_quality_presets : Quality preset value
367*c83a76b0SSuyog Pawar  *  @brief  ME Parameters that affect quality depending on their state
368*c83a76b0SSuyog Pawar  ******************************************************************************
369*c83a76b0SSuyog Pawar */
370*c83a76b0SSuyog Pawar typedef struct
371*c83a76b0SSuyog Pawar {
372*c83a76b0SSuyog Pawar     ME_QUALITY_PRESETS_T e_me_quality_presets;
373*c83a76b0SSuyog Pawar 
374*c83a76b0SSuyog Pawar     S32 i4_num_steps_hpel_refine;
375*c83a76b0SSuyog Pawar 
376*c83a76b0SSuyog Pawar     S32 i4_num_steps_qpel_refine;
377*c83a76b0SSuyog Pawar 
378*c83a76b0SSuyog Pawar     U08 u1_l0_me_controlled_via_cmd_line;
379*c83a76b0SSuyog Pawar 
380*c83a76b0SSuyog Pawar     U08 u1_num_results_per_part_in_l0me;
381*c83a76b0SSuyog Pawar 
382*c83a76b0SSuyog Pawar     U08 u1_num_results_per_part_in_l1me;
383*c83a76b0SSuyog Pawar 
384*c83a76b0SSuyog Pawar     U08 u1_num_results_per_part_in_l2me;
385*c83a76b0SSuyog Pawar 
386*c83a76b0SSuyog Pawar     U08 u1_max_num_coloc_cands;
387*c83a76b0SSuyog Pawar 
388*c83a76b0SSuyog Pawar     U08 u1_max_2nx2n_tu_recur_cands;
389*c83a76b0SSuyog Pawar 
390*c83a76b0SSuyog Pawar     U08 u1_max_num_fpel_refine_centers;
391*c83a76b0SSuyog Pawar 
392*c83a76b0SSuyog Pawar     U08 u1_max_num_subpel_refine_centers;
393*c83a76b0SSuyog Pawar } me_coding_params_t;
394*c83a76b0SSuyog Pawar 
395*c83a76b0SSuyog Pawar /**
396*c83a76b0SSuyog Pawar  ******************************************************************************
397*c83a76b0SSuyog Pawar  *  @struct hme_init_prms_t
398*c83a76b0SSuyog Pawar  *  @brief  Initialization parameters used during HME instance creation
399*c83a76b0SSuyog Pawar  ******************************************************************************
400*c83a76b0SSuyog Pawar */
401*c83a76b0SSuyog Pawar typedef struct
402*c83a76b0SSuyog Pawar {
403*c83a76b0SSuyog Pawar     /** Pointer to widths of various simulcast layers,
404*c83a76b0SSuyog Pawar      * starting with biggest resolution
405*c83a76b0SSuyog Pawar      */
406*c83a76b0SSuyog Pawar     S32 a_wd[MAX_NUM_LAYERS];
407*c83a76b0SSuyog Pawar 
408*c83a76b0SSuyog Pawar     /** Pointer to heights of various simulcast layers,
409*c83a76b0SSuyog Pawar      *  starting with biggest resolution
410*c83a76b0SSuyog Pawar      */
411*c83a76b0SSuyog Pawar     S32 a_ht[MAX_NUM_LAYERS];
412*c83a76b0SSuyog Pawar 
413*c83a76b0SSuyog Pawar     /** Maximum number of reference frames that a frame ever has to search */
414*c83a76b0SSuyog Pawar     S32 max_num_ref;
415*c83a76b0SSuyog Pawar 
416*c83a76b0SSuyog Pawar     /** Number of results to be stored in the coarsest layer */
417*c83a76b0SSuyog Pawar     S32 max_num_results_coarse;
418*c83a76b0SSuyog Pawar 
419*c83a76b0SSuyog Pawar     /**
420*c83a76b0SSuyog Pawar      *  Number of layers for which explicit ME is to be done
421*c83a76b0SSuyog Pawar      *  0 or MAX_NUM_LAYERS: encoder will do explicit ME for all layers
422*c83a76b0SSuyog Pawar      *  anything in between, explicit ME done for that many layers
423*c83a76b0SSuyog Pawar      */
424*c83a76b0SSuyog Pawar     S32 num_layers_explicit_search;
425*c83a76b0SSuyog Pawar 
426*c83a76b0SSuyog Pawar     /** Number of simulcast layers to be encoded */
427*c83a76b0SSuyog Pawar     S32 num_simulcast_layers;
428*c83a76b0SSuyog Pawar 
429*c83a76b0SSuyog Pawar     /** Maximum number of results per reference per partition */
430*c83a76b0SSuyog Pawar     S32 max_num_results;
431*c83a76b0SSuyog Pawar 
432*c83a76b0SSuyog Pawar     /**
433*c83a76b0SSuyog Pawar      *  If enabled, all layers store segmentation info at 16x16 lvl
434*c83a76b0SSuyog Pawar      *  If not enabled, then only finest layer stores this info
435*c83a76b0SSuyog Pawar      */
436*c83a76b0SSuyog Pawar     S32 segment_higher_layers;
437*c83a76b0SSuyog Pawar 
438*c83a76b0SSuyog Pawar     /**
439*c83a76b0SSuyog Pawar      *  If enabled, the non enocde layers use 8x8 blks with 4x4 partial
440*c83a76b0SSuyog Pawar      *  sads also being evaluated, which is more powerful but computationally
441*c83a76b0SSuyog Pawar      *  less efficient
442*c83a76b0SSuyog Pawar      */
443*c83a76b0SSuyog Pawar     S32 use_4x4;
444*c83a76b0SSuyog Pawar 
445*c83a76b0SSuyog Pawar     /**
446*c83a76b0SSuyog Pawar      *  Number of B frames allowed between P frames
447*c83a76b0SSuyog Pawar      */
448*c83a76b0SSuyog Pawar     S32 num_b_frms;
449*c83a76b0SSuyog Pawar 
450*c83a76b0SSuyog Pawar     /** CTB Size as passed by encoder */
451*c83a76b0SSuyog Pawar     S32 log_ctb_size;
452*c83a76b0SSuyog Pawar 
453*c83a76b0SSuyog Pawar     /** number of threads created run time */
454*c83a76b0SSuyog Pawar     S32 i4_num_proc_thrds;
455*c83a76b0SSuyog Pawar 
456*c83a76b0SSuyog Pawar     /* This struct contains fields corresponding to quality knobs for ME */
457*c83a76b0SSuyog Pawar     me_coding_params_t s_me_coding_tools;
458*c83a76b0SSuyog Pawar 
459*c83a76b0SSuyog Pawar     S32 max_vert_search_range;
460*c83a76b0SSuyog Pawar 
461*c83a76b0SSuyog Pawar     S32 max_horz_search_range;
462*c83a76b0SSuyog Pawar 
463*c83a76b0SSuyog Pawar     S32 is_interlaced;
464*c83a76b0SSuyog Pawar 
465*c83a76b0SSuyog Pawar     U08 u1_max_tr_depth;
466*c83a76b0SSuyog Pawar 
467*c83a76b0SSuyog Pawar     U08 u1_is_stasino_enabled;
468*c83a76b0SSuyog Pawar 
469*c83a76b0SSuyog Pawar     IV_ARCH_T e_arch_type;
470*c83a76b0SSuyog Pawar } hme_init_prms_t;
471*c83a76b0SSuyog Pawar 
472*c83a76b0SSuyog Pawar /**
473*c83a76b0SSuyog Pawar  ******************************************************************************
474*c83a76b0SSuyog Pawar  *  @struct hme_frm_prms_t
475*c83a76b0SSuyog Pawar  *  @brief  Frame level prms for HME execution
476*c83a76b0SSuyog Pawar  ******************************************************************************
477*c83a76b0SSuyog Pawar */
478*c83a76b0SSuyog Pawar typedef struct
479*c83a76b0SSuyog Pawar {
480*c83a76b0SSuyog Pawar     /** Range of the Motion vector in fpel units at finest layer x dirn */
481*c83a76b0SSuyog Pawar     S16 i2_mv_range_x;
482*c83a76b0SSuyog Pawar 
483*c83a76b0SSuyog Pawar     /** range of motion vector in fpel units at finest layer y dirn */
484*c83a76b0SSuyog Pawar     S16 i2_mv_range_y;
485*c83a76b0SSuyog Pawar 
486*c83a76b0SSuyog Pawar     /** Context for computing the cost function */
487*c83a76b0SSuyog Pawar     void *pv_mv_cost_ctxt;
488*c83a76b0SSuyog Pawar 
489*c83a76b0SSuyog Pawar     /** Interpolation function pointers */
490*c83a76b0SSuyog Pawar     PF_INTERP_FXN_T pf_interp_fxn;
491*c83a76b0SSuyog Pawar 
492*c83a76b0SSuyog Pawar     U08 is_i_pic;
493*c83a76b0SSuyog Pawar 
494*c83a76b0SSuyog Pawar     S32 bidir_enabled;
495*c83a76b0SSuyog Pawar 
496*c83a76b0SSuyog Pawar     S32 i4_temporal_layer_id;
497*c83a76b0SSuyog Pawar 
498*c83a76b0SSuyog Pawar     /**
499*c83a76b0SSuyog Pawar       * Lambda values in Q format. 4 values exist: Closed loop SATD/SAD
500*c83a76b0SSuyog Pawar       * and open loop SATD/SAD
501*c83a76b0SSuyog Pawar       */
502*c83a76b0SSuyog Pawar     S32 i4_cl_sad_lambda_qf;
503*c83a76b0SSuyog Pawar     S32 i4_cl_satd_lambda_qf;
504*c83a76b0SSuyog Pawar     S32 i4_ol_sad_lambda_qf;
505*c83a76b0SSuyog Pawar     S32 i4_ol_satd_lambda_qf;
506*c83a76b0SSuyog Pawar 
507*c83a76b0SSuyog Pawar     /** Shift for lambda QFormat */
508*c83a76b0SSuyog Pawar     S32 lambda_q_shift;
509*c83a76b0SSuyog Pawar 
510*c83a76b0SSuyog Pawar     S32 qstep;
511*c83a76b0SSuyog Pawar     S32 qstep_ls8;
512*c83a76b0SSuyog Pawar     S32 i4_frame_qp;
513*c83a76b0SSuyog Pawar     S32 is_pic_second_field;
514*c83a76b0SSuyog Pawar 
515*c83a76b0SSuyog Pawar     /**
516*c83a76b0SSuyog Pawar      * Number of active references in l0
517*c83a76b0SSuyog Pawar      */
518*c83a76b0SSuyog Pawar     U08 u1_num_active_ref_l0;
519*c83a76b0SSuyog Pawar 
520*c83a76b0SSuyog Pawar     /**
521*c83a76b0SSuyog Pawar      * Number of active references in l1
522*c83a76b0SSuyog Pawar      */
523*c83a76b0SSuyog Pawar     U08 u1_num_active_ref_l1;
524*c83a76b0SSuyog Pawar 
525*c83a76b0SSuyog Pawar     /* Flag that specifies whether CU level QP */
526*c83a76b0SSuyog Pawar     /* modulation is enabled */
527*c83a76b0SSuyog Pawar     U08 u1_is_cu_qp_delta_enabled;
528*c83a76b0SSuyog Pawar 
529*c83a76b0SSuyog Pawar } hme_frm_prms_t;
530*c83a76b0SSuyog Pawar 
531*c83a76b0SSuyog Pawar /**
532*c83a76b0SSuyog Pawar  ******************************************************************************
533*c83a76b0SSuyog Pawar  *  @struct hme_memtab_t
534*c83a76b0SSuyog Pawar  *  @brief  Structure to return memory requirements for one buffer.
535*c83a76b0SSuyog Pawar  ******************************************************************************
536*c83a76b0SSuyog Pawar */
537*c83a76b0SSuyog Pawar typedef struct
538*c83a76b0SSuyog Pawar {
539*c83a76b0SSuyog Pawar     /** Base of the memtab. Filled by application */
540*c83a76b0SSuyog Pawar     U08 *pu1_mem;
541*c83a76b0SSuyog Pawar 
542*c83a76b0SSuyog Pawar     /** Required size of the memtab. Filed by module */
543*c83a76b0SSuyog Pawar     S32 size;
544*c83a76b0SSuyog Pawar 
545*c83a76b0SSuyog Pawar     /** Alignment required */
546*c83a76b0SSuyog Pawar     S32 align;
547*c83a76b0SSuyog Pawar 
548*c83a76b0SSuyog Pawar     /** type of memory */
549*c83a76b0SSuyog Pawar     HME_MEM_ATTRS_T e_mem_attr;
550*c83a76b0SSuyog Pawar 
551*c83a76b0SSuyog Pawar } hme_memtab_t;
552*c83a76b0SSuyog Pawar 
553*c83a76b0SSuyog Pawar /**
554*c83a76b0SSuyog Pawar  ******************************************************************************
555*c83a76b0SSuyog Pawar  *  @struct hme_inp_buf_attr_t
556*c83a76b0SSuyog Pawar  *  @brief  Attributes of input buffer and planes
557*c83a76b0SSuyog Pawar  ******************************************************************************
558*c83a76b0SSuyog Pawar */
559*c83a76b0SSuyog Pawar typedef struct
560*c83a76b0SSuyog Pawar {
561*c83a76b0SSuyog Pawar     /** Luma ptr 0, 0 position */
562*c83a76b0SSuyog Pawar     U08 *pu1_y;
563*c83a76b0SSuyog Pawar 
564*c83a76b0SSuyog Pawar     /** Cb component or U component, 0, 0 position */
565*c83a76b0SSuyog Pawar     U08 *pu1_u;
566*c83a76b0SSuyog Pawar 
567*c83a76b0SSuyog Pawar     /** Cr component or V component, 0, 0 position */
568*c83a76b0SSuyog Pawar     U08 *pu1_v;
569*c83a76b0SSuyog Pawar 
570*c83a76b0SSuyog Pawar     /** Stride of luma component in pixels */
571*c83a76b0SSuyog Pawar     S32 luma_stride;
572*c83a76b0SSuyog Pawar 
573*c83a76b0SSuyog Pawar     /** Stride of chroma component in pixels */
574*c83a76b0SSuyog Pawar     S32 chroma_stride;
575*c83a76b0SSuyog Pawar } hme_inp_buf_attr_t;
576*c83a76b0SSuyog Pawar 
577*c83a76b0SSuyog Pawar /**
578*c83a76b0SSuyog Pawar  ******************************************************************************
579*c83a76b0SSuyog Pawar  *  @struct hme_inp_desc_t
580*c83a76b0SSuyog Pawar  *  @brief  Descriptor of a complete input frames (all simulcast layers incl)
581*c83a76b0SSuyog Pawar  ******************************************************************************
582*c83a76b0SSuyog Pawar */
583*c83a76b0SSuyog Pawar typedef struct
584*c83a76b0SSuyog Pawar {
585*c83a76b0SSuyog Pawar     /** input attributes for all simulcast layers */
586*c83a76b0SSuyog Pawar     hme_inp_buf_attr_t s_layer_desc[MAX_NUM_LAYERS];
587*c83a76b0SSuyog Pawar 
588*c83a76b0SSuyog Pawar     /** POC of the current input frame */
589*c83a76b0SSuyog Pawar     S32 i4_poc;
590*c83a76b0SSuyog Pawar 
591*c83a76b0SSuyog Pawar     /** idr GOP number*/
592*c83a76b0SSuyog Pawar     S32 i4_idr_gop_num;
593*c83a76b0SSuyog Pawar 
594*c83a76b0SSuyog Pawar     /** is refence picture */
595*c83a76b0SSuyog Pawar     S32 i4_is_reference;
596*c83a76b0SSuyog Pawar 
597*c83a76b0SSuyog Pawar } hme_inp_desc_t;
598*c83a76b0SSuyog Pawar 
599*c83a76b0SSuyog Pawar /*****************************************************************************/
600*c83a76b0SSuyog Pawar /* Extern Function Declarations                                              */
601*c83a76b0SSuyog Pawar /*****************************************************************************/
602*c83a76b0SSuyog Pawar 
603*c83a76b0SSuyog Pawar /**
604*c83a76b0SSuyog Pawar ********************************************************************************
605*c83a76b0SSuyog Pawar *  @fn     hme_enc_num_alloc()
606*c83a76b0SSuyog Pawar *
607*c83a76b0SSuyog Pawar *  @brief  returns number of memtabs that is required by hme module
608*c83a76b0SSuyog Pawar *
609*c83a76b0SSuyog Pawar *  @return   Number of memtabs required
610*c83a76b0SSuyog Pawar ********************************************************************************
611*c83a76b0SSuyog Pawar */
612*c83a76b0SSuyog Pawar S32 hme_enc_num_alloc(WORD32 i4_num_me_frm_pllel);
613*c83a76b0SSuyog Pawar 
614*c83a76b0SSuyog Pawar /**
615*c83a76b0SSuyog Pawar ********************************************************************************
616*c83a76b0SSuyog Pawar *  @fn     hme_coarse_num_alloc()
617*c83a76b0SSuyog Pawar *
618*c83a76b0SSuyog Pawar *  @brief  returns number of memtabs that is required by hme module
619*c83a76b0SSuyog Pawar *
620*c83a76b0SSuyog Pawar *  @return   Number of memtabs required
621*c83a76b0SSuyog Pawar ********************************************************************************
622*c83a76b0SSuyog Pawar */
623*c83a76b0SSuyog Pawar S32 hme_coarse_num_alloc();
624*c83a76b0SSuyog Pawar 
625*c83a76b0SSuyog Pawar /**
626*c83a76b0SSuyog Pawar ********************************************************************************
627*c83a76b0SSuyog Pawar *  @fn     hme_coarse_dep_mngr_num_alloc()
628*c83a76b0SSuyog Pawar *
629*c83a76b0SSuyog Pawar *  @brief  returns number of memtabs that is required by Dep Mngr for hme module
630*c83a76b0SSuyog Pawar *
631*c83a76b0SSuyog Pawar *  @return   Number of memtabs required
632*c83a76b0SSuyog Pawar ********************************************************************************
633*c83a76b0SSuyog Pawar */
634*c83a76b0SSuyog Pawar WORD32 hme_coarse_dep_mngr_num_alloc();
635*c83a76b0SSuyog Pawar 
636*c83a76b0SSuyog Pawar /**
637*c83a76b0SSuyog Pawar ********************************************************************************
638*c83a76b0SSuyog Pawar *  @fn     S32 hme_coarse_alloc(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms)
639*c83a76b0SSuyog Pawar *
640*c83a76b0SSuyog Pawar *  @brief  Fills up memtabs with memory information details required by HME
641*c83a76b0SSuyog Pawar *
642*c83a76b0SSuyog Pawar *  @param[out] ps_memtabs : Pointre to an array of memtabs where module fills
643*c83a76b0SSuyog Pawar *              up its requirements of memory
644*c83a76b0SSuyog Pawar *
645*c83a76b0SSuyog Pawar *  @param[in] ps_prms : Input parameters to module crucial in calculating reqd
646*c83a76b0SSuyog Pawar *                       amt of memory
647*c83a76b0SSuyog Pawar *
648*c83a76b0SSuyog Pawar *  @return   Number of memtabs required
649*c83a76b0SSuyog Pawar *******************************************************************************
650*c83a76b0SSuyog Pawar */
651*c83a76b0SSuyog Pawar S32 hme_coarse_alloc(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms);
652*c83a76b0SSuyog Pawar 
653*c83a76b0SSuyog Pawar /**
654*c83a76b0SSuyog Pawar *******************************************************************************
655*c83a76b0SSuyog Pawar *  @fn hme_coarse_dep_mngr_alloc
656*c83a76b0SSuyog Pawar *
657*c83a76b0SSuyog Pawar *  @brief  Fills up memtabs with memory information details required by Coarse HME
658*c83a76b0SSuyog Pawar *
659*c83a76b0SSuyog Pawar * \param[in,out]  ps_mem_tab : pointer to memory descriptors table
660*c83a76b0SSuyog Pawar * \param[in] ps_init_prms : Create time static parameters
661*c83a76b0SSuyog Pawar * \param[in] i4_mem_space : memspace in whihc memory request should be done
662*c83a76b0SSuyog Pawar *
663*c83a76b0SSuyog Pawar *  @return   Number of memtabs required
664*c83a76b0SSuyog Pawar *******************************************************************************
665*c83a76b0SSuyog Pawar */
666*c83a76b0SSuyog Pawar WORD32 hme_coarse_dep_mngr_alloc(
667*c83a76b0SSuyog Pawar     iv_mem_rec_t *ps_mem_tab,
668*c83a76b0SSuyog Pawar     ihevce_static_cfg_params_t *ps_init_prms,
669*c83a76b0SSuyog Pawar     WORD32 i4_mem_space,
670*c83a76b0SSuyog Pawar     WORD32 i4_num_proc_thrds,
671*c83a76b0SSuyog Pawar     WORD32 i4_resolution_id);
672*c83a76b0SSuyog Pawar 
673*c83a76b0SSuyog Pawar /**
674*c83a76b0SSuyog Pawar ********************************************************************************
675*c83a76b0SSuyog Pawar *  @fn     S32 hme_enc_alloc(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms)
676*c83a76b0SSuyog Pawar *
677*c83a76b0SSuyog Pawar *  @brief  Fills up memtabs with memory information details required by HME
678*c83a76b0SSuyog Pawar *
679*c83a76b0SSuyog Pawar *  @param[out] ps_memtabs : Pointer to an array of memtabs where module fills
680*c83a76b0SSuyog Pawar *              up its requirements of memory
681*c83a76b0SSuyog Pawar *
682*c83a76b0SSuyog Pawar *  @param[in] ps_prms : Input parameters to module crucial in calculating reqd
683*c83a76b0SSuyog Pawar *                       amt of memory
684*c83a76b0SSuyog Pawar *
685*c83a76b0SSuyog Pawar *  @return   Number of memtabs required
686*c83a76b0SSuyog Pawar *******************************************************************************
687*c83a76b0SSuyog Pawar */
688*c83a76b0SSuyog Pawar S32 hme_enc_alloc(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms, WORD32 i4_num_me_frm_pllel);
689*c83a76b0SSuyog Pawar 
690*c83a76b0SSuyog Pawar /**
691*c83a76b0SSuyog Pawar ********************************************************************************
692*c83a76b0SSuyog Pawar *  @fn     S32 hme_enc_init(void *pv_ctxt,
693*c83a76b0SSuyog Pawar *                       hme_memtab_t *ps_memtabs,
694*c83a76b0SSuyog Pawar *                       hme_init_prms_t *ps_prms);
695*c83a76b0SSuyog Pawar *
696*c83a76b0SSuyog Pawar *  @brief  Initialization (one time) of HME
697*c83a76b0SSuyog Pawar *
698*c83a76b0SSuyog Pawar *  @param[in,out] pv_ctxt : Pointer to context of HME
699*c83a76b0SSuyog Pawar *
700*c83a76b0SSuyog Pawar *  @param[in] ps_memtabs : updated memtabs by application (allocated memory)
701*c83a76b0SSuyog Pawar *
702*c83a76b0SSuyog Pawar *  @param[in] ps_prms : Initialization parametres
703*c83a76b0SSuyog Pawar *
704*c83a76b0SSuyog Pawar *  @return   0 : success, -1 : failure
705*c83a76b0SSuyog Pawar *******************************************************************************
706*c83a76b0SSuyog Pawar */
707*c83a76b0SSuyog Pawar S32 hme_enc_init(
708*c83a76b0SSuyog Pawar     void *pv_ctxt,
709*c83a76b0SSuyog Pawar     hme_memtab_t *ps_memtabs,
710*c83a76b0SSuyog Pawar     hme_init_prms_t *ps_prms,
711*c83a76b0SSuyog Pawar     rc_quant_t *ps_rc_quant_ctxt,
712*c83a76b0SSuyog Pawar     WORD32 i4_num_me_frm_pllel);
713*c83a76b0SSuyog Pawar 
714*c83a76b0SSuyog Pawar /**
715*c83a76b0SSuyog Pawar ********************************************************************************
716*c83a76b0SSuyog Pawar *  @fn     S32 hme_coarse_init(void *pv_ctxt,
717*c83a76b0SSuyog Pawar *                       hme_memtab_t *ps_memtabs,
718*c83a76b0SSuyog Pawar *                       hme_init_prms_t *ps_prms);
719*c83a76b0SSuyog Pawar *
720*c83a76b0SSuyog Pawar *  @brief  Initialization (one time) of HME
721*c83a76b0SSuyog Pawar *
722*c83a76b0SSuyog Pawar *  @param[in,out] pv_ctxt : Pointer to context of HME
723*c83a76b0SSuyog Pawar *
724*c83a76b0SSuyog Pawar *  @param[in] ps_memtabs : updated memtabs by application (allocated memory)
725*c83a76b0SSuyog Pawar *
726*c83a76b0SSuyog Pawar *  @param[in] ps_prms : Initialization parametres
727*c83a76b0SSuyog Pawar *
728*c83a76b0SSuyog Pawar *  @return   0 : success, -1 : failure
729*c83a76b0SSuyog Pawar *******************************************************************************
730*c83a76b0SSuyog Pawar */
731*c83a76b0SSuyog Pawar S32 hme_coarse_init(void *pv_ctxt, hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms);
732*c83a76b0SSuyog Pawar 
733*c83a76b0SSuyog Pawar /*!
734*c83a76b0SSuyog Pawar ******************************************************************************
735*c83a76b0SSuyog Pawar * \if Function name : ihevce_coarse_me_get_lyr_prms_dep_mngr \endif
736*c83a76b0SSuyog Pawar *
737*c83a76b0SSuyog Pawar * \brief Returns to the caller key attributes relevant for dependency manager,
738*c83a76b0SSuyog Pawar *        ie, the number of vertical units in each layer
739*c83a76b0SSuyog Pawar *
740*c83a76b0SSuyog Pawar * \par Description:
741*c83a76b0SSuyog Pawar *    This function requires the precondition that the width and ht of encode
742*c83a76b0SSuyog Pawar *    layer is known.
743*c83a76b0SSuyog Pawar *    The number of layers, number of vertical units in each layer, and for
744*c83a76b0SSuyog Pawar *    each vertial unit in each layer, its dependency on previous layer's units
745*c83a76b0SSuyog Pawar *    From ME's perspective, a vertical unit is one which is smallest min size
746*c83a76b0SSuyog Pawar *    vertically (and spans the entire row horizontally). This is CTB for encode
747*c83a76b0SSuyog Pawar *    layer, and 8x8 / 4x4 for non encode layers.
748*c83a76b0SSuyog Pawar *
749*c83a76b0SSuyog Pawar * \param[in] num_layers : Number of ME Layers
750*c83a76b0SSuyog Pawar * \param[in] pai4_ht    : Array storing ht at each layer
751*c83a76b0SSuyog Pawar * \param[in] pai4_wd    : Array storing wd at each layer
752*c83a76b0SSuyog Pawar * \param[out] pi4_num_vert_units_in_lyr : Array of size N (num layers), each
753*c83a76b0SSuyog Pawar *                     entry has num vertical units in that particular layer
754*c83a76b0SSuyog Pawar *
755*c83a76b0SSuyog Pawar * \return
756*c83a76b0SSuyog Pawar *    None
757*c83a76b0SSuyog Pawar *
758*c83a76b0SSuyog Pawar * \author
759*c83a76b0SSuyog Pawar *  Ittiam
760*c83a76b0SSuyog Pawar *
761*c83a76b0SSuyog Pawar *****************************************************************************
762*c83a76b0SSuyog Pawar */
763*c83a76b0SSuyog Pawar void ihevce_coarse_me_get_lyr_prms_dep_mngr(
764*c83a76b0SSuyog Pawar     WORD32 num_layers, WORD32 *pai4_ht, WORD32 *pai4_wd, WORD32 *pai4_num_vert_units_in_lyr);
765*c83a76b0SSuyog Pawar 
766*c83a76b0SSuyog Pawar /**
767*c83a76b0SSuyog Pawar ********************************************************************************
768*c83a76b0SSuyog Pawar *  @fn     hme_coarse_dep_mngr_alloc_mem()
769*c83a76b0SSuyog Pawar *
770*c83a76b0SSuyog Pawar *  @brief  Requests/ assign memory for HME Dep Mngr
771*c83a76b0SSuyog Pawar *
772*c83a76b0SSuyog Pawar * \param[in,out]  ps_mem_tab : pointer to memory descriptors table
773*c83a76b0SSuyog Pawar * \param[in] ps_init_prms : Create time static parameters
774*c83a76b0SSuyog Pawar * \param[in] i4_mem_space : memspace in whihc memory request should be done
775*c83a76b0SSuyog Pawar *
776*c83a76b0SSuyog Pawar *  @return  number of memtabs
777*c83a76b0SSuyog Pawar ********************************************************************************
778*c83a76b0SSuyog Pawar */
779*c83a76b0SSuyog Pawar WORD32 hme_coarse_dep_mngr_alloc_mem(
780*c83a76b0SSuyog Pawar     iv_mem_rec_t *ps_mem_tab,
781*c83a76b0SSuyog Pawar     ihevce_static_cfg_params_t *ps_init_prms,
782*c83a76b0SSuyog Pawar     WORD32 i4_mem_space,
783*c83a76b0SSuyog Pawar     WORD32 i4_num_proc_thrds,
784*c83a76b0SSuyog Pawar     WORD32 i4_resolution_id);
785*c83a76b0SSuyog Pawar 
786*c83a76b0SSuyog Pawar /**
787*c83a76b0SSuyog Pawar ********************************************************************************
788*c83a76b0SSuyog Pawar *  @fn     hme_coarse_dep_mngr_init()
789*c83a76b0SSuyog Pawar *
790*c83a76b0SSuyog Pawar *  @brief  Assign memory for HME Dep Mngr
791*c83a76b0SSuyog Pawar *
792*c83a76b0SSuyog Pawar * \param[in,out]  ps_mem_tab : pointer to memory descriptors table
793*c83a76b0SSuyog Pawar * \param[in] ps_init_prms : Create time static parameters
794*c83a76b0SSuyog Pawar *  @param[in] pv_ctxt : ME ctxt
795*c83a76b0SSuyog Pawar * \param[in] pv_osal_handle : Osal handle
796*c83a76b0SSuyog Pawar *
797*c83a76b0SSuyog Pawar *  @return  number of memtabs
798*c83a76b0SSuyog Pawar ********************************************************************************
799*c83a76b0SSuyog Pawar */
800*c83a76b0SSuyog Pawar WORD32 hme_coarse_dep_mngr_init(
801*c83a76b0SSuyog Pawar     iv_mem_rec_t *ps_mem_tab,
802*c83a76b0SSuyog Pawar     ihevce_static_cfg_params_t *ps_init_prms,
803*c83a76b0SSuyog Pawar     void *pv_ctxt,
804*c83a76b0SSuyog Pawar     void *pv_osal_handle,
805*c83a76b0SSuyog Pawar     WORD32 i4_num_proc_thrds,
806*c83a76b0SSuyog Pawar     WORD32 i4_resolution_id);
807*c83a76b0SSuyog Pawar 
808*c83a76b0SSuyog Pawar /**
809*c83a76b0SSuyog Pawar ********************************************************************************
810*c83a76b0SSuyog Pawar *  @fn     hme_coarse_dep_mngr_reg_sem()
811*c83a76b0SSuyog Pawar *
812*c83a76b0SSuyog Pawar *  @brief  Assign semaphores for HME Dep Mngr
813*c83a76b0SSuyog Pawar *
814*c83a76b0SSuyog Pawar * \param[in] pv_me_ctxt : pointer to Coarse ME ctxt
815*c83a76b0SSuyog Pawar * \param[in] ppv_sem_hdls : Arry of semaphore handles
816*c83a76b0SSuyog Pawar * \param[in] i4_num_proc_thrds : Number of processing threads
817*c83a76b0SSuyog Pawar *
818*c83a76b0SSuyog Pawar *  @return  number of memtabs
819*c83a76b0SSuyog Pawar ********************************************************************************
820*c83a76b0SSuyog Pawar */
821*c83a76b0SSuyog Pawar void hme_coarse_dep_mngr_reg_sem(void *pv_ctxt, void **ppv_sem_hdls, WORD32 i4_num_proc_thrds);
822*c83a76b0SSuyog Pawar 
823*c83a76b0SSuyog Pawar /**
824*c83a76b0SSuyog Pawar ********************************************************************************
825*c83a76b0SSuyog Pawar *  @fn     hme_coarse_dep_mngr_delete()
826*c83a76b0SSuyog Pawar *
827*c83a76b0SSuyog Pawar *    Destroy Coarse ME Dep Mngr module
828*c83a76b0SSuyog Pawar *   Note : Only Destroys the resources allocated in the module like
829*c83a76b0SSuyog Pawar *   semaphore,etc. Memory free is done Separately using memtabs
830*c83a76b0SSuyog Pawar *
831*c83a76b0SSuyog Pawar * \param[in] pv_me_ctxt : pointer to Coarse ME ctxt
832*c83a76b0SSuyog Pawar * \param[in] ps_init_prms : Create time static parameters
833*c83a76b0SSuyog Pawar *
834*c83a76b0SSuyog Pawar *  @return  none
835*c83a76b0SSuyog Pawar ********************************************************************************
836*c83a76b0SSuyog Pawar */
837*c83a76b0SSuyog Pawar void hme_coarse_dep_mngr_delete(
838*c83a76b0SSuyog Pawar     void *pv_me_ctxt, ihevce_static_cfg_params_t *ps_init_prms, WORD32 i4_resolution_id);
839*c83a76b0SSuyog Pawar 
840*c83a76b0SSuyog Pawar void hme_coarse_get_layer1_mv_bank_ref_idx_size(
841*c83a76b0SSuyog Pawar     S32 n_tot_layers,
842*c83a76b0SSuyog Pawar     S32 *a_wd,
843*c83a76b0SSuyog Pawar     S32 *a_ht,
844*c83a76b0SSuyog Pawar     S32 max_num_ref,
845*c83a76b0SSuyog Pawar     S32 *pi4_mv_bank_size,
846*c83a76b0SSuyog Pawar     S32 *pi4_ref_idx_size);
847*c83a76b0SSuyog Pawar 
848*c83a76b0SSuyog Pawar /**
849*c83a76b0SSuyog Pawar ********************************************************************************
850*c83a76b0SSuyog Pawar *  @fn     S32 hme_add_inp(void *pv_ctxt,
851*c83a76b0SSuyog Pawar *                       hme_inp_desc_t *ps_inp_desc);
852*c83a76b0SSuyog Pawar *
853*c83a76b0SSuyog Pawar *  @brief  Updates the HME context with details of the input buffers and POC.
854*c83a76b0SSuyog Pawar *          Layers that are not encoded are processed further in terms of
855*c83a76b0SSuyog Pawar *          pyramid generation.
856*c83a76b0SSuyog Pawar *
857*c83a76b0SSuyog Pawar *  @param[in,out] pv_ctxt : Pointer to context of HME
858*c83a76b0SSuyog Pawar *
859*c83a76b0SSuyog Pawar *  @param[in] ps_inp_desc : Input descriptor containing information of all
860*c83a76b0SSuyog Pawar *             simulcast layers of input.
861*c83a76b0SSuyog Pawar *
862*c83a76b0SSuyog Pawar *  @return   void
863*c83a76b0SSuyog Pawar *******************************************************************************
864*c83a76b0SSuyog Pawar */
865*c83a76b0SSuyog Pawar void hme_add_inp(void *pv_ctxt, hme_inp_desc_t *ps_inp_desc, S32 me_frm_id, WORD32 thrd_id);
866*c83a76b0SSuyog Pawar 
867*c83a76b0SSuyog Pawar void hme_coarse_add_inp(void *pv_me_ctxt, hme_inp_desc_t *ps_inp_desc, WORD32 i4_curr_idx);
868*c83a76b0SSuyog Pawar 
869*c83a76b0SSuyog Pawar /**
870*c83a76b0SSuyog Pawar ********************************************************************************
871*c83a76b0SSuyog Pawar *  @fn     hme_process_frm_init
872*c83a76b0SSuyog Pawar *
873*c83a76b0SSuyog Pawar *  @brief  HME frame level initialsation processing function
874*c83a76b0SSuyog Pawar *
875*c83a76b0SSuyog Pawar *  @param[in] pv_me_ctxt : ME ctxt pointer
876*c83a76b0SSuyog Pawar *
877*c83a76b0SSuyog Pawar *  @param[in] ps_ref_map : Reference map prms pointer
878*c83a76b0SSuyog Pawar *
879*c83a76b0SSuyog Pawar *  @param[in] ps_frm_prms :Pointer to frame params
880*c83a76b0SSuyog Pawar *
881*c83a76b0SSuyog Pawar *  @return Scale factor in Q8 format
882*c83a76b0SSuyog Pawar ********************************************************************************
883*c83a76b0SSuyog Pawar */
884*c83a76b0SSuyog Pawar 
885*c83a76b0SSuyog Pawar void hme_process_frm_init(
886*c83a76b0SSuyog Pawar     void *pv_me_ctxt,
887*c83a76b0SSuyog Pawar     hme_ref_map_t *ps_ref_map,
888*c83a76b0SSuyog Pawar     hme_frm_prms_t *ps_frm_prms,
889*c83a76b0SSuyog Pawar     WORD32 me_frm_id,
890*c83a76b0SSuyog Pawar     WORD32 i4_num_me_frm_pllel);
891*c83a76b0SSuyog Pawar 
892*c83a76b0SSuyog Pawar void hme_coarse_process_frm_init(
893*c83a76b0SSuyog Pawar     void *pv_me_ctxt, hme_ref_map_t *ps_ref_map, hme_frm_prms_t *ps_frm_prms);
894*c83a76b0SSuyog Pawar 
895*c83a76b0SSuyog Pawar /**
896*c83a76b0SSuyog Pawar ********************************************************************************
897*c83a76b0SSuyog Pawar *  @fn     void hme_process_frm(void *pv_ctxt,
898*c83a76b0SSuyog Pawar *                    hme_ref_map_t *ps_ref_map,
899*c83a76b0SSuyog Pawar *                    U16 **ppu2_intra_cost,
900*c83a76b0SSuyog Pawar *                    hme_frm_prms_t *ps_frm_prms);
901*c83a76b0SSuyog Pawar *
902*c83a76b0SSuyog Pawar *  @brief  Processes all the layers of the input, and updates the MV Banks.
903*c83a76b0SSuyog Pawar *          Note that this function is not to be called if processing of a single
904*c83a76b0SSuyog Pawar *          layer is desired.
905*c83a76b0SSuyog Pawar *
906*c83a76b0SSuyog Pawar *  @param[in,out] pv_ctxt : Pointer to context of HME
907*c83a76b0SSuyog Pawar *
908*c83a76b0SSuyog Pawar *  @param[in] ps_ref_map : Map structure that has for current input, lists of
909*c83a76b0SSuyog Pawar *             ref pics (POC) mapping to LC, L0 and L1, and buffer ptrs as well
910*c83a76b0SSuyog Pawar *             Informatino for all simulcast layers present.
911*c83a76b0SSuyog Pawar *
912*c83a76b0SSuyog Pawar *  @param[in] ppu2_intra_cost : array of Pointer to intra cost evaluated at an
913*c83a76b0SSuyog Pawar *              8x8 level, stored in raster order. At each layer, the
914*c83a76b0SSuyog Pawar *              corresponding ptr points to raster ordered array of wdxht/64,
915*c83a76b0SSuyog Pawar *              wd and ht are layer width and ht respectively. Also, note that
916*c83a76b0SSuyog Pawar *              ppu2_intra_cost[0] points to biggest resolution layer,
917*c83a76b0SSuyog Pawar *              and from there on in decreasing order of size.
918*c83a76b0SSuyog Pawar *
919*c83a76b0SSuyog Pawar * @param[in]  ps_frm_prms : input frame parameters (excluding ref info) that
920*c83a76b0SSuyog Pawar *             control the search complexity. Refer to hme_frm_prms_t for more
921*c83a76b0SSuyog Pawar *              info regards the same.
922*c83a76b0SSuyog Pawar *
923*c83a76b0SSuyog Pawar *  @return   void
924*c83a76b0SSuyog Pawar *******************************************************************************
925*c83a76b0SSuyog Pawar */
926*c83a76b0SSuyog Pawar 
927*c83a76b0SSuyog Pawar void hme_process_frm(
928*c83a76b0SSuyog Pawar     void *pv_me_ctxt,
929*c83a76b0SSuyog Pawar     pre_enc_L0_ipe_encloop_ctxt_t *ps_l0_ipe_input,
930*c83a76b0SSuyog Pawar     hme_ref_map_t *ps_ref_map,
931*c83a76b0SSuyog Pawar     double **ppd_intra_costs,
932*c83a76b0SSuyog Pawar     hme_frm_prms_t *ps_frm_prms,
933*c83a76b0SSuyog Pawar     PF_EXT_UPDATE_FXN_T pf_ext_update_fxn,
934*c83a76b0SSuyog Pawar     //PF_GET_INTRA_CU_AND_COST pf_get_intra_cu_and_cost,
935*c83a76b0SSuyog Pawar     void *pv_coarse_layer,
936*c83a76b0SSuyog Pawar     void *pv_multi_thrd_ctxt,
937*c83a76b0SSuyog Pawar     WORD32 i4_frame_parallelism_level,
938*c83a76b0SSuyog Pawar     S32 thrd_id,
939*c83a76b0SSuyog Pawar     S32 i4_me_frm_id);
940*c83a76b0SSuyog Pawar 
941*c83a76b0SSuyog Pawar void hme_coarse_process_frm(
942*c83a76b0SSuyog Pawar     void *pv_me_ctxt,
943*c83a76b0SSuyog Pawar     hme_ref_map_t *ps_ref_map,
944*c83a76b0SSuyog Pawar     hme_frm_prms_t *ps_frm_prms,
945*c83a76b0SSuyog Pawar     void *pv_multi_thrd_ctxt,
946*c83a76b0SSuyog Pawar     WORD32 i4_ping_pong,
947*c83a76b0SSuyog Pawar     void **ppv_dep_mngr_hme_sync);
948*c83a76b0SSuyog Pawar 
949*c83a76b0SSuyog Pawar void hme_discard_frm(
950*c83a76b0SSuyog Pawar     void *pv_ctxt, S32 *p_pocs_to_remove, S32 i4_idr_gop_num, S32 i4_num_me_frm_pllel);
951*c83a76b0SSuyog Pawar 
952*c83a76b0SSuyog Pawar void hme_coarse_discard_frm(void *pv_me_ctxt, S32 *p_pocs_to_remove);
953*c83a76b0SSuyog Pawar 
954*c83a76b0SSuyog Pawar /**
955*c83a76b0SSuyog Pawar *******************************************************************************
956*c83a76b0SSuyog Pawar *  @fn     S32 hme_set_resolution(void *pv_me_ctxt,
957*c83a76b0SSuyog Pawar *                                   S32 n_enc_layers,
958*c83a76b0SSuyog Pawar *                                   S32 *p_wd,
959*c83a76b0SSuyog Pawar *                                   S32 *p_ht
960*c83a76b0SSuyog Pawar *
961*c83a76b0SSuyog Pawar *  @brief  Sets up the layers based on resolution information.
962*c83a76b0SSuyog Pawar *
963*c83a76b0SSuyog Pawar *  @param[in, out] pv_me_ctxt : ME handle, updated with the resolution info
964*c83a76b0SSuyog Pawar *
965*c83a76b0SSuyog Pawar *  @param[in] n_enc_layers : Number of layers encoded
966*c83a76b0SSuyog Pawar *
967*c83a76b0SSuyog Pawar *  @param[in] p_wd : Pointer to an array having widths for each encode layer
968*c83a76b0SSuyog Pawar *
969*c83a76b0SSuyog Pawar *  @param[in] p_ht : Pointer to an array having heights for each encode layer
970*c83a76b0SSuyog Pawar *
971*c83a76b0SSuyog Pawar *  @return   void
972*c83a76b0SSuyog Pawar *******************************************************************************
973*c83a76b0SSuyog Pawar */
974*c83a76b0SSuyog Pawar 
975*c83a76b0SSuyog Pawar void hme_set_resolution(void *pv_me_ctxt, S32 n_enc_layers, S32 *p_wd, S32 *p_ht, S32 me_frm_id);
976*c83a76b0SSuyog Pawar 
977*c83a76b0SSuyog Pawar void hme_coarse_set_resolution(void *pv_me_ctxt, S32 n_enc_layers, S32 *p_wd, S32 *p_ht);
978*c83a76b0SSuyog Pawar 
979*c83a76b0SSuyog Pawar /**
980*c83a76b0SSuyog Pawar *******************************************************************************
981*c83a76b0SSuyog Pawar *  @fn     WORD32 hme_get_active_pocs_list(void *pv_me_ctxt)
982*c83a76b0SSuyog Pawar *
983*c83a76b0SSuyog Pawar *  @brief  Returns the list of active POCs in ME ctxt
984*c83a76b0SSuyog Pawar *
985*c83a76b0SSuyog Pawar *  @param[in] pv_me_ctxt : handle to ME context
986*c83a76b0SSuyog Pawar *
987*c83a76b0SSuyog Pawar *  @param[out] p_pocs_buffered_in_me : pointer to an array which this fxn
988*c83a76b0SSuyog Pawar *                                      populates with pocs active
989*c83a76b0SSuyog Pawar *
990*c83a76b0SSuyog Pawar *  @return   void
991*c83a76b0SSuyog Pawar *******************************************************************************
992*c83a76b0SSuyog Pawar */
993*c83a76b0SSuyog Pawar WORD32 hme_get_active_pocs_list(void *pv_me_ctxt, S32 i4_num_me_frm_pllel);
994*c83a76b0SSuyog Pawar 
995*c83a76b0SSuyog Pawar void hme_coarse_get_active_pocs_list(void *pv_me_ctxt, S32 *p_pocs_buffered_in_me);
996*c83a76b0SSuyog Pawar 
997*c83a76b0SSuyog Pawar S32 hme_get_blk_size(S32 use_4x4, S32 layer_id, S32 n_layers, S32 encode);
998*c83a76b0SSuyog Pawar 
999*c83a76b0SSuyog Pawar /**
1000*c83a76b0SSuyog Pawar ********************************************************************************
1001*c83a76b0SSuyog Pawar *  @fn     hme_get_mv_blk_size()
1002*c83a76b0SSuyog Pawar *
1003*c83a76b0SSuyog Pawar *  @brief  returns whether blk uses 4x4 size or something else.
1004*c83a76b0SSuyog Pawar *
1005*c83a76b0SSuyog Pawar *  @param[in] enable_4x4 : input param from application to enable 4x4
1006*c83a76b0SSuyog Pawar *
1007*c83a76b0SSuyog Pawar *  @param[in] layer_id : id of current layer (0 finest)
1008*c83a76b0SSuyog Pawar *
1009*c83a76b0SSuyog Pawar *  @param[in] num_layeers : total num layers
1010*c83a76b0SSuyog Pawar *
1011*c83a76b0SSuyog Pawar *  @param[in] is_enc : Whether encoding enabled for layer
1012*c83a76b0SSuyog Pawar *
1013*c83a76b0SSuyog Pawar *  @return   1 for 4x4 blks, 0 for 8x8
1014*c83a76b0SSuyog Pawar ********************************************************************************
1015*c83a76b0SSuyog Pawar */
1016*c83a76b0SSuyog Pawar S32 hme_get_mv_blk_size(S32 enable_4x4, S32 layer_id, S32 num_layers, S32 is_enc);
1017*c83a76b0SSuyog Pawar 
1018*c83a76b0SSuyog Pawar void hme_set_refine_prms(
1019*c83a76b0SSuyog Pawar     void *pv_refine_prms,
1020*c83a76b0SSuyog Pawar     U08 u1_encode,
1021*c83a76b0SSuyog Pawar     S32 num_ref,
1022*c83a76b0SSuyog Pawar     S32 layer_id,
1023*c83a76b0SSuyog Pawar     S32 num_layers,
1024*c83a76b0SSuyog Pawar     S32 num_layers_explicit_search,
1025*c83a76b0SSuyog Pawar     S32 use_4x4,
1026*c83a76b0SSuyog Pawar     hme_frm_prms_t *ps_frm_prms,
1027*c83a76b0SSuyog Pawar     double **ppd_intra_costs,
1028*c83a76b0SSuyog Pawar     me_coding_params_t *ps_me_coding_tools);
1029*c83a76b0SSuyog Pawar 
1030*c83a76b0SSuyog Pawar S32 hme_coarse_find_free_descr_idx(void *pv_ctxt);
1031*c83a76b0SSuyog Pawar 
1032*c83a76b0SSuyog Pawar S32 hme_derive_num_layers(S32 n_enc_layers, S32 *p_wd, S32 *p_ht, S32 *p_disp_wd, S32 *p_disp_ht);
1033*c83a76b0SSuyog Pawar 
1034*c83a76b0SSuyog Pawar #endif /* #ifndef _HME_INTERFACE_H_ */
1035