1*c83a76b0SSuyog Pawar /****************************************************************************** 2*c83a76b0SSuyog Pawar * 3*c83a76b0SSuyog Pawar * Copyright (C) 2018 The Android Open Source Project 4*c83a76b0SSuyog Pawar * 5*c83a76b0SSuyog Pawar * Licensed under the Apache License, Version 2.0 (the "License"); 6*c83a76b0SSuyog Pawar * you may not use this file except in compliance with the License. 7*c83a76b0SSuyog Pawar * You may obtain a copy of the License at: 8*c83a76b0SSuyog Pawar * 9*c83a76b0SSuyog Pawar * http://www.apache.org/licenses/LICENSE-2.0 10*c83a76b0SSuyog Pawar * 11*c83a76b0SSuyog Pawar * Unless required by applicable law or agreed to in writing, software 12*c83a76b0SSuyog Pawar * distributed under the License is distributed on an "AS IS" BASIS, 13*c83a76b0SSuyog Pawar * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14*c83a76b0SSuyog Pawar * See the License for the specific language governing permissions and 15*c83a76b0SSuyog Pawar * limitations under the License. 16*c83a76b0SSuyog Pawar * 17*c83a76b0SSuyog Pawar ***************************************************************************** 18*c83a76b0SSuyog Pawar * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19*c83a76b0SSuyog Pawar */ 20*c83a76b0SSuyog Pawar 21*c83a76b0SSuyog Pawar /** 22*c83a76b0SSuyog Pawar ****************************************************************************** 23*c83a76b0SSuyog Pawar * 24*c83a76b0SSuyog Pawar * @file ihevce_bs_compute_ctb.h 25*c83a76b0SSuyog Pawar * 26*c83a76b0SSuyog Pawar * @brief 27*c83a76b0SSuyog Pawar * This file contains encoder boundary strength related macros and 28*c83a76b0SSuyog Pawar * interface prototypes 29*c83a76b0SSuyog Pawar * 30*c83a76b0SSuyog Pawar * @author 31*c83a76b0SSuyog Pawar * ittiam 32*c83a76b0SSuyog Pawar * 33*c83a76b0SSuyog Pawar ****************************************************************************** 34*c83a76b0SSuyog Pawar */ 35*c83a76b0SSuyog Pawar 36*c83a76b0SSuyog Pawar #ifndef _IHEVCE_BS_COMPUTE_CTB_H_ 37*c83a76b0SSuyog Pawar #define _IHEVCE_BS_COMPUTE_CTB_H_ 38*c83a76b0SSuyog Pawar 39*c83a76b0SSuyog Pawar /*****************************************************************************/ 40*c83a76b0SSuyog Pawar /* Constant Macros */ 41*c83a76b0SSuyog Pawar /*****************************************************************************/ 42*c83a76b0SSuyog Pawar 43*c83a76b0SSuyog Pawar /** 44*c83a76b0SSuyog Pawar ****************************************************************************** 45*c83a76b0SSuyog Pawar * @brief defines the BS for a 32x32 TU in INTRA mode 46*c83a76b0SSuyog Pawar ****************************************************************************** 47*c83a76b0SSuyog Pawar */ 48*c83a76b0SSuyog Pawar #define BS_INTRA_32 0xAAAA 49*c83a76b0SSuyog Pawar 50*c83a76b0SSuyog Pawar /** 51*c83a76b0SSuyog Pawar ****************************************************************************** 52*c83a76b0SSuyog Pawar * @brief defines the BS for a 16x16 TU in INTRA mode 53*c83a76b0SSuyog Pawar ****************************************************************************** 54*c83a76b0SSuyog Pawar */ 55*c83a76b0SSuyog Pawar #define BS_INTRA_16 0xAA 56*c83a76b0SSuyog Pawar 57*c83a76b0SSuyog Pawar /** 58*c83a76b0SSuyog Pawar ****************************************************************************** 59*c83a76b0SSuyog Pawar * @brief defines the BS for a 8x8 TU in INTRA mode 60*c83a76b0SSuyog Pawar ****************************************************************************** 61*c83a76b0SSuyog Pawar */ 62*c83a76b0SSuyog Pawar #define BS_INTRA_8 0xA 63*c83a76b0SSuyog Pawar 64*c83a76b0SSuyog Pawar /** 65*c83a76b0SSuyog Pawar ****************************************************************************** 66*c83a76b0SSuyog Pawar * @brief defines the BS for a 4x4 TU in INTRA mode 67*c83a76b0SSuyog Pawar ****************************************************************************** 68*c83a76b0SSuyog Pawar */ 69*c83a76b0SSuyog Pawar #define BS_INTRA_4 0x2 70*c83a76b0SSuyog Pawar 71*c83a76b0SSuyog Pawar /** 72*c83a76b0SSuyog Pawar ****************************************************************************** 73*c83a76b0SSuyog Pawar * @brief defines the invalid BS in global array 74*c83a76b0SSuyog Pawar ****************************************************************************** 75*c83a76b0SSuyog Pawar */ 76*c83a76b0SSuyog Pawar #define BS_INVALID 0xDEAF 77*c83a76b0SSuyog Pawar 78*c83a76b0SSuyog Pawar /** 79*c83a76b0SSuyog Pawar ****************************************************************************** 80*c83a76b0SSuyog Pawar * @brief defines the BS for a coded inter 32x32 TU 81*c83a76b0SSuyog Pawar ****************************************************************************** 82*c83a76b0SSuyog Pawar */ 83*c83a76b0SSuyog Pawar #define BS_CBF_32 0x5555 84*c83a76b0SSuyog Pawar 85*c83a76b0SSuyog Pawar /** 86*c83a76b0SSuyog Pawar ****************************************************************************** 87*c83a76b0SSuyog Pawar * @brief defines the BS for a coded inter 16x16 TU 88*c83a76b0SSuyog Pawar ****************************************************************************** 89*c83a76b0SSuyog Pawar */ 90*c83a76b0SSuyog Pawar #define BS_CBF_16 0x55 91*c83a76b0SSuyog Pawar 92*c83a76b0SSuyog Pawar /** 93*c83a76b0SSuyog Pawar ****************************************************************************** 94*c83a76b0SSuyog Pawar * @brief defines the BS for a coded inter 8x8 TU 95*c83a76b0SSuyog Pawar ****************************************************************************** 96*c83a76b0SSuyog Pawar */ 97*c83a76b0SSuyog Pawar #define BS_CBF_8 0x5 98*c83a76b0SSuyog Pawar 99*c83a76b0SSuyog Pawar /** 100*c83a76b0SSuyog Pawar ****************************************************************************** 101*c83a76b0SSuyog Pawar * @brief defines the BS for a coded inter 4x4 TU 102*c83a76b0SSuyog Pawar ****************************************************************************** 103*c83a76b0SSuyog Pawar */ 104*c83a76b0SSuyog Pawar #define BS_CBF_4 0x01 105*c83a76b0SSuyog Pawar 106*c83a76b0SSuyog Pawar /*****************************************************************************/ 107*c83a76b0SSuyog Pawar /* Function Macros */ 108*c83a76b0SSuyog Pawar /*****************************************************************************/ 109*c83a76b0SSuyog Pawar 110*c83a76b0SSuyog Pawar /** 111*c83a76b0SSuyog Pawar ****************************************************************************** 112*c83a76b0SSuyog Pawar * @brief Macro to set the value in input pointer with given value starting 113*c83a76b0SSuyog Pawar * from ( 32 - (ip_pos<<1) - (edge_size>>1) ). This is for storing in BigEndian 114*c83a76b0SSuyog Pawar * with 2 bits per 4x4. edge_size in pixels & ip_pos in terms of 4x4 115*c83a76b0SSuyog Pawar * (ip_pos<<1) : since 2bits per ip_pos (which is in 4x4) 116*c83a76b0SSuyog Pawar * (edge_size>>1) : since no. of bits of value is (edge_size>>1), edge_size in pix 117*c83a76b0SSuyog Pawar ****************************************************************************** 118*c83a76b0SSuyog Pawar */ 119*c83a76b0SSuyog Pawar #define SET_VALUE_BIG(pu4_bs, value, ip_pos, edge_size) \ 120*c83a76b0SSuyog Pawar { \ 121*c83a76b0SSuyog Pawar *(pu4_bs) = *(pu4_bs) | (value << (32 - (ip_pos << 1) - (edge_size >> 1))); \ 122*c83a76b0SSuyog Pawar } 123*c83a76b0SSuyog Pawar 124*c83a76b0SSuyog Pawar /** 125*c83a76b0SSuyog Pawar ****************************************************************************** 126*c83a76b0SSuyog Pawar * @brief extracts 2 bits starting from (30-2*ip_pos) from the value pointed 127*c83a76b0SSuyog Pawar * by pu4_bs. This is for extracting from a BigEndian stored ip. 128*c83a76b0SSuyog Pawar ****************************************************************************** 129*c83a76b0SSuyog Pawar */ 130*c83a76b0SSuyog Pawar #define EXTRACT_VALUE_BIG(pu4_bs, ip_pos) (((*(pu4_bs)) >> (30 - 2 * ip_pos)) & 0x3) 131*c83a76b0SSuyog Pawar 132*c83a76b0SSuyog Pawar /*****************************************************************************/ 133*c83a76b0SSuyog Pawar /* Extern Function Declarations */ 134*c83a76b0SSuyog Pawar /*****************************************************************************/ 135*c83a76b0SSuyog Pawar 136*c83a76b0SSuyog Pawar void ihevce_bs_init_ctb( 137*c83a76b0SSuyog Pawar deblk_bs_ctb_ctxt_t *ps_deblk_prms, 138*c83a76b0SSuyog Pawar frm_ctb_ctxt_t *ps_frm_ctb_prms, 139*c83a76b0SSuyog Pawar WORD32 ctb_ctr, 140*c83a76b0SSuyog Pawar WORD32 vert_ctr); 141*c83a76b0SSuyog Pawar 142*c83a76b0SSuyog Pawar void ihevce_bs_compute_cu( 143*c83a76b0SSuyog Pawar cu_enc_loop_out_t *ps_cu_final, 144*c83a76b0SSuyog Pawar nbr_4x4_t *ps_top_nbr_4x4, 145*c83a76b0SSuyog Pawar nbr_4x4_t *ps_left_nbr_4x4, 146*c83a76b0SSuyog Pawar nbr_4x4_t *ps_curr_nbr_4x4, 147*c83a76b0SSuyog Pawar WORD32 nbr_4x4_left_strd, 148*c83a76b0SSuyog Pawar WORD32 num_4x4_in_ctb, 149*c83a76b0SSuyog Pawar deblk_bs_ctb_ctxt_t *ps_deblk_prms); 150*c83a76b0SSuyog Pawar 151*c83a76b0SSuyog Pawar void ihevce_bs_clear_invalid( 152*c83a76b0SSuyog Pawar deblk_bs_ctb_ctxt_t *ps_deblk_prms, 153*c83a76b0SSuyog Pawar WORD32 last_ctb_row_flag, 154*c83a76b0SSuyog Pawar WORD32 last_ctb_in_row_flag, 155*c83a76b0SSuyog Pawar WORD32 last_hz_ctb_wd, 156*c83a76b0SSuyog Pawar WORD32 last_vt_ctb_ht); 157*c83a76b0SSuyog Pawar 158*c83a76b0SSuyog Pawar #endif /* _IHEVCE_BS_COMPUTE_CTB_H_ */ 159